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README
¶
Akita Memory Model
This repository contains the definition and the implementation for memory system components.
Please check here For detailed documentation.
Directories
¶
| Path | Synopsis |
|---|---|
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Package acceptancetests provides utility data structure definitions for writing memory system acceptance tests.
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Package acceptancetests provides utility data structure definitions for writing memory system acceptance tests. |
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Package cache provides the basic commonly used utility data structures for cache implementation.
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Package cache provides the basic commonly used utility data structures for cache implementation. |
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writearound
Package writearound provides a GCN3 GPU L1 cache implementation.
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Package writearound provides a GCN3 GPU L1 cache implementation. |
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writeback
Package writeback implements a writeback cache.
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Package writeback implements a writeback cache. |
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writeevict
Package writeevict provides a RDNA GPU L1 cache implementation.
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Package writeevict provides a RDNA GPU L1 cache implementation. |
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writethrough
Package writethrough provides a GCN3 GPU L1 cache implementation.
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Package writethrough provides a GCN3 GPU L1 cache implementation. |
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Package dram defines detailed DRAM modeling.
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Package dram defines detailed DRAM modeling. |
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internal/addressmapping
Package addressmapping defines how to maps an address to a localtion.
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Package addressmapping defines how to maps an address to a localtion. |
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internal/cmdq
Package cmdq provides command queue implementations
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Package cmdq provides command queue implementations |
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internal/org
Package org defines the DRAM organization related sub-component definitions, such as Channels and Banks.
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Package org defines the DRAM organization related sub-component definitions, such as Channels and Banks. |
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internal/signal
Package signal defines the common data structures used in the dram system, including transactions, sub-transactions, and commands.
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Package signal defines the common data structures used in the dram system, including transactions, sub-transactions, and commands. |
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internal/trans
Package trans defines concepts related to DRAM transactions and subtransactions.
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Package trans defines concepts related to DRAM transactions and subtransactions. |
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Package idealmemcontroller provides an implementation of an ideal memory controller, which has a fix latency and unlimited concurrency.
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Package idealmemcontroller provides an implementation of an ideal memory controller, which has a fix latency and unlimited concurrency. |
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Package mem and its subpackages provide definitions for memoy systems.
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Package mem and its subpackages provide definitions for memoy systems. |
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Package trace provides a tracer that can trace memory system tasks.
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Package trace provides a tracer that can trace memory system tasks. |
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Package vm provides the models for address translations
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Package vm provides the models for address translations |
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addresstranslator
Package addresstranslator implements a component that can forward the translated read and write request to the bottom memory unit.
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Package addresstranslator implements a component that can forward the translated read and write request to the bottom memory unit. |
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idealaddresstranslator
Package idealaddresstranslator implements a component that can forward the translated read and write request to the bottom memory unit.
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Package idealaddresstranslator implements a component that can forward the translated read and write request to the bottom memory unit. |
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mmu
Package mmu provides a Memory Management Unit implementation.
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Package mmu provides a Memory Management Unit implementation. |
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tlb
Package tlb provides a TLB component implementation.
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Package tlb provides a TLB component implementation. |
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tlb/internal
Package internal provides the definition required for defining TLB.
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Package internal provides the definition required for defining TLB. |
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