cu

package
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 Go to latest Published: Jul 5, 2024 License: MIT Imports: 16 Imported by: 4

Documentation

Overview

Package cu provides an implementation of detailed Compute Unit modeling.

Index

Constants

This section is empty.

Variables

This section is empty.

Functions

This section is empty.

Types

type AllInstCPIStack 

type AllInstCPIStack struct {
	AllInstCPI     float64
	SIMDStack      float64
	LDSStack       float64
	BranchStack    float64
	ScalarStack    float64
	VMemStack      float64
	TotalStackBase float64
}

AllInstCPIStack holds the cpi stack values of each type of instruction when considering each instruction in total

type AllocStatus 

type AllocStatus byte

AllocStatus represents the allocation status of SGPRs, VGPRs, or LDS units 

const (
	AllocStatusFree      AllocStatus = iota
	AllocStatusToReserve             // A value that is used for reservation caculation
	AllocStatusReserved              // Work-Group mapped, but wavefront not dispatched
	AllocStatusUsed                  // Currently in use
)

A list of possible status for CU binded storage allocation

type BranchUnit 

type BranchUnit struct {
	// contains filtered or unexported fields
}

A BranchUnit performs branch operations

func NewBranchUnit 

func NewBranchUnit(
	cu *ComputeUnit,
	scratchpadPreparer ScratchpadPreparer,
	alu emu.ALU,
) *BranchUnit

NewBranchUnit creates a new branch unit, injecting the dependency of the compute unit.

func (*BranchUnit) AcceptWave 

func (u *BranchUnit) AcceptWave(
	wave *wavefront.Wavefront,
	now sim.VTimeInSec,
)

AcceptWave moves one wavefront into the read buffer of the branch unit

func (*BranchUnit) CanAcceptWave 

func (u *BranchUnit) CanAcceptWave() bool

CanAcceptWave checks if the buffer of the read stage is occupied or not

func (*BranchUnit) Flush 

func (u *BranchUnit) Flush()

Flush clear the unit

func (*BranchUnit) IsIdle 

func (u *BranchUnit) IsIdle() bool

IsIdle checks idleness

func (*BranchUnit) Run 

func (u *BranchUnit) Run(now sim.VTimeInSec) bool

Run executes three pipeline stages that are controlled by the BranchUnit

type Builder 

type Builder struct {
	// contains filtered or unexported fields
}

A Builder can construct a fully functional Compute Unit.

func MakeBuilder 

func MakeBuilder() Builder

MakeBuilder returns a default builder object

func (*Builder) Build 

func (b *Builder) Build(name string) *ComputeUnit

Build returns a newly constructed compute unit according to the configuration.

func (Builder) WithEngine 

func (b Builder) WithEngine(engine sim.Engine) Builder

WithEngine sets the engine to use.

func (Builder) WithFreq 

func (b Builder) WithFreq(f sim.Freq) Builder

WithFreq sets the frequency.

func (Builder) WithLog2CachelineSize 

func (b Builder) WithLog2CachelineSize(n uint64) Builder

WithLog2CachelineSize sets the cacheline size as a power of 2.

func (Builder) WithSGPRCount 

func (b Builder) WithSGPRCount(count int) Builder

WithSGPRCount equals the number of SGPRs in the Compute Unit.

func (Builder) WithSIMDCount 

func (b Builder) WithSIMDCount(n int) Builder

WithSIMDCount sets the number of SIMD unit in the ComputeUnit.

func (Builder) WithVGPRCount 

func (b Builder) WithVGPRCount(counts []int) Builder

WithVGPRCount sets the number of VGPRs associated with each SIMD Unit.

func (Builder) WithVisTracer 

func (b Builder) WithVisTracer(t tracing.Tracer) Builder

WithVisTracer adds a tracer to the builder.

type CPIStackTracer 

type CPIStackTracer struct {
	// contains filtered or unexported fields
}

A CPIStackTracer is a hook to the CU that captures what instructions are issued in each cycle.

The hook keep track of the state of the wavefronts. The state can be one of the following:

  • "idle": the wavefront is not doing anything
  • "fetch": the wavefront is fetching an instruction
  • "scalar-mem": the wavefront is fetching an instruction and is waiting for the scalar memory to be ready
  • "vector-mem": the wavefront is fetching an instruction and is waiting for

the vector memory to be ready - "lds": the wavefront is fetching an instruction and is waiting for the LDS to be ready - "scalar": the wavefront is executing a scalar instruction - "vector": the wavefront is executing a vector instruction

func NewCPIStackInstHook 

func NewCPIStackInstHook(
	cu *ComputeUnit,
	timeTeller sim.TimeTeller,
) *CPIStackTracer

NewCPIStackInstHook creates a CPIStackInstHook object.

func (*CPIStackTracer) EndTask 

func (h *CPIStackTracer) EndTask(task tracing.Task)

EndTask is called when a task is ended.

func (*CPIStackTracer) GetCPIStack 

func (h *CPIStackTracer) GetCPIStack() map[string]float64

func (*CPIStackTracer) GetSIMDCPIStack 

func (h *CPIStackTracer) GetSIMDCPIStack() map[string]float64

func (*CPIStackTracer) StartTask 

func (h *CPIStackTracer) StartTask(task tracing.Task)

StartTask is called when a task is started.

func (*CPIStackTracer) StepTask 

func (h *CPIStackTracer) StepTask(task tracing.Task)

StepTask does nothing.

type ComputeUnit 

type ComputeUnit struct {
	*sim.TickingComponent

	WfDispatcher WfDispatcher
	Decoder      emu.Decoder
	WfPools      []*WavefrontPool

	InFlightInstFetch            []*InstFetchReqInfo
	InFlightScalarMemAccess      []*ScalarMemAccessInfo
	InFlightVectorMemAccess      []VectorMemAccessInfo
	InFlightVectorMemAccessLimit int

	Scheduler        Scheduler
	BranchUnit       SubComponent
	VectorMemDecoder SubComponent
	VectorMemUnit    SubComponent
	ScalarDecoder    SubComponent
	VectorDecoder    SubComponent
	LDSDecoder       SubComponent
	ScalarUnit       SubComponent
	SIMDUnit         []SubComponent
	LDSUnit          SubComponent
	SRegFile         RegisterFile
	VRegFile         []RegisterFile

	InstMem          sim.Port
	ScalarMem        sim.Port
	VectorMemModules mem.LowModuleFinder

	ToACE sim.Port

	ToInstMem   sim.Port
	ToScalarMem sim.Port
	ToVectorMem sim.Port
	ToCP        sim.Port
	// contains filtered or unexported fields
}

A ComputeUnit in the timing package provides a detailed and accurate simulation of a GCN3 ComputeUnit

func NewComputeUnit 

func NewComputeUnit(
	name string,
	engine sim.Engine,
) *ComputeUnit

NewComputeUnit returns a newly constructed compute unit

func (*ComputeUnit) ControlPort 

func (cu *ComputeUnit) ControlPort() sim.Port

ControlPort returns the port that can receive controlling messages from the Command Processor.

func (*ComputeUnit) DispatchingPort 

func (cu *ComputeUnit) DispatchingPort() sim.Port

DispatchingPort returns the port that the dispatcher can use to dispatch work-groups to the CU.

func (*ComputeUnit) LDSBytes 

func (cu *ComputeUnit) LDSBytes() int

LDSBytes returns the number of bytes in the LDS of the CU.

func (*ComputeUnit) SRegCount 

func (cu *ComputeUnit) SRegCount() int

SRegCount returns the number of scalar register in the Compute Unit.

func (*ComputeUnit) Tick 

func (cu *ComputeUnit) Tick(now sim.VTimeInSec) bool

Tick ticks

func (*ComputeUnit) UpdatePCAndSetReady 

func (cu *ComputeUnit) UpdatePCAndSetReady(wf *wavefront.Wavefront)

UpdatePCAndSetReady is self explained

func (*ComputeUnit) VRegCounts 

func (cu *ComputeUnit) VRegCounts() []int

VRegCounts returns an array of the numbers of vector regsiters in each SIMD unit.

func (*ComputeUnit) WfPoolSizes 

func (cu *ComputeUnit) WfPoolSizes() []int

WfPoolSizes returns an array of the numbers of wavefronts that each SIMD unit can execute.

type DecodeUnit 

type DecodeUnit struct {
	ExecUnits []SubComponent // Execution units, index by SIMD number
	// contains filtered or unexported fields
}

A DecodeUnit is any type of decode unit that takes one cycle to decode

func NewDecodeUnit 

func NewDecodeUnit(cu *ComputeUnit) *DecodeUnit

NewDecodeUnit creates a new decode unit

func (*DecodeUnit) AcceptWave 

func (du *DecodeUnit) AcceptWave(
	wave *wavefront.Wavefront,
	now sim.VTimeInSec,
)

AcceptWave takes a wavefront and decode the instruction in the next cycle

func (*DecodeUnit) AddExecutionUnit 

func (du *DecodeUnit) AddExecutionUnit(cuComponent SubComponent)

AddExecutionUnit registers an executions unit to the decode unit, so that the decode unit knows where to send the instruction to after decoding. This function has to be called in the order of SIMD number.

func (*DecodeUnit) CanAcceptWave 

func (du *DecodeUnit) CanAcceptWave() bool

CanAcceptWave checks if the DecodeUnit is ready to decode another instruction

func (*DecodeUnit) Flush 

func (du *DecodeUnit) Flush()

Flush clear the unit

func (*DecodeUnit) IsIdle 

func (du *DecodeUnit) IsIdle() bool

IsIdle checks idleness

func (*DecodeUnit) Run 

func (du *DecodeUnit) Run(now sim.VTimeInSec) bool

Run decodes the instruction and sends the instruction to the next pipeline stage

type FetchArbiter 

type FetchArbiter struct {
	InstBufByteSize int
}

A FetchArbiter can decide which wavefront in a scheduler can fetch instructions

func (*FetchArbiter) Arbitrate 

func (a *FetchArbiter) Arbitrate(
	wfPools []*WavefrontPool,
) []*wavefront.Wavefront

Arbitrate decide which wavefront can fetch the next instruction

type ISADebugger 

type ISADebugger struct {
	sim.LogHookBase
	// contains filtered or unexported fields
}

ISADebugger is a hook that hooks to a emulator computeunit for each intruction

func NewISADebugger 

func NewISADebugger(logger *log.Logger, cu *ComputeUnit) *ISADebugger

NewISADebugger returns a new ISADebugger that keeps instruction log in logger

func (*ISADebugger) EndTask 

func (h *ISADebugger) EndTask(task tracing.Task)

EndTask marks the end of an instruction.

func (*ISADebugger) StartTask 

func (h *ISADebugger) StartTask(task tracing.Task)

StartTask marks the start of an instruction.

func (*ISADebugger) StepTask 

func (h *ISADebugger) StepTask(task tracing.Task)

StepTask does nothing as of now.

type InstCountManagement 

type InstCountManagement struct {
	TotalInstCount uint64
	SIMDInstCount  uint64
	OtherInstCount uint64
}

InstCountManagement manages the instruction count in tracing

type InstFetchReqInfo 

type InstFetchReqInfo struct {
	Req       *mem.ReadReq
	Wavefront *wavefront.Wavefront
	Address   uint64
}

InstFetchReqInfo defines request info

type InstTimeManagement 

type InstTimeManagement struct {
	TotalVMemTime    float64
	TotalBranchTime  float64
	TotalSpecialTime float64
	TotalLDSTime     float64
	TotalTime        float64
	TotalSIMDTime    float64
	TotalOtherTime   float64
	// contains filtered or unexported fields
}

InstTimeManagement manages the time distribution in tracing

type InstTracer 

type InstTracer struct {
	SIMDCPIStackValues    SIMDCPIStack
	AllInstCPIStackValues AllInstCPIStack
	TimeManager           InstTimeManagement
	CountManager          InstCountManagement
	ScalarInstTracer      *tracing.BusyTimeTracer
	// contains filtered or unexported fields
}

InstTracer is a tracer that traces the time that VALU instructions take and VMem instructions take

func NewInstTracer 

func NewInstTracer(timeTeller sim.TimeTeller) *InstTracer

NewInstTracer creates a new InstTracer

func (*InstTracer) CalcSIMDCPIStack 

func (t *InstTracer) CalcSIMDCPIStack()

CalcSIMDCPIStack calculates the SIMD Specific CPI Stack

func (*InstTracer) CalcTotalCPIStack 

func (t *InstTracer) CalcTotalCPIStack()

CalcTotalCPIStack calculates the CPI Stack for all instructions

func (*InstTracer) EndTask 

func (t *InstTracer) EndTask(task tracing.Task)

EndTask filters time into correct attribute and deletes the instruction from the tracer

func (*InstTracer) StartTask 

func (t *InstTracer) StartTask(task tracing.Task)

StartTask begins the tracing for the InstTracer

func (*InstTracer) StepTask 

func (t *InstTracer) StepTask(task tracing.Task)

StepTask does nothing for now

type IssueArbiter 

type IssueArbiter struct {
	// contains filtered or unexported fields
}

An IssueArbiter decides which wavefront can issue instruction

func NewIssueArbiter 

func NewIssueArbiter() *IssueArbiter

NewIssueArbiter returns a newly created IssueArbiter

func (*IssueArbiter) Arbitrate 

func (a *IssueArbiter) Arbitrate(
	wfPools []*WavefrontPool,
) []*wavefront.Wavefront

Arbitrate will take a round-robin fashion at SIMD level. For wavefronts in each SIMD, oldest first.

type LDSUnit 

type LDSUnit struct {
	// contains filtered or unexported fields
}

A LDSUnit performs Scalar operations

func NewLDSUnit 

func NewLDSUnit(
	cu *ComputeUnit,
	scratchpadPreparer ScratchpadPreparer,
	alu emu.ALU,
) *LDSUnit

NewLDSUnit creates a new Scalar unit, injecting the dependency of the compute unit.

func (*LDSUnit) AcceptWave 

func (u *LDSUnit) AcceptWave(wave *wavefront.Wavefront, now sim.VTimeInSec)

AcceptWave moves one wavefront into the read buffer of the Scalar unit

func (*LDSUnit) CanAcceptWave 

func (u *LDSUnit) CanAcceptWave() bool

CanAcceptWave checks if the buffer of the read stage is occupied or not

func (*LDSUnit) Flush 

func (u *LDSUnit) Flush()

Flush clears the unit

func (*LDSUnit) IsIdle 

func (u *LDSUnit) IsIdle() bool

IsIdle checks idleness

func (*LDSUnit) Run 

func (u *LDSUnit) Run(now sim.VTimeInSec) bool

Run executes three pipeline stages that are controlled by the LDSUnit

type RegisterAccess 

type RegisterAccess struct {
	Time       sim.VTimeInSec
	Reg        *insts.Reg
	RegCount   int
	LaneID     int
	WaveOffset int
	Data       []byte
	OK         bool
}

A RegisterAccess is an incidence of reading or writing the register

type RegisterFile 

type RegisterFile interface {
	Read(access RegisterAccess)
	Write(access RegisterAccess)
}

A RegisterFile provides the communication interface for a set of registers.

type ResourceMask 

type ResourceMask struct {
	// contains filtered or unexported fields
}

A ResourceMask is data structure to mask the status of some resources

func NewResourceMask 

func NewResourceMask(size int) *ResourceMask

NewResourceMask returns a newly created ResourceMask with a given size.

func (*ResourceMask) ConvertStatus 

func (m *ResourceMask) ConvertStatus(from, to AllocStatus)

ConvertStatus change all the element of one status to another

func (*ResourceMask) NextRegion 

func (m *ResourceMask) NextRegion(
	length int,
	statusReq AllocStatus,
) (int, bool)

NextRegion finds a region that is masked by the resourceMask in the state define by statusReq. This function returns the offset of the starting point of the region. It also returns a boolean value that tells if a region is found

func (*ResourceMask) SetStatus 

func (m *ResourceMask) SetStatus(offset, length int, status AllocStatus)

SetStatus alters the status from the position of offset to offset + length

func (*ResourceMask) StatusCount 

func (m *ResourceMask) StatusCount(status AllocStatus) int

StatusCount returns the number of element that is in the target status

type SIMDCPIStack 

type SIMDCPIStack struct {
	SIMDCPI     float64
	LDSStack    float64
	BranchStack float64
	ScalarStack float64
	VMemStack   float64
	StackBase   float64
}

SIMDCPIStack holds the cpi stack values of each type of instruction when looking at the SIMD specifically

type SIMDUnit 

type SIMDUnit struct {
	sim.HookableBase

	NumSinglePrecisionUnit int
	// contains filtered or unexported fields
}

A SIMDUnit performs branch operations

func NewSIMDUnit 

func NewSIMDUnit(
	cu *ComputeUnit,
	name string,
	scratchpadPreparer ScratchpadPreparer,
	alu emu.ALU,
) *SIMDUnit

NewSIMDUnit creates a new branch unit, injecting the dependency of the compute unit.

func (*SIMDUnit) AcceptWave 

func (u *SIMDUnit) AcceptWave(wave *wavefront.Wavefront, now sim.VTimeInSec)

AcceptWave moves one wavefront into the read buffer of the branch unit

func (*SIMDUnit) CanAcceptWave 

func (u *SIMDUnit) CanAcceptWave() bool

CanAcceptWave checks if the buffer of the read stage is occupied or not

func (*SIMDUnit) Flush 

func (u *SIMDUnit) Flush()

Flush flushes

func (*SIMDUnit) IsIdle 

func (u *SIMDUnit) IsIdle() bool

IsIdle checks if the buffer of the read stage is occupied or not

func (*SIMDUnit) Name 

func (u *SIMDUnit) Name() string

Name names the unit

func (*SIMDUnit) Run 

func (u *SIMDUnit) Run(now sim.VTimeInSec) bool

Run executes three pipeline stages that are controlled by the SIMDUnit

type ScalarMemAccessInfo 

type ScalarMemAccessInfo struct {
	Req       *mem.ReadReq
	Wavefront *wavefront.Wavefront
	DstSGPR   *insts.Reg
	Inst      *wavefront.Inst
}

ScalarMemAccessInfo defines request info

type ScalarUnit 

type ScalarUnit struct {
	// contains filtered or unexported fields
}

A ScalarUnit performs Scalar operations

func NewScalarUnit 

func NewScalarUnit(
	cu *ComputeUnit,
	scratchpadPreparer ScratchpadPreparer,
	alu emu.ALU,
) *ScalarUnit

NewScalarUnit creates a new Scalar unit, injecting the dependency of the compute unit.

func (*ScalarUnit) AcceptWave 

func (u *ScalarUnit) AcceptWave(wave *wavefront.Wavefront, now sim.VTimeInSec)

AcceptWave moves one wavefront into the read buffer of the Scalar unit

func (*ScalarUnit) CanAcceptWave 

func (u *ScalarUnit) CanAcceptWave() bool

CanAcceptWave checks if the buffer of the read stage is occupied or not

func (*ScalarUnit) Flush 

func (u *ScalarUnit) Flush()

Flush clears the unit

func (*ScalarUnit) IsIdle 

func (u *ScalarUnit) IsIdle() bool

IsIdle checks idleness

func (*ScalarUnit) Run 

func (u *ScalarUnit) Run(now sim.VTimeInSec) bool

Run executes three pipeline stages that are controlled by the ScalarUnit

type Scheduler 

type Scheduler interface {
	Run(now sim.VTimeInSec) bool
	Pause()
	Resume()
	Flush()
}

Scheduler does its job

type SchedulerImpl 

type SchedulerImpl struct {
	// contains filtered or unexported fields
}

SchedulerImpl implements scheduler A Scheduler is the controlling unit of a compute unit. It decides which wavefront to fetch and to issue.

func NewScheduler 

func NewScheduler(
	cu *ComputeUnit,
	fetchArbiter WfArbiter,
	issueArbiter WfArbiter,
) *SchedulerImpl

NewScheduler returns a newly created scheduler, injecting dependency of the compute unit, the fetch arbiter, and the issue arbiter.

func (*SchedulerImpl) DecodeNextInst 

func (s *SchedulerImpl) DecodeNextInst(now sim.VTimeInSec) bool

DecodeNextInst checks

func (*SchedulerImpl) DoFetch 

func (s *SchedulerImpl) DoFetch(now sim.VTimeInSec) bool

DoFetch function of the scheduler will fetch instructions from the instruction memory

func (*SchedulerImpl) DoIssue 

func (s *SchedulerImpl) DoIssue(now sim.VTimeInSec) bool

DoIssue function of the scheduler issues fetched instruction to the decoding units

func (*SchedulerImpl) EvaluateInternalInst 

func (s *SchedulerImpl) EvaluateInternalInst(now sim.VTimeInSec) bool

EvaluateInternalInst updates the status of the instruction being executed in the scheduler.

func (*SchedulerImpl) Flush 

func (s *SchedulerImpl) Flush()

Flush flushes

func (*SchedulerImpl) Pause 

func (s *SchedulerImpl) Pause()

Pause pauses

func (*SchedulerImpl) Resume 

func (s *SchedulerImpl) Resume()

Resume resumes

func (*SchedulerImpl) Run 

func (s *SchedulerImpl) Run(now sim.VTimeInSec) bool

Run runs scheduler

type ScratchpadPreparer 

type ScratchpadPreparer interface {
	Prepare(instEmuState emu.InstEmuState, wf *wavefront.Wavefront)
	Commit(instEmuState emu.InstEmuState, wf *wavefront.Wavefront)
}

ScratchpadPreparer does its jobs

type ScratchpadPreparerImpl 

type ScratchpadPreparerImpl struct {
	// contains filtered or unexported fields
}

ScratchpadPreparerImpl reads and write registers for the emulator

func NewScratchpadPreparerImpl 

func NewScratchpadPreparerImpl(cu *ComputeUnit) *ScratchpadPreparerImpl

NewScratchpadPreparerImpl returns a newly created ScratchpadPreparerImpl, injecting the dependency of the RegInterface.

func (*ScratchpadPreparerImpl) Commit 

func (p *ScratchpadPreparerImpl) Commit(
	instEmuState emu.InstEmuState,
	wf *wavefront.Wavefront,
)

Commit write to the register file according to the scratchpad layout

func (*ScratchpadPreparerImpl) Prepare 

func (p *ScratchpadPreparerImpl) Prepare(
	instEmuState emu.InstEmuState,
	wf *wavefront.Wavefront,
)

Prepare read from the register file and sets the scratchpad layout

type SimpleRegisterFile 

type SimpleRegisterFile struct {

	// In vector register, each lane can have up-to 256 VGPRs. Then the offset
	// difference from v0 lane 0 to v0 lane 1 is 256*4 = 1024B. Field
	// ByteSizePerLane should be set to 1024 in vector registers.
	ByteSizePerLane int
	// contains filtered or unexported fields
}

A SimpleRegisterFile is a Register file that can always read and write registers immediately

func NewSimpleRegisterFile 

func NewSimpleRegisterFile(
	byteSize uint64,
	byteSizePerLane int,
) *SimpleRegisterFile

NewSimpleRegisterFile creates and returns a new SimpleRegisterFile

func (*SimpleRegisterFile) Read 

func (r *SimpleRegisterFile) Read(access RegisterAccess)

func (*SimpleRegisterFile) Write 

func (r *SimpleRegisterFile) Write(access RegisterAccess)

type SubComponent 

type SubComponent interface {
	CanAcceptWave() bool
	AcceptWave(wave *wavefront.Wavefront, now sim.VTimeInSec)
	Run(now sim.VTimeInSec) bool
	IsIdle() bool
	Flush()
}

A SubComponent is an element installed in the compute unit

type VectorMemAccessInfo 

type VectorMemAccessInfo struct {
	ID        string
	Read      *mem.ReadReq
	Write     *mem.WriteReq
	Wavefront *wavefront.Wavefront
	Inst      *wavefront.Inst
	// contains filtered or unexported fields
}

VectorMemAccessInfo defines access info

func (VectorMemAccessInfo) TaskID 

func (i VectorMemAccessInfo) TaskID() string

TaskID returns the ID of the VectorMemAccess transaction

type VectorMemoryUnit 

type VectorMemoryUnit struct {
	// contains filtered or unexported fields
}

A VectorMemoryUnit is the block in a compute unit that can performs vector memory operations.

func NewVectorMemoryUnit 

func NewVectorMemoryUnit(
	cu *ComputeUnit,
	scratchpadPreparer ScratchpadPreparer,
	coalescer coalescer,
) *VectorMemoryUnit

NewVectorMemoryUnit creates a new Vector Memory Unit.

func (*VectorMemoryUnit) AcceptWave 

func (u *VectorMemoryUnit) AcceptWave(
	wave *wavefront.Wavefront,
	now sim.VTimeInSec,
)

AcceptWave moves one wavefront into the read buffer of the Scalar unit

func (*VectorMemoryUnit) CanAcceptWave 

func (u *VectorMemoryUnit) CanAcceptWave() bool

CanAcceptWave checks if the buffer of the read stage is occupied or not

func (*VectorMemoryUnit) Flush 

func (u *VectorMemoryUnit) Flush()

Flush flushes

func (*VectorMemoryUnit) IsIdle 

func (u *VectorMemoryUnit) IsIdle() bool

IsIdle moves one wavefront into the read buffer of the Scalar unit

func (*VectorMemoryUnit) Run 

func (u *VectorMemoryUnit) Run(now sim.VTimeInSec) bool

Run executes three pipeline stages that are controlled by the VectorMemoryUnit

type WavefrontPool 

type WavefrontPool struct {
	Capacity int

	VRegFile sim.Component
	// contains filtered or unexported fields
}

A WavefrontPool holds the wavefronts that will be scheduled in one SIMD unit

func NewWavefrontPool 

func NewWavefrontPool(capacity int) *WavefrontPool

NewWavefrontPool creates and returns a new WavefrontPool

func (*WavefrontPool) AddWf 

func (wfp *WavefrontPool) AddWf(wf *wavefront.Wavefront)

AddWf will add an wavefront to the wavefront pool

func (*WavefrontPool) Availability 

func (wfp *WavefrontPool) Availability() int

Availability returns the number of extra Wavefront that the wavefront pool can hold

func (*WavefrontPool) RemoveWf 

func (wfp *WavefrontPool) RemoveWf(wf *wavefront.Wavefront)

RemoveWf removes a wavefront from a wavefront pool

type WfArbiter 

type WfArbiter interface {
	Arbitrate(wfpools []*WavefrontPool) []*wavefront.Wavefront
}

An WfArbiter can decide which wavefront can take action, in a list of wavefront pools

type WfDispatchEvent 

type WfDispatchEvent struct {
	*sim.EventBase

	ManagedWf  *wavefront.Wavefront
	IsLastInWG bool
	MapWGReq   *protocol.MapWGReq
}

WfDispatchEvent is the event that the dispatcher dispatches a wavefront

func NewWfDispatchEvent 

func NewWfDispatchEvent(
	t sim.VTimeInSec,
	handler sim.Handler,
	Wf *wavefront.Wavefront,
) *WfDispatchEvent

NewWfDispatchEvent creates a new WfDispatchCompletionEvent

type WfDispatcher 

type WfDispatcher interface {
	DispatchWf(
		now sim.VTimeInSec,
		wf *wavefront.Wavefront,
		location protocol.WfDispatchLocation,
	)
}

A WfDispatcher initialize wavefronts

type WfDispatcherImpl 

type WfDispatcherImpl struct {
	Latency int
	// contains filtered or unexported fields
}

A WfDispatcherImpl will register the wavefront in wavefront pool and initialize all the registers

func NewWfDispatcher 

func NewWfDispatcher(cu *ComputeUnit) *WfDispatcherImpl

NewWfDispatcher creates a default WfDispatcher

func (*WfDispatcherImpl) DispatchWf 

func (d *WfDispatcherImpl) DispatchWf(
	now sim.VTimeInSec,
	wf *wavefront.Wavefront,
	location protocol.WfDispatchLocation,
)

DispatchWf starts or continues a wavefront dispatching process.

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