exti

package
v0.0.0-...-168ccc2 Latest Latest
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This package is not in the latest version of its module.

 Go to latest Published: Dec 5, 2021 License: BSD-3-Clause Imports: 4 Imported by: 0

Documentation

Overview

Package exti provides interface to External Interrupt/Event Controller.

Peripheral: EXTI_Periph External Interrupt/Event Controller. Instances: 

EXTI  mmap.EXTI_BASE

Registers: 

0x00 32  IMR1   Interrupt mask register 1.
0x04 32  EMR1   Event mask register 1.
0x08 32  RTSR1  Rising trigger selection register 1.
0x0C 32  FTSR1  Falling trigger selection register 1.
0x10 32  SWIER1 Software interrupt event register 1.
0x14 32  PR1    Pending register 1.
0x20 32  IMR2   Interrupt mask register 2.
0x24 32  EMR2   Event mask register 2.
0x28 32  RTSR2  Rising trigger selection register 2.
0x2C 32  FTSR2  Falling trigger selection register 2.
0x30 32  SWIER2 Software interrupt event register 2.
0x34 32  PR2    Pending register 2.

Import: 

stm32/o/l476xx/mmap

Index

Constants

View Source 
const (
	IM0n  = 0
	IM1n  = 1
	IM2n  = 2
	IM3n  = 3
	IM4n  = 4
	IM5n  = 5
	IM6n  = 6
	IM7n  = 7
	IM8n  = 8
	IM9n  = 9
	IM10n = 10
	IM11n = 11
	IM12n = 12
	IM13n = 13
	IM14n = 14
	IM15n = 15
	IM16n = 16
	IM17n = 17
	IM18n = 18
	IM19n = 19
	IM20n = 20
	IM21n = 21
	IM22n = 22
	IM23n = 23
	IM24n = 24
	IM25n = 25
	IM26n = 26
	IM27n = 27
	IM28n = 28
	IM29n = 29
	IM30n = 30
	IM31n = 31
)
View Source 
const (
	EM0n  = 0
	EM1n  = 1
	EM2n  = 2
	EM3n  = 3
	EM4n  = 4
	EM5n  = 5
	EM6n  = 6
	EM7n  = 7
	EM8n  = 8
	EM9n  = 9
	EM10n = 10
	EM11n = 11
	EM12n = 12
	EM13n = 13
	EM14n = 14
	EM15n = 15
	EM16n = 16
	EM17n = 17
	EM18n = 18
	EM19n = 19
	EM20n = 20
	EM21n = 21
	EM22n = 22
	EM23n = 23
	EM24n = 24
	EM25n = 25
	EM26n = 26
	EM27n = 27
	EM28n = 28
	EM29n = 29
	EM30n = 30
	EM31n = 31
)
View Source 
const (
	RT0n  = 0
	RT1n  = 1
	RT2n  = 2
	RT3n  = 3
	RT4n  = 4
	RT5n  = 5
	RT6n  = 6
	RT7n  = 7
	RT8n  = 8
	RT9n  = 9
	RT10n = 10
	RT11n = 11
	RT12n = 12
	RT13n = 13
	RT14n = 14
	RT15n = 15
	RT16n = 16
	RT18n = 18
	RT19n = 19
	RT20n = 20
	RT21n = 21
	RT22n = 22
)
View Source 
const (
	FT0n  = 0
	FT1n  = 1
	FT2n  = 2
	FT3n  = 3
	FT4n  = 4
	FT5n  = 5
	FT6n  = 6
	FT7n  = 7
	FT8n  = 8
	FT9n  = 9
	FT10n = 10
	FT11n = 11
	FT12n = 12
	FT13n = 13
	FT14n = 14
	FT15n = 15
	FT16n = 16
	FT18n = 18
	FT19n = 19
	FT20n = 20
	FT21n = 21
	FT22n = 22
)
View Source 
const (
	SWI0n  = 0
	SWI1n  = 1
	SWI2n  = 2
	SWI3n  = 3
	SWI4n  = 4
	SWI5n  = 5
	SWI6n  = 6
	SWI7n  = 7
	SWI8n  = 8
	SWI9n  = 9
	SWI10n = 10
	SWI11n = 11
	SWI12n = 12
	SWI13n = 13
	SWI14n = 14
	SWI15n = 15
	SWI16n = 16
	SWI18n = 18
	SWI19n = 19
	SWI20n = 20
	SWI21n = 21
	SWI22n = 22
)
View Source 
const (
	PIF0n  = 0
	PIF1n  = 1
	PIF2n  = 2
	PIF3n  = 3
	PIF4n  = 4
	PIF5n  = 5
	PIF6n  = 6
	PIF7n  = 7
	PIF8n  = 8
	PIF9n  = 9
	PIF10n = 10
	PIF11n = 11
	PIF12n = 12
	PIF13n = 13
	PIF14n = 14
	PIF15n = 15
	PIF16n = 16
	PIF18n = 18
	PIF19n = 19
	PIF20n = 20
	PIF21n = 21
	PIF22n = 22
)
View Source 
const (
	IM32n = 0
	IM33n = 1
	IM34n = 2
	IM35n = 3
	IM36n = 4
	IM37n = 5
	IM38n = 6
	IM39n = 7
)
View Source 
const (
	EM32n = 0
	EM33n = 1
	EM34n = 2
	EM35n = 3
	EM36n = 4
	EM37n = 5
	EM38n = 6
	EM39n = 7
)
View Source 
const (
	RT35n = 3
	RT36n = 4
	RT37n = 5
	RT38n = 6
)
View Source 
const (
	FT35n = 3
	FT36n = 4
	FT37n = 5
	FT38n = 6
)
View Source 
const (
	SWI35n = 3
	SWI36n = 4
	SWI37n = 5
	SWI38n = 6
)
View Source 
const (
	PIF35n = 3
	PIF36n = 4
	PIF37n = 5
	PIF38n = 6
)

Variables

View Source 
var EXTI = (*EXTI_Periph)(unsafe.Pointer(uintptr(mmap.EXTI_BASE)))

Functions

This section is empty.

Types

type EMR1 

type EMR1 uint32
const (
	EM0  EMR1 = 0x01 << 0  //+ Event Mask on line 0.
	EM1  EMR1 = 0x01 << 1  //+ Event Mask on line 1.
	EM2  EMR1 = 0x01 << 2  //+ Event Mask on line 2.
	EM3  EMR1 = 0x01 << 3  //+ Event Mask on line 3.
	EM4  EMR1 = 0x01 << 4  //+ Event Mask on line 4.
	EM5  EMR1 = 0x01 << 5  //+ Event Mask on line 5.
	EM6  EMR1 = 0x01 << 6  //+ Event Mask on line 6.
	EM7  EMR1 = 0x01 << 7  //+ Event Mask on line 7.
	EM8  EMR1 = 0x01 << 8  //+ Event Mask on line 8.
	EM9  EMR1 = 0x01 << 9  //+ Event Mask on line 9.
	EM10 EMR1 = 0x01 << 10 //+ Event Mask on line 10.
	EM11 EMR1 = 0x01 << 11 //+ Event Mask on line 11.
	EM12 EMR1 = 0x01 << 12 //+ Event Mask on line 12.
	EM13 EMR1 = 0x01 << 13 //+ Event Mask on line 13.
	EM14 EMR1 = 0x01 << 14 //+ Event Mask on line 14.
	EM15 EMR1 = 0x01 << 15 //+ Event Mask on line 15.
	EM16 EMR1 = 0x01 << 16 //+ Event Mask on line 16.
	EM17 EMR1 = 0x01 << 17 //+ Event Mask on line 17.
	EM18 EMR1 = 0x01 << 18 //+ Event Mask on line 18.
	EM19 EMR1 = 0x01 << 19 //+ Event Mask on line 19.
	EM20 EMR1 = 0x01 << 20 //+ Event Mask on line 20.
	EM21 EMR1 = 0x01 << 21 //+ Event Mask on line 21.
	EM22 EMR1 = 0x01 << 22 //+ Event Mask on line 22.
	EM23 EMR1 = 0x01 << 23 //+ Event Mask on line 23.
	EM24 EMR1 = 0x01 << 24 //+ Event Mask on line 24.
	EM25 EMR1 = 0x01 << 25 //+ Event Mask on line 25.
	EM26 EMR1 = 0x01 << 26 //+ Event Mask on line 26.
	EM27 EMR1 = 0x01 << 27 //+ Event Mask on line 27.
	EM28 EMR1 = 0x01 << 28 //+ Event Mask on line 28.
	EM29 EMR1 = 0x01 << 29 //+ Event Mask on line 29.
	EM30 EMR1 = 0x01 << 30 //+ Event Mask on line 30.
	EM31 EMR1 = 0x01 << 31 //+ Event Mask on line 31.
)

func (EMR1) Field 

func (b EMR1) Field(mask EMR1) int

func (EMR1) J 

func (mask EMR1) J(v int) EMR1

type EMR2 

type EMR2 uint32
const (
	EM32 EMR2 = 0x01 << 0 //+ Event Mask on line 32.
	EM33 EMR2 = 0x01 << 1 //+ Event Mask on line 33.
	EM34 EMR2 = 0x01 << 2 //+ Event Mask on line 34.
	EM35 EMR2 = 0x01 << 3 //+ Event Mask on line 35.
	EM36 EMR2 = 0x01 << 4 //+ Event Mask on line 36.
	EM37 EMR2 = 0x01 << 5 //+ Event Mask on line 37.
	EM38 EMR2 = 0x01 << 6 //+ Event Mask on line 38.
	EM39 EMR2 = 0x01 << 7 //+ Event Mask on line 39.
)

func (EMR2) Field 

func (b EMR2) Field(mask EMR2) int

func (EMR2) J 

func (mask EMR2) J(v int) EMR2

type EXTI_Periph 

type EXTI_Periph struct {
	IMR1   RIMR1
	EMR1   REMR1
	RTSR1  RRTSR1
	FTSR1  RFTSR1
	SWIER1 RSWIER1
	PR1    RPR1

	IMR2   RIMR2
	EMR2   REMR2
	RTSR2  RRTSR2
	FTSR2  RFTSR2
	SWIER2 RSWIER2
	PR2    RPR2
	// contains filtered or unexported fields
}

func (*EXTI_Periph) BaseAddr 

func (p *EXTI_Periph) BaseAddr() uintptr

func (*EXTI_Periph) EM0 

func (p *EXTI_Periph) EM0() RMEMR1

func (*EXTI_Periph) EM1 

func (p *EXTI_Periph) EM1() RMEMR1

func (*EXTI_Periph) EM10 

func (p *EXTI_Periph) EM10() RMEMR1

func (*EXTI_Periph) EM11 

func (p *EXTI_Periph) EM11() RMEMR1

func (*EXTI_Periph) EM12 

func (p *EXTI_Periph) EM12() RMEMR1

func (*EXTI_Periph) EM13 

func (p *EXTI_Periph) EM13() RMEMR1

func (*EXTI_Periph) EM14 

func (p *EXTI_Periph) EM14() RMEMR1

func (*EXTI_Periph) EM15 

func (p *EXTI_Periph) EM15() RMEMR1

func (*EXTI_Periph) EM16 

func (p *EXTI_Periph) EM16() RMEMR1

func (*EXTI_Periph) EM17 

func (p *EXTI_Periph) EM17() RMEMR1

func (*EXTI_Periph) EM18 

func (p *EXTI_Periph) EM18() RMEMR1

func (*EXTI_Periph) EM19 

func (p *EXTI_Periph) EM19() RMEMR1

func (*EXTI_Periph) EM2 

func (p *EXTI_Periph) EM2() RMEMR1

func (*EXTI_Periph) EM20 

func (p *EXTI_Periph) EM20() RMEMR1

func (*EXTI_Periph) EM21 

func (p *EXTI_Periph) EM21() RMEMR1

func (*EXTI_Periph) EM22 

func (p *EXTI_Periph) EM22() RMEMR1

func (*EXTI_Periph) EM23 

func (p *EXTI_Periph) EM23() RMEMR1

func (*EXTI_Periph) EM24 

func (p *EXTI_Periph) EM24() RMEMR1

func (*EXTI_Periph) EM25 

func (p *EXTI_Periph) EM25() RMEMR1

func (*EXTI_Periph) EM26 

func (p *EXTI_Periph) EM26() RMEMR1

func (*EXTI_Periph) EM27 

func (p *EXTI_Periph) EM27() RMEMR1

func (*EXTI_Periph) EM28 

func (p *EXTI_Periph) EM28() RMEMR1

func (*EXTI_Periph) EM29 

func (p *EXTI_Periph) EM29() RMEMR1

func (*EXTI_Periph) EM3 

func (p *EXTI_Periph) EM3() RMEMR1

func (*EXTI_Periph) EM30 

func (p *EXTI_Periph) EM30() RMEMR1

func (*EXTI_Periph) EM31 

func (p *EXTI_Periph) EM31() RMEMR1

func (*EXTI_Periph) EM32 

func (p *EXTI_Periph) EM32() RMEMR2

func (*EXTI_Periph) EM33 

func (p *EXTI_Periph) EM33() RMEMR2

func (*EXTI_Periph) EM34 

func (p *EXTI_Periph) EM34() RMEMR2

func (*EXTI_Periph) EM35 

func (p *EXTI_Periph) EM35() RMEMR2

func (*EXTI_Periph) EM36 

func (p *EXTI_Periph) EM36() RMEMR2

func (*EXTI_Periph) EM37 

func (p *EXTI_Periph) EM37() RMEMR2

func (*EXTI_Periph) EM38 

func (p *EXTI_Periph) EM38() RMEMR2

func (*EXTI_Periph) EM39 

func (p *EXTI_Periph) EM39() RMEMR2

func (*EXTI_Periph) EM4 

func (p *EXTI_Periph) EM4() RMEMR1

func (*EXTI_Periph) EM5 

func (p *EXTI_Periph) EM5() RMEMR1

func (*EXTI_Periph) EM6 

func (p *EXTI_Periph) EM6() RMEMR1

func (*EXTI_Periph) EM7 

func (p *EXTI_Periph) EM7() RMEMR1

func (*EXTI_Periph) EM8 

func (p *EXTI_Periph) EM8() RMEMR1

func (*EXTI_Periph) EM9 

func (p *EXTI_Periph) EM9() RMEMR1

func (*EXTI_Periph) FT0 

func (p *EXTI_Periph) FT0() RMFTSR1

func (*EXTI_Periph) FT1 

func (p *EXTI_Periph) FT1() RMFTSR1

func (*EXTI_Periph) FT10 

func (p *EXTI_Periph) FT10() RMFTSR1

func (*EXTI_Periph) FT11 

func (p *EXTI_Periph) FT11() RMFTSR1

func (*EXTI_Periph) FT12 

func (p *EXTI_Periph) FT12() RMFTSR1

func (*EXTI_Periph) FT13 

func (p *EXTI_Periph) FT13() RMFTSR1

func (*EXTI_Periph) FT14 

func (p *EXTI_Periph) FT14() RMFTSR1

func (*EXTI_Periph) FT15 

func (p *EXTI_Periph) FT15() RMFTSR1

func (*EXTI_Periph) FT16 

func (p *EXTI_Periph) FT16() RMFTSR1

func (*EXTI_Periph) FT18 

func (p *EXTI_Periph) FT18() RMFTSR1

func (*EXTI_Periph) FT19 

func (p *EXTI_Periph) FT19() RMFTSR1

func (*EXTI_Periph) FT2 

func (p *EXTI_Periph) FT2() RMFTSR1

func (*EXTI_Periph) FT20 

func (p *EXTI_Periph) FT20() RMFTSR1

func (*EXTI_Periph) FT21 

func (p *EXTI_Periph) FT21() RMFTSR1

func (*EXTI_Periph) FT22 

func (p *EXTI_Periph) FT22() RMFTSR1

func (*EXTI_Periph) FT3 

func (p *EXTI_Periph) FT3() RMFTSR1

func (*EXTI_Periph) FT35 

func (p *EXTI_Periph) FT35() RMFTSR2

func (*EXTI_Periph) FT36 

func (p *EXTI_Periph) FT36() RMFTSR2

func (*EXTI_Periph) FT37 

func (p *EXTI_Periph) FT37() RMFTSR2

func (*EXTI_Periph) FT38 

func (p *EXTI_Periph) FT38() RMFTSR2

func (*EXTI_Periph) FT4 

func (p *EXTI_Periph) FT4() RMFTSR1

func (*EXTI_Periph) FT5 

func (p *EXTI_Periph) FT5() RMFTSR1

func (*EXTI_Periph) FT6 

func (p *EXTI_Periph) FT6() RMFTSR1

func (*EXTI_Periph) FT7 

func (p *EXTI_Periph) FT7() RMFTSR1

func (*EXTI_Periph) FT8 

func (p *EXTI_Periph) FT8() RMFTSR1

func (*EXTI_Periph) FT9 

func (p *EXTI_Periph) FT9() RMFTSR1

func (*EXTI_Periph) IM0 

func (p *EXTI_Periph) IM0() RMIMR1

func (*EXTI_Periph) IM1 

func (p *EXTI_Periph) IM1() RMIMR1

func (*EXTI_Periph) IM10 

func (p *EXTI_Periph) IM10() RMIMR1

func (*EXTI_Periph) IM11 

func (p *EXTI_Periph) IM11() RMIMR1

func (*EXTI_Periph) IM12 

func (p *EXTI_Periph) IM12() RMIMR1

func (*EXTI_Periph) IM13 

func (p *EXTI_Periph) IM13() RMIMR1

func (*EXTI_Periph) IM14 

func (p *EXTI_Periph) IM14() RMIMR1

func (*EXTI_Periph) IM15 

func (p *EXTI_Periph) IM15() RMIMR1

func (*EXTI_Periph) IM16 

func (p *EXTI_Periph) IM16() RMIMR1

func (*EXTI_Periph) IM17 

func (p *EXTI_Periph) IM17() RMIMR1

func (*EXTI_Periph) IM18 

func (p *EXTI_Periph) IM18() RMIMR1

func (*EXTI_Periph) IM19 

func (p *EXTI_Periph) IM19() RMIMR1

func (*EXTI_Periph) IM2 

func (p *EXTI_Periph) IM2() RMIMR1

func (*EXTI_Periph) IM20 

func (p *EXTI_Periph) IM20() RMIMR1

func (*EXTI_Periph) IM21 

func (p *EXTI_Periph) IM21() RMIMR1

func (*EXTI_Periph) IM22 

func (p *EXTI_Periph) IM22() RMIMR1

func (*EXTI_Periph) IM23 

func (p *EXTI_Periph) IM23() RMIMR1

func (*EXTI_Periph) IM24 

func (p *EXTI_Periph) IM24() RMIMR1

func (*EXTI_Periph) IM25 

func (p *EXTI_Periph) IM25() RMIMR1

func (*EXTI_Periph) IM26 

func (p *EXTI_Periph) IM26() RMIMR1

func (*EXTI_Periph) IM27 

func (p *EXTI_Periph) IM27() RMIMR1

func (*EXTI_Periph) IM28 

func (p *EXTI_Periph) IM28() RMIMR1

func (*EXTI_Periph) IM29 

func (p *EXTI_Periph) IM29() RMIMR1

func (*EXTI_Periph) IM3 

func (p *EXTI_Periph) IM3() RMIMR1

func (*EXTI_Periph) IM30 

func (p *EXTI_Periph) IM30() RMIMR1

func (*EXTI_Periph) IM31 

func (p *EXTI_Periph) IM31() RMIMR1

func (*EXTI_Periph) IM32 

func (p *EXTI_Periph) IM32() RMIMR2

func (*EXTI_Periph) IM33 

func (p *EXTI_Periph) IM33() RMIMR2

func (*EXTI_Periph) IM34 

func (p *EXTI_Periph) IM34() RMIMR2

func (*EXTI_Periph) IM35 

func (p *EXTI_Periph) IM35() RMIMR2

func (*EXTI_Periph) IM36 

func (p *EXTI_Periph) IM36() RMIMR2

func (*EXTI_Periph) IM37 

func (p *EXTI_Periph) IM37() RMIMR2

func (*EXTI_Periph) IM38 

func (p *EXTI_Periph) IM38() RMIMR2

func (*EXTI_Periph) IM39 

func (p *EXTI_Periph) IM39() RMIMR2

func (*EXTI_Periph) IM4 

func (p *EXTI_Periph) IM4() RMIMR1

func (*EXTI_Periph) IM5 

func (p *EXTI_Periph) IM5() RMIMR1

func (*EXTI_Periph) IM6 

func (p *EXTI_Periph) IM6() RMIMR1

func (*EXTI_Periph) IM7 

func (p *EXTI_Periph) IM7() RMIMR1

func (*EXTI_Periph) IM8 

func (p *EXTI_Periph) IM8() RMIMR1

func (*EXTI_Periph) IM9 

func (p *EXTI_Periph) IM9() RMIMR1

func (*EXTI_Periph) PIF0 

func (p *EXTI_Periph) PIF0() RMPR1

func (*EXTI_Periph) PIF1 

func (p *EXTI_Periph) PIF1() RMPR1

func (*EXTI_Periph) PIF10 

func (p *EXTI_Periph) PIF10() RMPR1

func (*EXTI_Periph) PIF11 

func (p *EXTI_Periph) PIF11() RMPR1

func (*EXTI_Periph) PIF12 

func (p *EXTI_Periph) PIF12() RMPR1

func (*EXTI_Periph) PIF13 

func (p *EXTI_Periph) PIF13() RMPR1

func (*EXTI_Periph) PIF14 

func (p *EXTI_Periph) PIF14() RMPR1

func (*EXTI_Periph) PIF15 

func (p *EXTI_Periph) PIF15() RMPR1

func (*EXTI_Periph) PIF16 

func (p *EXTI_Periph) PIF16() RMPR1

func (*EXTI_Periph) PIF18 

func (p *EXTI_Periph) PIF18() RMPR1

func (*EXTI_Periph) PIF19 

func (p *EXTI_Periph) PIF19() RMPR1

func (*EXTI_Periph) PIF2 

func (p *EXTI_Periph) PIF2() RMPR1

func (*EXTI_Periph) PIF20 

func (p *EXTI_Periph) PIF20() RMPR1

func (*EXTI_Periph) PIF21 

func (p *EXTI_Periph) PIF21() RMPR1

func (*EXTI_Periph) PIF22 

func (p *EXTI_Periph) PIF22() RMPR1

func (*EXTI_Periph) PIF3 

func (p *EXTI_Periph) PIF3() RMPR1

func (*EXTI_Periph) PIF35 

func (p *EXTI_Periph) PIF35() RMPR2

func (*EXTI_Periph) PIF36 

func (p *EXTI_Periph) PIF36() RMPR2

func (*EXTI_Periph) PIF37 

func (p *EXTI_Periph) PIF37() RMPR2

func (*EXTI_Periph) PIF38 

func (p *EXTI_Periph) PIF38() RMPR2

func (*EXTI_Periph) PIF4 

func (p *EXTI_Periph) PIF4() RMPR1

func (*EXTI_Periph) PIF5 

func (p *EXTI_Periph) PIF5() RMPR1

func (*EXTI_Periph) PIF6 

func (p *EXTI_Periph) PIF6() RMPR1

func (*EXTI_Periph) PIF7 

func (p *EXTI_Periph) PIF7() RMPR1

func (*EXTI_Periph) PIF8 

func (p *EXTI_Periph) PIF8() RMPR1

func (*EXTI_Periph) PIF9 

func (p *EXTI_Periph) PIF9() RMPR1

func (*EXTI_Periph) RT0 

func (p *EXTI_Periph) RT0() RMRTSR1

func (*EXTI_Periph) RT1 

func (p *EXTI_Periph) RT1() RMRTSR1

func (*EXTI_Periph) RT10 

func (p *EXTI_Periph) RT10() RMRTSR1

func (*EXTI_Periph) RT11 

func (p *EXTI_Periph) RT11() RMRTSR1

func (*EXTI_Periph) RT12 

func (p *EXTI_Periph) RT12() RMRTSR1

func (*EXTI_Periph) RT13 

func (p *EXTI_Periph) RT13() RMRTSR1

func (*EXTI_Periph) RT14 

func (p *EXTI_Periph) RT14() RMRTSR1

func (*EXTI_Periph) RT15 

func (p *EXTI_Periph) RT15() RMRTSR1

func (*EXTI_Periph) RT16 

func (p *EXTI_Periph) RT16() RMRTSR1

func (*EXTI_Periph) RT18 

func (p *EXTI_Periph) RT18() RMRTSR1

func (*EXTI_Periph) RT19 

func (p *EXTI_Periph) RT19() RMRTSR1

func (*EXTI_Periph) RT2 

func (p *EXTI_Periph) RT2() RMRTSR1

func (*EXTI_Periph) RT20 

func (p *EXTI_Periph) RT20() RMRTSR1

func (*EXTI_Periph) RT21 

func (p *EXTI_Periph) RT21() RMRTSR1

func (*EXTI_Periph) RT22 

func (p *EXTI_Periph) RT22() RMRTSR1

func (*EXTI_Periph) RT3 

func (p *EXTI_Periph) RT3() RMRTSR1

func (*EXTI_Periph) RT35 

func (p *EXTI_Periph) RT35() RMRTSR2

func (*EXTI_Periph) RT36 

func (p *EXTI_Periph) RT36() RMRTSR2

func (*EXTI_Periph) RT37 

func (p *EXTI_Periph) RT37() RMRTSR2

func (*EXTI_Periph) RT38 

func (p *EXTI_Periph) RT38() RMRTSR2

func (*EXTI_Periph) RT4 

func (p *EXTI_Periph) RT4() RMRTSR1

func (*EXTI_Periph) RT5 

func (p *EXTI_Periph) RT5() RMRTSR1

func (*EXTI_Periph) RT6 

func (p *EXTI_Periph) RT6() RMRTSR1

func (*EXTI_Periph) RT7 

func (p *EXTI_Periph) RT7() RMRTSR1

func (*EXTI_Periph) RT8 

func (p *EXTI_Periph) RT8() RMRTSR1

func (*EXTI_Periph) RT9 

func (p *EXTI_Periph) RT9() RMRTSR1

func (*EXTI_Periph) SWI0 

func (p *EXTI_Periph) SWI0() RMSWIER1

func (*EXTI_Periph) SWI1 

func (p *EXTI_Periph) SWI1() RMSWIER1

func (*EXTI_Periph) SWI10 

func (p *EXTI_Periph) SWI10() RMSWIER1

func (*EXTI_Periph) SWI11 

func (p *EXTI_Periph) SWI11() RMSWIER1

func (*EXTI_Periph) SWI12 

func (p *EXTI_Periph) SWI12() RMSWIER1

func (*EXTI_Periph) SWI13 

func (p *EXTI_Periph) SWI13() RMSWIER1

func (*EXTI_Periph) SWI14 

func (p *EXTI_Periph) SWI14() RMSWIER1

func (*EXTI_Periph) SWI15 

func (p *EXTI_Periph) SWI15() RMSWIER1

func (*EXTI_Periph) SWI16 

func (p *EXTI_Periph) SWI16() RMSWIER1

func (*EXTI_Periph) SWI18 

func (p *EXTI_Periph) SWI18() RMSWIER1

func (*EXTI_Periph) SWI19 

func (p *EXTI_Periph) SWI19() RMSWIER1

func (*EXTI_Periph) SWI2 

func (p *EXTI_Periph) SWI2() RMSWIER1

func (*EXTI_Periph) SWI20 

func (p *EXTI_Periph) SWI20() RMSWIER1

func (*EXTI_Periph) SWI21 

func (p *EXTI_Periph) SWI21() RMSWIER1

func (*EXTI_Periph) SWI22 

func (p *EXTI_Periph) SWI22() RMSWIER1

func (*EXTI_Periph) SWI3 

func (p *EXTI_Periph) SWI3() RMSWIER1

func (*EXTI_Periph) SWI35 

func (p *EXTI_Periph) SWI35() RMSWIER2

func (*EXTI_Periph) SWI36 

func (p *EXTI_Periph) SWI36() RMSWIER2

func (*EXTI_Periph) SWI37 

func (p *EXTI_Periph) SWI37() RMSWIER2

func (*EXTI_Periph) SWI38 

func (p *EXTI_Periph) SWI38() RMSWIER2

func (*EXTI_Periph) SWI4 

func (p *EXTI_Periph) SWI4() RMSWIER1

func (*EXTI_Periph) SWI5 

func (p *EXTI_Periph) SWI5() RMSWIER1

func (*EXTI_Periph) SWI6 

func (p *EXTI_Periph) SWI6() RMSWIER1

func (*EXTI_Periph) SWI7 

func (p *EXTI_Periph) SWI7() RMSWIER1

func (*EXTI_Periph) SWI8 

func (p *EXTI_Periph) SWI8() RMSWIER1

func (*EXTI_Periph) SWI9 

func (p *EXTI_Periph) SWI9() RMSWIER1

type FTSR1 

type FTSR1 uint32
const (
	FT0  FTSR1 = 0x01 << 0  //+ Falling trigger event configuration bit of line 0.
	FT1  FTSR1 = 0x01 << 1  //+ Falling trigger event configuration bit of line 1.
	FT2  FTSR1 = 0x01 << 2  //+ Falling trigger event configuration bit of line 2.
	FT3  FTSR1 = 0x01 << 3  //+ Falling trigger event configuration bit of line 3.
	FT4  FTSR1 = 0x01 << 4  //+ Falling trigger event configuration bit of line 4.
	FT5  FTSR1 = 0x01 << 5  //+ Falling trigger event configuration bit of line 5.
	FT6  FTSR1 = 0x01 << 6  //+ Falling trigger event configuration bit of line 6.
	FT7  FTSR1 = 0x01 << 7  //+ Falling trigger event configuration bit of line 7.
	FT8  FTSR1 = 0x01 << 8  //+ Falling trigger event configuration bit of line 8.
	FT9  FTSR1 = 0x01 << 9  //+ Falling trigger event configuration bit of line 9.
	FT10 FTSR1 = 0x01 << 10 //+ Falling trigger event configuration bit of line 10.
	FT11 FTSR1 = 0x01 << 11 //+ Falling trigger event configuration bit of line 11.
	FT12 FTSR1 = 0x01 << 12 //+ Falling trigger event configuration bit of line 12.
	FT13 FTSR1 = 0x01 << 13 //+ Falling trigger event configuration bit of line 13.
	FT14 FTSR1 = 0x01 << 14 //+ Falling trigger event configuration bit of line 14.
	FT15 FTSR1 = 0x01 << 15 //+ Falling trigger event configuration bit of line 15.
	FT16 FTSR1 = 0x01 << 16 //+ Falling trigger event configuration bit of line 16.
	FT18 FTSR1 = 0x01 << 18 //+ Falling trigger event configuration bit of line 18.
	FT19 FTSR1 = 0x01 << 19 //+ Falling trigger event configuration bit of line 19.
	FT20 FTSR1 = 0x01 << 20 //+ Falling trigger event configuration bit of line 20.
	FT21 FTSR1 = 0x01 << 21 //+ Falling trigger event configuration bit of line 21.
	FT22 FTSR1 = 0x01 << 22 //+ Falling trigger event configuration bit of line 22.
)

func (FTSR1) Field 

func (b FTSR1) Field(mask FTSR1) int

func (FTSR1) J 

func (mask FTSR1) J(v int) FTSR1

type FTSR2 

type FTSR2 uint32
const (
	FT35 FTSR2 = 0x01 << 3 //+ Falling trigger event configuration bit of line 35.
	FT36 FTSR2 = 0x01 << 4 //+ Falling trigger event configuration bit of line 36.
	FT37 FTSR2 = 0x01 << 5 //+ Falling trigger event configuration bit of line 37.
	FT38 FTSR2 = 0x01 << 6 //+ Falling trigger event configuration bit of line 38.
)

func (FTSR2) Field 

func (b FTSR2) Field(mask FTSR2) int

func (FTSR2) J 

func (mask FTSR2) J(v int) FTSR2

type IMR1 

type IMR1 uint32
const (
	IM0     IMR1 = 0x01 << 0       //+ Interrupt Mask on line 0.
	IM1     IMR1 = 0x01 << 1       //+ Interrupt Mask on line 1.
	IM2     IMR1 = 0x01 << 2       //+ Interrupt Mask on line 2.
	IM3     IMR1 = 0x01 << 3       //+ Interrupt Mask on line 3.
	IM4     IMR1 = 0x01 << 4       //+ Interrupt Mask on line 4.
	IM5     IMR1 = 0x01 << 5       //+ Interrupt Mask on line 5.
	IM6     IMR1 = 0x01 << 6       //+ Interrupt Mask on line 6.
	IM7     IMR1 = 0x01 << 7       //+ Interrupt Mask on line 7.
	IM8     IMR1 = 0x01 << 8       //+ Interrupt Mask on line 8.
	IM9     IMR1 = 0x01 << 9       //+ Interrupt Mask on line 9.
	IM10    IMR1 = 0x01 << 10      //+ Interrupt Mask on line 10.
	IM11    IMR1 = 0x01 << 11      //+ Interrupt Mask on line 11.
	IM12    IMR1 = 0x01 << 12      //+ Interrupt Mask on line 12.
	IM13    IMR1 = 0x01 << 13      //+ Interrupt Mask on line 13.
	IM14    IMR1 = 0x01 << 14      //+ Interrupt Mask on line 14.
	IM15    IMR1 = 0x01 << 15      //+ Interrupt Mask on line 15.
	IM16    IMR1 = 0x01 << 16      //+ Interrupt Mask on line 16.
	IM17    IMR1 = 0x01 << 17      //+ Interrupt Mask on line 17.
	IM18    IMR1 = 0x01 << 18      //+ Interrupt Mask on line 18.
	IM19    IMR1 = 0x01 << 19      //+ Interrupt Mask on line 19.
	IM20    IMR1 = 0x01 << 20      //+ Interrupt Mask on line 20.
	IM21    IMR1 = 0x01 << 21      //+ Interrupt Mask on line 21.
	IM22    IMR1 = 0x01 << 22      //+ Interrupt Mask on line 22.
	IM23    IMR1 = 0x01 << 23      //+ Interrupt Mask on line 23.
	IM24    IMR1 = 0x01 << 24      //+ Interrupt Mask on line 24.
	IM25    IMR1 = 0x01 << 25      //+ Interrupt Mask on line 25.
	IM26    IMR1 = 0x01 << 26      //+ Interrupt Mask on line 26.
	IM27    IMR1 = 0x01 << 27      //+ Interrupt Mask on line 27.
	IM28    IMR1 = 0x01 << 28      //+ Interrupt Mask on line 28.
	IM29    IMR1 = 0x01 << 29      //+ Interrupt Mask on line 29.
	IM30    IMR1 = 0x01 << 30      //+ Interrupt Mask on line 30.
	IM31    IMR1 = 0x01 << 31      //+ Interrupt Mask on line 31.
	IMR1ALL IMR1 = 0xFFFFFFFF << 0 //  Interrupt Mask All.
)

func (IMR1) Field 

func (b IMR1) Field(mask IMR1) int

func (IMR1) J 

func (mask IMR1) J(v int) IMR1

type IMR2 

type IMR2 uint32
const (
	IM32    IMR2 = 0x01 << 0 //+ Interrupt Mask on line 32.
	IM33    IMR2 = 0x01 << 1 //+ Interrupt Mask on line 33.
	IM34    IMR2 = 0x01 << 2 //+ Interrupt Mask on line 34.
	IM35    IMR2 = 0x01 << 3 //+ Interrupt Mask on line 35.
	IM36    IMR2 = 0x01 << 4 //+ Interrupt Mask on line 36.
	IM37    IMR2 = 0x01 << 5 //+ Interrupt Mask on line 37.
	IM38    IMR2 = 0x01 << 6 //+ Interrupt Mask on line 38.
	IM39    IMR2 = 0x01 << 7 //+ Interrupt Mask on line 39.
	IMR2ALL IMR2 = 0xFF << 0 //  Interrupt Mask all.
)

func (IMR2) Field 

func (b IMR2) Field(mask IMR2) int

func (IMR2) J 

func (mask IMR2) J(v int) IMR2

type PR1 

type PR1 uint32
const (
	PIF0  PR1 = 0x01 << 0  //+ Pending bit for line 0.
	PIF1  PR1 = 0x01 << 1  //+ Pending bit for line 1.
	PIF2  PR1 = 0x01 << 2  //+ Pending bit for line 2.
	PIF3  PR1 = 0x01 << 3  //+ Pending bit for line 3.
	PIF4  PR1 = 0x01 << 4  //+ Pending bit for line 4.
	PIF5  PR1 = 0x01 << 5  //+ Pending bit for line 5.
	PIF6  PR1 = 0x01 << 6  //+ Pending bit for line 6.
	PIF7  PR1 = 0x01 << 7  //+ Pending bit for line 7.
	PIF8  PR1 = 0x01 << 8  //+ Pending bit for line 8.
	PIF9  PR1 = 0x01 << 9  //+ Pending bit for line 9.
	PIF10 PR1 = 0x01 << 10 //+ Pending bit for line 10.
	PIF11 PR1 = 0x01 << 11 //+ Pending bit for line 11.
	PIF12 PR1 = 0x01 << 12 //+ Pending bit for line 12.
	PIF13 PR1 = 0x01 << 13 //+ Pending bit for line 13.
	PIF14 PR1 = 0x01 << 14 //+ Pending bit for line 14.
	PIF15 PR1 = 0x01 << 15 //+ Pending bit for line 15.
	PIF16 PR1 = 0x01 << 16 //+ Pending bit for line 16.
	PIF18 PR1 = 0x01 << 18 //+ Pending bit for line 18.
	PIF19 PR1 = 0x01 << 19 //+ Pending bit for line 19.
	PIF20 PR1 = 0x01 << 20 //+ Pending bit for line 20.
	PIF21 PR1 = 0x01 << 21 //+ Pending bit for line 21.
	PIF22 PR1 = 0x01 << 22 //+ Pending bit for line 22.
)

func (PR1) Field 

func (b PR1) Field(mask PR1) int

func (PR1) J 

func (mask PR1) J(v int) PR1

type PR2 

type PR2 uint32
const (
	PIF35 PR2 = 0x01 << 3 //+ Pending bit for line 35.
	PIF36 PR2 = 0x01 << 4 //+ Pending bit for line 36.
	PIF37 PR2 = 0x01 << 5 //+ Pending bit for line 37.
	PIF38 PR2 = 0x01 << 6 //+ Pending bit for line 38.
)

func (PR2) Field 

func (b PR2) Field(mask PR2) int

func (PR2) J 

func (mask PR2) J(v int) PR2

type REMR1 

type REMR1 struct{ mmio.U32 }

func (*REMR1) AtomicClearBits 

func (r *REMR1) AtomicClearBits(mask EMR1)

func (*REMR1) AtomicSetBits 

func (r *REMR1) AtomicSetBits(mask EMR1)

func (*REMR1) AtomicStoreBits 

func (r *REMR1) AtomicStoreBits(mask, b EMR1)

func (*REMR1) Bits 

func (r *REMR1) Bits(mask EMR1) EMR1

func (*REMR1) ClearBits 

func (r *REMR1) ClearBits(mask EMR1)

func (*REMR1) Load 

func (r *REMR1) Load() EMR1

func (*REMR1) SetBits 

func (r *REMR1) SetBits(mask EMR1)

func (*REMR1) Store 

func (r *REMR1) Store(b EMR1)

func (*REMR1) StoreBits 

func (r *REMR1) StoreBits(mask, b EMR1)

type REMR2 

type REMR2 struct{ mmio.U32 }

func (*REMR2) AtomicClearBits 

func (r *REMR2) AtomicClearBits(mask EMR2)

func (*REMR2) AtomicSetBits 

func (r *REMR2) AtomicSetBits(mask EMR2)

func (*REMR2) AtomicStoreBits 

func (r *REMR2) AtomicStoreBits(mask, b EMR2)

func (*REMR2) Bits 

func (r *REMR2) Bits(mask EMR2) EMR2

func (*REMR2) ClearBits 

func (r *REMR2) ClearBits(mask EMR2)

func (*REMR2) Load 

func (r *REMR2) Load() EMR2

func (*REMR2) SetBits 

func (r *REMR2) SetBits(mask EMR2)

func (*REMR2) Store 

func (r *REMR2) Store(b EMR2)

func (*REMR2) StoreBits 

func (r *REMR2) StoreBits(mask, b EMR2)

type RFTSR1 

type RFTSR1 struct{ mmio.U32 }

func (*RFTSR1) AtomicClearBits 

func (r *RFTSR1) AtomicClearBits(mask FTSR1)

func (*RFTSR1) AtomicSetBits 

func (r *RFTSR1) AtomicSetBits(mask FTSR1)

func (*RFTSR1) AtomicStoreBits 

func (r *RFTSR1) AtomicStoreBits(mask, b FTSR1)

func (*RFTSR1) Bits 

func (r *RFTSR1) Bits(mask FTSR1) FTSR1

func (*RFTSR1) ClearBits 

func (r *RFTSR1) ClearBits(mask FTSR1)

func (*RFTSR1) Load 

func (r *RFTSR1) Load() FTSR1

func (*RFTSR1) SetBits 

func (r *RFTSR1) SetBits(mask FTSR1)

func (*RFTSR1) Store 

func (r *RFTSR1) Store(b FTSR1)

func (*RFTSR1) StoreBits 

func (r *RFTSR1) StoreBits(mask, b FTSR1)

type RFTSR2 

type RFTSR2 struct{ mmio.U32 }

func (*RFTSR2) AtomicClearBits 

func (r *RFTSR2) AtomicClearBits(mask FTSR2)

func (*RFTSR2) AtomicSetBits 

func (r *RFTSR2) AtomicSetBits(mask FTSR2)

func (*RFTSR2) AtomicStoreBits 

func (r *RFTSR2) AtomicStoreBits(mask, b FTSR2)

func (*RFTSR2) Bits 

func (r *RFTSR2) Bits(mask FTSR2) FTSR2

func (*RFTSR2) ClearBits 

func (r *RFTSR2) ClearBits(mask FTSR2)

func (*RFTSR2) Load 

func (r *RFTSR2) Load() FTSR2

func (*RFTSR2) SetBits 

func (r *RFTSR2) SetBits(mask FTSR2)

func (*RFTSR2) Store 

func (r *RFTSR2) Store(b FTSR2)

func (*RFTSR2) StoreBits 

func (r *RFTSR2) StoreBits(mask, b FTSR2)

type RIMR1 

type RIMR1 struct{ mmio.U32 }

func (*RIMR1) AtomicClearBits 

func (r *RIMR1) AtomicClearBits(mask IMR1)

func (*RIMR1) AtomicSetBits 

func (r *RIMR1) AtomicSetBits(mask IMR1)

func (*RIMR1) AtomicStoreBits 

func (r *RIMR1) AtomicStoreBits(mask, b IMR1)

func (*RIMR1) Bits 

func (r *RIMR1) Bits(mask IMR1) IMR1

func (*RIMR1) ClearBits 

func (r *RIMR1) ClearBits(mask IMR1)

func (*RIMR1) Load 

func (r *RIMR1) Load() IMR1

func (*RIMR1) SetBits 

func (r *RIMR1) SetBits(mask IMR1)

func (*RIMR1) Store 

func (r *RIMR1) Store(b IMR1)

func (*RIMR1) StoreBits 

func (r *RIMR1) StoreBits(mask, b IMR1)

type RIMR2 

type RIMR2 struct{ mmio.U32 }

func (*RIMR2) AtomicClearBits 

func (r *RIMR2) AtomicClearBits(mask IMR2)

func (*RIMR2) AtomicSetBits 

func (r *RIMR2) AtomicSetBits(mask IMR2)

func (*RIMR2) AtomicStoreBits 

func (r *RIMR2) AtomicStoreBits(mask, b IMR2)

func (*RIMR2) Bits 

func (r *RIMR2) Bits(mask IMR2) IMR2

func (*RIMR2) ClearBits 

func (r *RIMR2) ClearBits(mask IMR2)

func (*RIMR2) Load 

func (r *RIMR2) Load() IMR2

func (*RIMR2) SetBits 

func (r *RIMR2) SetBits(mask IMR2)

func (*RIMR2) Store 

func (r *RIMR2) Store(b IMR2)

func (*RIMR2) StoreBits 

func (r *RIMR2) StoreBits(mask, b IMR2)

type RMEMR1 

type RMEMR1 struct{ mmio.UM32 }

func (RMEMR1) Load 

func (rm RMEMR1) Load() EMR1

func (RMEMR1) Store 

func (rm RMEMR1) Store(b EMR1)

type RMEMR2 

type RMEMR2 struct{ mmio.UM32 }

func (RMEMR2) Load 

func (rm RMEMR2) Load() EMR2

func (RMEMR2) Store 

func (rm RMEMR2) Store(b EMR2)

type RMFTSR1 

type RMFTSR1 struct{ mmio.UM32 }

func (RMFTSR1) Load 

func (rm RMFTSR1) Load() FTSR1

func (RMFTSR1) Store 

func (rm RMFTSR1) Store(b FTSR1)

type RMFTSR2 

type RMFTSR2 struct{ mmio.UM32 }

func (RMFTSR2) Load 

func (rm RMFTSR2) Load() FTSR2

func (RMFTSR2) Store 

func (rm RMFTSR2) Store(b FTSR2)

type RMIMR1 

type RMIMR1 struct{ mmio.UM32 }

func (RMIMR1) Load 

func (rm RMIMR1) Load() IMR1

func (RMIMR1) Store 

func (rm RMIMR1) Store(b IMR1)

type RMIMR2 

type RMIMR2 struct{ mmio.UM32 }

func (RMIMR2) Load 

func (rm RMIMR2) Load() IMR2

func (RMIMR2) Store 

func (rm RMIMR2) Store(b IMR2)

type RMPR1 

type RMPR1 struct{ mmio.UM32 }

func (RMPR1) Load 

func (rm RMPR1) Load() PR1

func (RMPR1) Store 

func (rm RMPR1) Store(b PR1)

type RMPR2 

type RMPR2 struct{ mmio.UM32 }

func (RMPR2) Load 

func (rm RMPR2) Load() PR2

func (RMPR2) Store 

func (rm RMPR2) Store(b PR2)

type RMRTSR1 

type RMRTSR1 struct{ mmio.UM32 }

func (RMRTSR1) Load 

func (rm RMRTSR1) Load() RTSR1

func (RMRTSR1) Store 

func (rm RMRTSR1) Store(b RTSR1)

type RMRTSR2 

type RMRTSR2 struct{ mmio.UM32 }

func (RMRTSR2) Load 

func (rm RMRTSR2) Load() RTSR2

func (RMRTSR2) Store 

func (rm RMRTSR2) Store(b RTSR2)

type RMSWIER1 

type RMSWIER1 struct{ mmio.UM32 }

func (RMSWIER1) Load 

func (rm RMSWIER1) Load() SWIER1

func (RMSWIER1) Store 

func (rm RMSWIER1) Store(b SWIER1)

type RMSWIER2 

type RMSWIER2 struct{ mmio.UM32 }

func (RMSWIER2) Load 

func (rm RMSWIER2) Load() SWIER2

func (RMSWIER2) Store 

func (rm RMSWIER2) Store(b SWIER2)

type RPR1 

type RPR1 struct{ mmio.U32 }

func (*RPR1) AtomicClearBits 

func (r *RPR1) AtomicClearBits(mask PR1)

func (*RPR1) AtomicSetBits 

func (r *RPR1) AtomicSetBits(mask PR1)

func (*RPR1) AtomicStoreBits 

func (r *RPR1) AtomicStoreBits(mask, b PR1)

func (*RPR1) Bits 

func (r *RPR1) Bits(mask PR1) PR1

func (*RPR1) ClearBits 

func (r *RPR1) ClearBits(mask PR1)

func (*RPR1) Load 

func (r *RPR1) Load() PR1

func (*RPR1) SetBits 

func (r *RPR1) SetBits(mask PR1)

func (*RPR1) Store 

func (r *RPR1) Store(b PR1)

func (*RPR1) StoreBits 

func (r *RPR1) StoreBits(mask, b PR1)

type RPR2 

type RPR2 struct{ mmio.U32 }

func (*RPR2) AtomicClearBits 

func (r *RPR2) AtomicClearBits(mask PR2)

func (*RPR2) AtomicSetBits 

func (r *RPR2) AtomicSetBits(mask PR2)

func (*RPR2) AtomicStoreBits 

func (r *RPR2) AtomicStoreBits(mask, b PR2)

func (*RPR2) Bits 

func (r *RPR2) Bits(mask PR2) PR2

func (*RPR2) ClearBits 

func (r *RPR2) ClearBits(mask PR2)

func (*RPR2) Load 

func (r *RPR2) Load() PR2

func (*RPR2) SetBits 

func (r *RPR2) SetBits(mask PR2)

func (*RPR2) Store 

func (r *RPR2) Store(b PR2)

func (*RPR2) StoreBits 

func (r *RPR2) StoreBits(mask, b PR2)

type RRTSR1 

type RRTSR1 struct{ mmio.U32 }

func (*RRTSR1) AtomicClearBits 

func (r *RRTSR1) AtomicClearBits(mask RTSR1)

func (*RRTSR1) AtomicSetBits 

func (r *RRTSR1) AtomicSetBits(mask RTSR1)

func (*RRTSR1) AtomicStoreBits 

func (r *RRTSR1) AtomicStoreBits(mask, b RTSR1)

func (*RRTSR1) Bits 

func (r *RRTSR1) Bits(mask RTSR1) RTSR1

func (*RRTSR1) ClearBits 

func (r *RRTSR1) ClearBits(mask RTSR1)

func (*RRTSR1) Load 

func (r *RRTSR1) Load() RTSR1

func (*RRTSR1) SetBits 

func (r *RRTSR1) SetBits(mask RTSR1)

func (*RRTSR1) Store 

func (r *RRTSR1) Store(b RTSR1)

func (*RRTSR1) StoreBits 

func (r *RRTSR1) StoreBits(mask, b RTSR1)

type RRTSR2 

type RRTSR2 struct{ mmio.U32 }

func (*RRTSR2) AtomicClearBits 

func (r *RRTSR2) AtomicClearBits(mask RTSR2)

func (*RRTSR2) AtomicSetBits 

func (r *RRTSR2) AtomicSetBits(mask RTSR2)

func (*RRTSR2) AtomicStoreBits 

func (r *RRTSR2) AtomicStoreBits(mask, b RTSR2)

func (*RRTSR2) Bits 

func (r *RRTSR2) Bits(mask RTSR2) RTSR2

func (*RRTSR2) ClearBits 

func (r *RRTSR2) ClearBits(mask RTSR2)

func (*RRTSR2) Load 

func (r *RRTSR2) Load() RTSR2

func (*RRTSR2) SetBits 

func (r *RRTSR2) SetBits(mask RTSR2)

func (*RRTSR2) Store 

func (r *RRTSR2) Store(b RTSR2)

func (*RRTSR2) StoreBits 

func (r *RRTSR2) StoreBits(mask, b RTSR2)

type RSWIER1 

type RSWIER1 struct{ mmio.U32 }

func (*RSWIER1) AtomicClearBits 

func (r *RSWIER1) AtomicClearBits(mask SWIER1)

func (*RSWIER1) AtomicSetBits 

func (r *RSWIER1) AtomicSetBits(mask SWIER1)

func (*RSWIER1) AtomicStoreBits 

func (r *RSWIER1) AtomicStoreBits(mask, b SWIER1)

func (*RSWIER1) Bits 

func (r *RSWIER1) Bits(mask SWIER1) SWIER1

func (*RSWIER1) ClearBits 

func (r *RSWIER1) ClearBits(mask SWIER1)

func (*RSWIER1) Load 

func (r *RSWIER1) Load() SWIER1

func (*RSWIER1) SetBits 

func (r *RSWIER1) SetBits(mask SWIER1)

func (*RSWIER1) Store 

func (r *RSWIER1) Store(b SWIER1)

func (*RSWIER1) StoreBits 

func (r *RSWIER1) StoreBits(mask, b SWIER1)

type RSWIER2 

type RSWIER2 struct{ mmio.U32 }

func (*RSWIER2) AtomicClearBits 

func (r *RSWIER2) AtomicClearBits(mask SWIER2)

func (*RSWIER2) AtomicSetBits 

func (r *RSWIER2) AtomicSetBits(mask SWIER2)

func (*RSWIER2) AtomicStoreBits 

func (r *RSWIER2) AtomicStoreBits(mask, b SWIER2)

func (*RSWIER2) Bits 

func (r *RSWIER2) Bits(mask SWIER2) SWIER2

func (*RSWIER2) ClearBits 

func (r *RSWIER2) ClearBits(mask SWIER2)

func (*RSWIER2) Load 

func (r *RSWIER2) Load() SWIER2

func (*RSWIER2) SetBits 

func (r *RSWIER2) SetBits(mask SWIER2)

func (*RSWIER2) Store 

func (r *RSWIER2) Store(b SWIER2)

func (*RSWIER2) StoreBits 

func (r *RSWIER2) StoreBits(mask, b SWIER2)

type RTSR1 

type RTSR1 uint32
const (
	RT0  RTSR1 = 0x01 << 0  //+ Rising trigger event configuration bit of line 0.
	RT1  RTSR1 = 0x01 << 1  //+ Rising trigger event configuration bit of line 1.
	RT2  RTSR1 = 0x01 << 2  //+ Rising trigger event configuration bit of line 2.
	RT3  RTSR1 = 0x01 << 3  //+ Rising trigger event configuration bit of line 3.
	RT4  RTSR1 = 0x01 << 4  //+ Rising trigger event configuration bit of line 4.
	RT5  RTSR1 = 0x01 << 5  //+ Rising trigger event configuration bit of line 5.
	RT6  RTSR1 = 0x01 << 6  //+ Rising trigger event configuration bit of line 6.
	RT7  RTSR1 = 0x01 << 7  //+ Rising trigger event configuration bit of line 7.
	RT8  RTSR1 = 0x01 << 8  //+ Rising trigger event configuration bit of line 8.
	RT9  RTSR1 = 0x01 << 9  //+ Rising trigger event configuration bit of line 9.
	RT10 RTSR1 = 0x01 << 10 //+ Rising trigger event configuration bit of line 10.
	RT11 RTSR1 = 0x01 << 11 //+ Rising trigger event configuration bit of line 11.
	RT12 RTSR1 = 0x01 << 12 //+ Rising trigger event configuration bit of line 12.
	RT13 RTSR1 = 0x01 << 13 //+ Rising trigger event configuration bit of line 13.
	RT14 RTSR1 = 0x01 << 14 //+ Rising trigger event configuration bit of line 14.
	RT15 RTSR1 = 0x01 << 15 //+ Rising trigger event configuration bit of line 15.
	RT16 RTSR1 = 0x01 << 16 //+ Rising trigger event configuration bit of line 16.
	RT18 RTSR1 = 0x01 << 18 //+ Rising trigger event configuration bit of line 18.
	RT19 RTSR1 = 0x01 << 19 //+ Rising trigger event configuration bit of line 19.
	RT20 RTSR1 = 0x01 << 20 //+ Rising trigger event configuration bit of line 20.
	RT21 RTSR1 = 0x01 << 21 //+ Rising trigger event configuration bit of line 21.
	RT22 RTSR1 = 0x01 << 22 //+ Rising trigger event configuration bit of line 22.
)

func (RTSR1) Field 

func (b RTSR1) Field(mask RTSR1) int

func (RTSR1) J 

func (mask RTSR1) J(v int) RTSR1

type RTSR2 

type RTSR2 uint32
const (
	RT35 RTSR2 = 0x01 << 3 //+ Rising trigger event configuration bit of line 35.
	RT36 RTSR2 = 0x01 << 4 //+ Rising trigger event configuration bit of line 36.
	RT37 RTSR2 = 0x01 << 5 //+ Rising trigger event configuration bit of line 37.
	RT38 RTSR2 = 0x01 << 6 //+ Rising trigger event configuration bit of line 38.
)

func (RTSR2) Field 

func (b RTSR2) Field(mask RTSR2) int

func (RTSR2) J 

func (mask RTSR2) J(v int) RTSR2

type SWIER1 

type SWIER1 uint32
const (
	SWI0  SWIER1 = 0x01 << 0  //+ Software Interrupt on line 0.
	SWI1  SWIER1 = 0x01 << 1  //+ Software Interrupt on line 1.
	SWI2  SWIER1 = 0x01 << 2  //+ Software Interrupt on line 2.
	SWI3  SWIER1 = 0x01 << 3  //+ Software Interrupt on line 3.
	SWI4  SWIER1 = 0x01 << 4  //+ Software Interrupt on line 4.
	SWI5  SWIER1 = 0x01 << 5  //+ Software Interrupt on line 5.
	SWI6  SWIER1 = 0x01 << 6  //+ Software Interrupt on line 6.
	SWI7  SWIER1 = 0x01 << 7  //+ Software Interrupt on line 7.
	SWI8  SWIER1 = 0x01 << 8  //+ Software Interrupt on line 8.
	SWI9  SWIER1 = 0x01 << 9  //+ Software Interrupt on line 9.
	SWI10 SWIER1 = 0x01 << 10 //+ Software Interrupt on line 10.
	SWI11 SWIER1 = 0x01 << 11 //+ Software Interrupt on line 11.
	SWI12 SWIER1 = 0x01 << 12 //+ Software Interrupt on line 12.
	SWI13 SWIER1 = 0x01 << 13 //+ Software Interrupt on line 13.
	SWI14 SWIER1 = 0x01 << 14 //+ Software Interrupt on line 14.
	SWI15 SWIER1 = 0x01 << 15 //+ Software Interrupt on line 15.
	SWI16 SWIER1 = 0x01 << 16 //+ Software Interrupt on line 16.
	SWI18 SWIER1 = 0x01 << 18 //+ Software Interrupt on line 18.
	SWI19 SWIER1 = 0x01 << 19 //+ Software Interrupt on line 19.
	SWI20 SWIER1 = 0x01 << 20 //+ Software Interrupt on line 20.
	SWI21 SWIER1 = 0x01 << 21 //+ Software Interrupt on line 21.
	SWI22 SWIER1 = 0x01 << 22 //+ Software Interrupt on line 22.
)

func (SWIER1) Field 

func (b SWIER1) Field(mask SWIER1) int

func (SWIER1) J 

func (mask SWIER1) J(v int) SWIER1

type SWIER2 

type SWIER2 uint32
const (
	SWI35 SWIER2 = 0x01 << 3 //+ Software Interrupt on line 35.
	SWI36 SWIER2 = 0x01 << 4 //+ Software Interrupt on line 36.
	SWI37 SWIER2 = 0x01 << 5 //+ Software Interrupt on line 37.
	SWI38 SWIER2 = 0x01 << 6 //+ Software Interrupt on line 38.
)

func (SWIER2) Field 

func (b SWIER2) Field(mask SWIER2) int

func (SWIER2) J 

func (mask SWIER2) J(v int) SWIER2

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