Documentation
¶
Overview ¶
Package dbgmcu provides interface to Debug MCU.
Peripheral: DBGMCU_Periph Debug MCU. Instances:
DBGMCU mmap.DBGMCU_BASE
Registers:
0x00 32 IDCODE MCU device ID code. 0x04 32 CR Debug MCU configuration register. 0x08 32 APB1FZ Debug MCU APB1 freeze register. 0x0C 32 APB2FZ Debug MCU APB2 freeze register.
Import:
stm32/o/l1xx_md/mmap
Index ¶
- Constants
- Variables
- type APB1FZ
- type APB2FZ
- type CR
- type DBGMCU_Periph
- func (p *DBGMCU_Periph) BaseAddr() uintptr
- func (p *DBGMCU_Periph) DBG_I2C1_SMBUS_TIMEOUT() RMAPB1FZ
- func (p *DBGMCU_Periph) DBG_I2C2_SMBUS_TIMEOUT() RMAPB1FZ
- func (p *DBGMCU_Periph) DBG_IWDG_STOP() RMAPB1FZ
- func (p *DBGMCU_Periph) DBG_RTC_STOP() RMAPB1FZ
- func (p *DBGMCU_Periph) DBG_SLEEP() RMCR
- func (p *DBGMCU_Periph) DBG_STANDBY() RMCR
- func (p *DBGMCU_Periph) DBG_STOP() RMCR
- func (p *DBGMCU_Periph) DBG_TIM10_STOP() RMAPB2FZ
- func (p *DBGMCU_Periph) DBG_TIM11_STOP() RMAPB2FZ
- func (p *DBGMCU_Periph) DBG_TIM2_STOP() RMAPB1FZ
- func (p *DBGMCU_Periph) DBG_TIM3_STOP() RMAPB1FZ
- func (p *DBGMCU_Periph) DBG_TIM4_STOP() RMAPB1FZ
- func (p *DBGMCU_Periph) DBG_TIM5_STOP() RMAPB1FZ
- func (p *DBGMCU_Periph) DBG_TIM6_STOP() RMAPB1FZ
- func (p *DBGMCU_Periph) DBG_TIM7_STOP() RMAPB1FZ
- func (p *DBGMCU_Periph) DBG_TIM9_STOP() RMAPB2FZ
- func (p *DBGMCU_Periph) DBG_WWDG_STOP() RMAPB1FZ
- func (p *DBGMCU_Periph) DEV_ID() RMIDCODE
- func (p *DBGMCU_Periph) REV_ID() RMIDCODE
- func (p *DBGMCU_Periph) TRACE_IOEN() RMCR
- func (p *DBGMCU_Periph) TRACE_MODE() RMCR
- type IDCODE
- type RAPB1FZ
- func (r *RAPB1FZ) AtomicClearBits(mask APB1FZ)
- func (r *RAPB1FZ) AtomicSetBits(mask APB1FZ)
- func (r *RAPB1FZ) AtomicStoreBits(mask, b APB1FZ)
- func (r *RAPB1FZ) Bits(mask APB1FZ) APB1FZ
- func (r *RAPB1FZ) ClearBits(mask APB1FZ)
- func (r *RAPB1FZ) Load() APB1FZ
- func (r *RAPB1FZ) SetBits(mask APB1FZ)
- func (r *RAPB1FZ) Store(b APB1FZ)
- func (r *RAPB1FZ) StoreBits(mask, b APB1FZ)
- type RAPB2FZ
- func (r *RAPB2FZ) AtomicClearBits(mask APB2FZ)
- func (r *RAPB2FZ) AtomicSetBits(mask APB2FZ)
- func (r *RAPB2FZ) AtomicStoreBits(mask, b APB2FZ)
- func (r *RAPB2FZ) Bits(mask APB2FZ) APB2FZ
- func (r *RAPB2FZ) ClearBits(mask APB2FZ)
- func (r *RAPB2FZ) Load() APB2FZ
- func (r *RAPB2FZ) SetBits(mask APB2FZ)
- func (r *RAPB2FZ) Store(b APB2FZ)
- func (r *RAPB2FZ) StoreBits(mask, b APB2FZ)
- type RCR
- type RIDCODE
- func (r *RIDCODE) AtomicClearBits(mask IDCODE)
- func (r *RIDCODE) AtomicSetBits(mask IDCODE)
- func (r *RIDCODE) AtomicStoreBits(mask, b IDCODE)
- func (r *RIDCODE) Bits(mask IDCODE) IDCODE
- func (r *RIDCODE) ClearBits(mask IDCODE)
- func (r *RIDCODE) Load() IDCODE
- func (r *RIDCODE) SetBits(mask IDCODE)
- func (r *RIDCODE) Store(b IDCODE)
- func (r *RIDCODE) StoreBits(mask, b IDCODE)
- type RMAPB1FZ
- type RMAPB2FZ
- type RMCR
- type RMIDCODE
Constants ¶
View Source
const ( DEV_IDn = 0 REV_IDn = 16 )
View Source
const ( DBG_SLEEPn = 0 DBG_STOPn = 1 DBG_STANDBYn = 2 TRACE_IOENn = 5 TRACE_MODEn = 6 )
View Source
const ( DBG_TIM2_STOPn = 0 DBG_TIM3_STOPn = 1 DBG_TIM4_STOPn = 2 DBG_TIM5_STOPn = 3 DBG_TIM6_STOPn = 4 DBG_TIM7_STOPn = 5 DBG_RTC_STOPn = 10 DBG_WWDG_STOPn = 11 DBG_IWDG_STOPn = 12 DBG_I2C1_SMBUS_TIMEOUTn = 21 DBG_I2C2_SMBUS_TIMEOUTn = 22 )
View Source
const ( DBG_TIM9_STOPn = 2 DBG_TIM10_STOPn = 3 DBG_TIM11_STOPn = 4 )
Variables ¶
View Source
var DBGMCU = (*DBGMCU_Periph)(unsafe.Pointer(uintptr(mmap.DBGMCU_BASE)))
Functions ¶
This section is empty.
Types ¶
type APB1FZ ¶
type APB1FZ uint32
const ( DBG_TIM2_STOP APB1FZ = 0x01 << 0 //+ TIM2 counter stopped when core is halted. DBG_TIM3_STOP APB1FZ = 0x01 << 1 //+ TIM3 counter stopped when core is halted. DBG_TIM4_STOP APB1FZ = 0x01 << 2 //+ TIM4 counter stopped when core is halted. DBG_TIM5_STOP APB1FZ = 0x01 << 3 //+ TIM5 counter stopped when core is halted. DBG_TIM6_STOP APB1FZ = 0x01 << 4 //+ TIM6 counter stopped when core is halted. DBG_TIM7_STOP APB1FZ = 0x01 << 5 //+ TIM7 counter stopped when core is halted. DBG_RTC_STOP APB1FZ = 0x01 << 10 //+ RTC Counter stopped when Core is halted. DBG_WWDG_STOP APB1FZ = 0x01 << 11 //+ Debug Window Watchdog stopped when Core is halted. DBG_IWDG_STOP APB1FZ = 0x01 << 12 //+ Debug Independent Watchdog stopped when Core is halted. DBG_I2C1_SMBUS_TIMEOUT APB1FZ = 0x01 << 21 //+ SMBUS timeout mode stopped when Core is halted. DBG_I2C2_SMBUS_TIMEOUT APB1FZ = 0x01 << 22 //+ SMBUS timeout mode stopped when Core is halted. )
type CR ¶
type CR uint32
const ( DBG_SLEEP CR = 0x01 << 0 //+ Debug Sleep Mode. DBG_STOP CR = 0x01 << 1 //+ Debug Stop Mode. DBG_STANDBY CR = 0x01 << 2 //+ Debug Standby mode. TRACE_IOEN CR = 0x01 << 5 //+ Trace Pin Assignment Control. TRACE_MODE CR = 0x03 << 6 //+ TRACE_MODE[1:0] bits (Trace Pin Assignment Control). TRACE_MODE_0 CR = 0x01 << 6 // Bit 0. TRACE_MODE_1 CR = 0x02 << 6 // Bit 1. )
type DBGMCU_Periph ¶
func (*DBGMCU_Periph) BaseAddr ¶
func (p *DBGMCU_Periph) BaseAddr() uintptr
func (*DBGMCU_Periph) DBG_I2C1_SMBUS_TIMEOUT ¶
func (p *DBGMCU_Periph) DBG_I2C1_SMBUS_TIMEOUT() RMAPB1FZ
func (*DBGMCU_Periph) DBG_I2C2_SMBUS_TIMEOUT ¶
func (p *DBGMCU_Periph) DBG_I2C2_SMBUS_TIMEOUT() RMAPB1FZ
func (*DBGMCU_Periph) DBG_IWDG_STOP ¶
func (p *DBGMCU_Periph) DBG_IWDG_STOP() RMAPB1FZ
func (*DBGMCU_Periph) DBG_RTC_STOP ¶
func (p *DBGMCU_Periph) DBG_RTC_STOP() RMAPB1FZ
func (*DBGMCU_Periph) DBG_SLEEP ¶
func (p *DBGMCU_Periph) DBG_SLEEP() RMCR
func (*DBGMCU_Periph) DBG_STANDBY ¶
func (p *DBGMCU_Periph) DBG_STANDBY() RMCR
func (*DBGMCU_Periph) DBG_STOP ¶
func (p *DBGMCU_Periph) DBG_STOP() RMCR
func (*DBGMCU_Periph) DBG_TIM10_STOP ¶
func (p *DBGMCU_Periph) DBG_TIM10_STOP() RMAPB2FZ
func (*DBGMCU_Periph) DBG_TIM11_STOP ¶
func (p *DBGMCU_Periph) DBG_TIM11_STOP() RMAPB2FZ
func (*DBGMCU_Periph) DBG_TIM2_STOP ¶
func (p *DBGMCU_Periph) DBG_TIM2_STOP() RMAPB1FZ
func (*DBGMCU_Periph) DBG_TIM3_STOP ¶
func (p *DBGMCU_Periph) DBG_TIM3_STOP() RMAPB1FZ
func (*DBGMCU_Periph) DBG_TIM4_STOP ¶
func (p *DBGMCU_Periph) DBG_TIM4_STOP() RMAPB1FZ
func (*DBGMCU_Periph) DBG_TIM5_STOP ¶
func (p *DBGMCU_Periph) DBG_TIM5_STOP() RMAPB1FZ
func (*DBGMCU_Periph) DBG_TIM6_STOP ¶
func (p *DBGMCU_Periph) DBG_TIM6_STOP() RMAPB1FZ
func (*DBGMCU_Periph) DBG_TIM7_STOP ¶
func (p *DBGMCU_Periph) DBG_TIM7_STOP() RMAPB1FZ
func (*DBGMCU_Periph) DBG_TIM9_STOP ¶
func (p *DBGMCU_Periph) DBG_TIM9_STOP() RMAPB2FZ
func (*DBGMCU_Periph) DBG_WWDG_STOP ¶
func (p *DBGMCU_Periph) DBG_WWDG_STOP() RMAPB1FZ
func (*DBGMCU_Periph) DEV_ID ¶
func (p *DBGMCU_Periph) DEV_ID() RMIDCODE
func (*DBGMCU_Periph) REV_ID ¶
func (p *DBGMCU_Periph) REV_ID() RMIDCODE
func (*DBGMCU_Periph) TRACE_IOEN ¶
func (p *DBGMCU_Periph) TRACE_IOEN() RMCR
func (*DBGMCU_Periph) TRACE_MODE ¶
func (p *DBGMCU_Periph) TRACE_MODE() RMCR
type IDCODE ¶
type IDCODE uint32
const ( DEV_ID IDCODE = 0xFFF << 0 //+ Device Identifier. REV_ID IDCODE = 0xFFFF << 16 //+ REV_ID[15:0] bits (Revision Identifier). REV_ID_0 IDCODE = 0x01 << 16 // Bit 0. REV_ID_1 IDCODE = 0x02 << 16 // Bit 1. REV_ID_2 IDCODE = 0x04 << 16 // Bit 2. REV_ID_3 IDCODE = 0x08 << 16 // Bit 3. REV_ID_4 IDCODE = 0x10 << 16 // Bit 4. REV_ID_5 IDCODE = 0x20 << 16 // Bit 5. REV_ID_6 IDCODE = 0x40 << 16 // Bit 6. REV_ID_7 IDCODE = 0x80 << 16 // Bit 7. REV_ID_8 IDCODE = 0x100 << 16 // Bit 8. REV_ID_9 IDCODE = 0x200 << 16 // Bit 9. REV_ID_10 IDCODE = 0x400 << 16 // Bit 10. REV_ID_11 IDCODE = 0x800 << 16 // Bit 11. REV_ID_12 IDCODE = 0x1000 << 16 // Bit 12. REV_ID_13 IDCODE = 0x2000 << 16 // Bit 13. REV_ID_14 IDCODE = 0x4000 << 16 // Bit 14. REV_ID_15 IDCODE = 0x8000 << 16 // Bit 15. )
type RAPB1FZ ¶
func (*RAPB1FZ) AtomicClearBits ¶
func (*RAPB1FZ) AtomicSetBits ¶
func (*RAPB1FZ) AtomicStoreBits ¶
type RAPB2FZ ¶
func (*RAPB2FZ) AtomicClearBits ¶
func (*RAPB2FZ) AtomicSetBits ¶
func (*RAPB2FZ) AtomicStoreBits ¶
type RIDCODE ¶
func (*RIDCODE) AtomicClearBits ¶
func (*RIDCODE) AtomicSetBits ¶
func (*RIDCODE) AtomicStoreBits ¶
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