spi

package
v0.0.0-...-168ccc2 Latest Latest
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 Go to latest Published: Dec 5, 2021 License: BSD-3-Clause Imports: 4 Imported by: 0

Documentation

Overview

Package spi provides interface to Serial Peripheral Interface.

Peripheral: SPI_Periph Serial Peripheral Interface. Instances: 

SPI2  mmap.SPI2_BASE
SPI3  mmap.SPI3_BASE
SPI1  mmap.SPI1_BASE
SPI4  mmap.SPI4_BASE
SPI5  mmap.SPI5_BASE
SPI6  mmap.SPI6_BASE

Registers: 

0x00 32  CR1     Control register 1 (not used in I2S mode).
0x04 32  CR2     Control register 2.
0x08 32  SR      Status register.
0x0C 32  DR      Data register.
0x10 32  CRCPR   CRC polynomial register (not used in I2S mode).
0x14 32  RXCRCR  RX CRC register (not used in I2S mode).
0x18 32  TXCRCR  TX CRC register (not used in I2S mode).
0x1C 32  I2SCFGR SPI_I2S configuration register.
0x20 32  I2SPR   SPI_I2S prescaler register.

Import: 

stm32/o/f746xx/mmap

Index

Constants

View Source 
const (
	CPHAn     = 0
	CPOLn     = 1
	MSTRn     = 2
	BRn       = 3
	SPEn      = 6
	LSBFIRSTn = 7
	SSIn      = 8
	SSMn      = 9
	RXONLYn   = 10
	CRCLn     = 11
	CRCNEXTn  = 12
	CRCENn    = 13
	BIDIOEn   = 14
	BIDIMODEn = 15
)
View Source 
const (
	RXDMAENn = 0
	TXDMAENn = 1
	SSOEn    = 2
	NSSPn    = 3
	FRFn     = 4
	ERRIEn   = 5
	RXNEIEn  = 6
	TXEIEn   = 7
	DSn      = 8
	FRXTHn   = 12
	LDMARXn  = 13
	LDMATXn  = 14
)
View Source 
const (
	RXNEn   = 0
	TXEn    = 1
	CHSIDEn = 2
	UDRn    = 3
	CRCERRn = 4
	MODFn   = 5
	OVRn    = 6
	BSYn    = 7
	FREn    = 8
	FRLVLn  = 9
	FTLVLn  = 11
)
View Source 
const (
	CHLENn   = 0
	DATLENn  = 1
	CKPOLn   = 3
	I2SSTDn  = 4
	PCMSYNCn = 7
	I2SCFGn  = 8
	I2SEn    = 10
	I2SMODn  = 11
	ASTRTENn = 12
)
View Source 
const (
	I2SDIVn = 0
	ODDn    = 8
	MCKOEn  = 9
)
View Source 
const (
	CRCPOLYn = 0
)
View Source 
const (
	RXCRCn = 0
)
View Source 
const (
	TXCRCn = 0
)

Variables

View Source 
var SPI1 = (*SPI_Periph)(unsafe.Pointer(uintptr(mmap.SPI1_BASE)))
View Source 
var SPI2 = (*SPI_Periph)(unsafe.Pointer(uintptr(mmap.SPI2_BASE)))
View Source 
var SPI3 = (*SPI_Periph)(unsafe.Pointer(uintptr(mmap.SPI3_BASE)))
View Source 
var SPI4 = (*SPI_Periph)(unsafe.Pointer(uintptr(mmap.SPI4_BASE)))
View Source 
var SPI5 = (*SPI_Periph)(unsafe.Pointer(uintptr(mmap.SPI5_BASE)))
View Source 
var SPI6 = (*SPI_Periph)(unsafe.Pointer(uintptr(mmap.SPI6_BASE)))

Functions

This section is empty.

Types

type CR1 

type CR1 uint32
const (
	CPHA     CR1 = 0x01 << 0  //+ Clock Phase.
	CPOL     CR1 = 0x01 << 1  //+ Clock Polarity.
	MSTR     CR1 = 0x01 << 2  //+ Master Selection.
	BR       CR1 = 0x07 << 3  //+ BR[2:0] bits (Baud Rate Control).
	BR_0     CR1 = 0x01 << 3  //  Bit 0.
	BR_1     CR1 = 0x02 << 3  //  Bit 1.
	BR_2     CR1 = 0x04 << 3  //  Bit 2.
	SPE      CR1 = 0x01 << 6  //+ SPI Enable.
	LSBFIRST CR1 = 0x01 << 7  //+ Frame Format.
	SSI      CR1 = 0x01 << 8  //+ Internal slave select.
	SSM      CR1 = 0x01 << 9  //+ Software slave management.
	RXONLY   CR1 = 0x01 << 10 //+ Receive only.
	CRCL     CR1 = 0x01 << 11 //+ CRC Length.
	CRCNEXT  CR1 = 0x01 << 12 //+ Transmit CRC next.
	CRCEN    CR1 = 0x01 << 13 //+ Hardware CRC calculation enable.
	BIDIOE   CR1 = 0x01 << 14 //+ Output enable in bidirectional mode.
	BIDIMODE CR1 = 0x01 << 15 //+ Bidirectional data mode enable.
)

func (CR1) Field 

func (b CR1) Field(mask CR1) int

func (CR1) J 

func (mask CR1) J(v int) CR1

type CR2 

type CR2 uint32
const (
	RXDMAEN CR2 = 0x01 << 0  //+ Rx Buffer DMA Enable.
	TXDMAEN CR2 = 0x01 << 1  //+ Tx Buffer DMA Enable.
	SSOE    CR2 = 0x01 << 2  //+ SS Output Enable.
	NSSP    CR2 = 0x01 << 3  //+ NSS pulse management Enable.
	FRF     CR2 = 0x01 << 4  //+ Frame Format Enable.
	ERRIE   CR2 = 0x01 << 5  //+ Error Interrupt Enable.
	RXNEIE  CR2 = 0x01 << 6  //+ RX buffer Not Empty Interrupt Enable.
	TXEIE   CR2 = 0x01 << 7  //+ Tx buffer Empty Interrupt Enable.
	DS      CR2 = 0x0F << 8  //+ DS[3:0] Data Size.
	DS_0    CR2 = 0x01 << 8  //  Bit 0.
	DS_1    CR2 = 0x02 << 8  //  Bit 1.
	DS_2    CR2 = 0x04 << 8  //  Bit 2.
	DS_3    CR2 = 0x08 << 8  //  Bit 3.
	FRXTH   CR2 = 0x01 << 12 //+ FIFO reception Threshold.
	LDMARX  CR2 = 0x01 << 13 //+ Last DMA transfer for reception.
	LDMATX  CR2 = 0x01 << 14 //+ Last DMA transfer for transmission.
)

func (CR2) Field 

func (b CR2) Field(mask CR2) int

func (CR2) J 

func (mask CR2) J(v int) CR2

type CRCPR 

type CRCPR uint32
const (
	CRCPOLY CRCPR = 0xFFFF << 0 //+ CRC polynomial register.
)

func (CRCPR) Field 

func (b CRCPR) Field(mask CRCPR) int

func (CRCPR) J 

func (mask CRCPR) J(v int) CRCPR

type DR 

type DR uint32

func (DR) Field 

func (b DR) Field(mask DR) int

func (DR) J 

func (mask DR) J(v int) DR

type I2SCFGR 

type I2SCFGR uint32
const (
	CHLEN    I2SCFGR = 0x01 << 0  //+ Channel length (number of bits per audio channel).
	DATLEN   I2SCFGR = 0x03 << 1  //+ DATLEN[1:0] bits (Data length to be transferred).
	DATLEN_0 I2SCFGR = 0x01 << 1  //  Bit 0.
	DATLEN_1 I2SCFGR = 0x02 << 1  //  Bit 1.
	CKPOL    I2SCFGR = 0x01 << 3  //+ steady state clock polarity.
	I2SSTD   I2SCFGR = 0x03 << 4  //+ I2SSTD[1:0] bits (I2S standard selection).
	I2SSTD_0 I2SCFGR = 0x01 << 4  //  Bit 0.
	I2SSTD_1 I2SCFGR = 0x02 << 4  //  Bit 1.
	PCMSYNC  I2SCFGR = 0x01 << 7  //+ PCM frame synchronization.
	I2SCFG   I2SCFGR = 0x03 << 8  //+ I2SCFG[1:0] bits (I2S configuration mode).
	I2SCFG_0 I2SCFGR = 0x01 << 8  //  Bit 0.
	I2SCFG_1 I2SCFGR = 0x02 << 8  //  Bit 1.
	I2SE     I2SCFGR = 0x01 << 10 //+ I2S Enable.
	I2SMOD   I2SCFGR = 0x01 << 11 //+ I2S mode selection.
	ASTRTEN  I2SCFGR = 0x01 << 12 //+ Asynchronous start enable.
)

func (I2SCFGR) Field 

func (b I2SCFGR) Field(mask I2SCFGR) int

func (I2SCFGR) J 

func (mask I2SCFGR) J(v int) I2SCFGR

type I2SPR 

type I2SPR uint32
const (
	I2SDIV I2SPR = 0xFF << 0 //+ I2S Linear prescaler.
	ODD    I2SPR = 0x01 << 8 //+ Odd factor for the prescaler.
	MCKOE  I2SPR = 0x01 << 9 //+ Master Clock Output Enable.
)

func (I2SPR) Field 

func (b I2SPR) Field(mask I2SPR) int

func (I2SPR) J 

func (mask I2SPR) J(v int) I2SPR

type RCR1 

type RCR1 struct{ mmio.U32 }

func (*RCR1) AtomicClearBits 

func (r *RCR1) AtomicClearBits(mask CR1)

func (*RCR1) AtomicSetBits 

func (r *RCR1) AtomicSetBits(mask CR1)

func (*RCR1) AtomicStoreBits 

func (r *RCR1) AtomicStoreBits(mask, b CR1)

func (*RCR1) Bits 

func (r *RCR1) Bits(mask CR1) CR1

func (*RCR1) ClearBits 

func (r *RCR1) ClearBits(mask CR1)

func (*RCR1) Load 

func (r *RCR1) Load() CR1

func (*RCR1) SetBits 

func (r *RCR1) SetBits(mask CR1)

func (*RCR1) Store 

func (r *RCR1) Store(b CR1)

func (*RCR1) StoreBits 

func (r *RCR1) StoreBits(mask, b CR1)

type RCR2 

type RCR2 struct{ mmio.U32 }

func (*RCR2) AtomicClearBits 

func (r *RCR2) AtomicClearBits(mask CR2)

func (*RCR2) AtomicSetBits 

func (r *RCR2) AtomicSetBits(mask CR2)

func (*RCR2) AtomicStoreBits 

func (r *RCR2) AtomicStoreBits(mask, b CR2)

func (*RCR2) Bits 

func (r *RCR2) Bits(mask CR2) CR2

func (*RCR2) ClearBits 

func (r *RCR2) ClearBits(mask CR2)

func (*RCR2) Load 

func (r *RCR2) Load() CR2

func (*RCR2) SetBits 

func (r *RCR2) SetBits(mask CR2)

func (*RCR2) Store 

func (r *RCR2) Store(b CR2)

func (*RCR2) StoreBits 

func (r *RCR2) StoreBits(mask, b CR2)

type RCRCPR 

type RCRCPR struct{ mmio.U32 }

func (*RCRCPR) AtomicClearBits 

func (r *RCRCPR) AtomicClearBits(mask CRCPR)

func (*RCRCPR) AtomicSetBits 

func (r *RCRCPR) AtomicSetBits(mask CRCPR)

func (*RCRCPR) AtomicStoreBits 

func (r *RCRCPR) AtomicStoreBits(mask, b CRCPR)

func (*RCRCPR) Bits 

func (r *RCRCPR) Bits(mask CRCPR) CRCPR

func (*RCRCPR) ClearBits 

func (r *RCRCPR) ClearBits(mask CRCPR)

func (*RCRCPR) Load 

func (r *RCRCPR) Load() CRCPR

func (*RCRCPR) SetBits 

func (r *RCRCPR) SetBits(mask CRCPR)

func (*RCRCPR) Store 

func (r *RCRCPR) Store(b CRCPR)

func (*RCRCPR) StoreBits 

func (r *RCRCPR) StoreBits(mask, b CRCPR)

type RDR 

type RDR struct{ mmio.U32 }

func (*RDR) AtomicClearBits 

func (r *RDR) AtomicClearBits(mask DR)

func (*RDR) AtomicSetBits 

func (r *RDR) AtomicSetBits(mask DR)

func (*RDR) AtomicStoreBits 

func (r *RDR) AtomicStoreBits(mask, b DR)

func (*RDR) Bits 

func (r *RDR) Bits(mask DR) DR

func (*RDR) ClearBits 

func (r *RDR) ClearBits(mask DR)

func (*RDR) Load 

func (r *RDR) Load() DR

func (*RDR) SetBits 

func (r *RDR) SetBits(mask DR)

func (*RDR) Store 

func (r *RDR) Store(b DR)

func (*RDR) StoreBits 

func (r *RDR) StoreBits(mask, b DR)

type RI2SCFGR 

type RI2SCFGR struct{ mmio.U32 }

func (*RI2SCFGR) AtomicClearBits 

func (r *RI2SCFGR) AtomicClearBits(mask I2SCFGR)

func (*RI2SCFGR) AtomicSetBits 

func (r *RI2SCFGR) AtomicSetBits(mask I2SCFGR)

func (*RI2SCFGR) AtomicStoreBits 

func (r *RI2SCFGR) AtomicStoreBits(mask, b I2SCFGR)

func (*RI2SCFGR) Bits 

func (r *RI2SCFGR) Bits(mask I2SCFGR) I2SCFGR

func (*RI2SCFGR) ClearBits 

func (r *RI2SCFGR) ClearBits(mask I2SCFGR)

func (*RI2SCFGR) Load 

func (r *RI2SCFGR) Load() I2SCFGR

func (*RI2SCFGR) SetBits 

func (r *RI2SCFGR) SetBits(mask I2SCFGR)

func (*RI2SCFGR) Store 

func (r *RI2SCFGR) Store(b I2SCFGR)

func (*RI2SCFGR) StoreBits 

func (r *RI2SCFGR) StoreBits(mask, b I2SCFGR)

type RI2SPR 

type RI2SPR struct{ mmio.U32 }

func (*RI2SPR) AtomicClearBits 

func (r *RI2SPR) AtomicClearBits(mask I2SPR)

func (*RI2SPR) AtomicSetBits 

func (r *RI2SPR) AtomicSetBits(mask I2SPR)

func (*RI2SPR) AtomicStoreBits 

func (r *RI2SPR) AtomicStoreBits(mask, b I2SPR)

func (*RI2SPR) Bits 

func (r *RI2SPR) Bits(mask I2SPR) I2SPR

func (*RI2SPR) ClearBits 

func (r *RI2SPR) ClearBits(mask I2SPR)

func (*RI2SPR) Load 

func (r *RI2SPR) Load() I2SPR

func (*RI2SPR) SetBits 

func (r *RI2SPR) SetBits(mask I2SPR)

func (*RI2SPR) Store 

func (r *RI2SPR) Store(b I2SPR)

func (*RI2SPR) StoreBits 

func (r *RI2SPR) StoreBits(mask, b I2SPR)

type RMCR1 

type RMCR1 struct{ mmio.UM32 }

func (RMCR1) Load 

func (rm RMCR1) Load() CR1

func (RMCR1) Store 

func (rm RMCR1) Store(b CR1)

type RMCR2 

type RMCR2 struct{ mmio.UM32 }

func (RMCR2) Load 

func (rm RMCR2) Load() CR2

func (RMCR2) Store 

func (rm RMCR2) Store(b CR2)

type RMCRCPR 

type RMCRCPR struct{ mmio.UM32 }

func (RMCRCPR) Load 

func (rm RMCRCPR) Load() CRCPR

func (RMCRCPR) Store 

func (rm RMCRCPR) Store(b CRCPR)

type RMDR 

type RMDR struct{ mmio.UM32 }

func (RMDR) Load 

func (rm RMDR) Load() DR

func (RMDR) Store 

func (rm RMDR) Store(b DR)

type RMI2SCFGR 

type RMI2SCFGR struct{ mmio.UM32 }

func (RMI2SCFGR) Load 

func (rm RMI2SCFGR) Load() I2SCFGR

func (RMI2SCFGR) Store 

func (rm RMI2SCFGR) Store(b I2SCFGR)

type RMI2SPR 

type RMI2SPR struct{ mmio.UM32 }

func (RMI2SPR) Load 

func (rm RMI2SPR) Load() I2SPR

func (RMI2SPR) Store 

func (rm RMI2SPR) Store(b I2SPR)

type RMRXCRCR 

type RMRXCRCR struct{ mmio.UM32 }

func (RMRXCRCR) Load 

func (rm RMRXCRCR) Load() RXCRCR

func (RMRXCRCR) Store 

func (rm RMRXCRCR) Store(b RXCRCR)

type RMSR 

type RMSR struct{ mmio.UM32 }

func (RMSR) Load 

func (rm RMSR) Load() SR

func (RMSR) Store 

func (rm RMSR) Store(b SR)

type RMTXCRCR 

type RMTXCRCR struct{ mmio.UM32 }

func (RMTXCRCR) Load 

func (rm RMTXCRCR) Load() TXCRCR

func (RMTXCRCR) Store 

func (rm RMTXCRCR) Store(b TXCRCR)

type RRXCRCR 

type RRXCRCR struct{ mmio.U32 }

func (*RRXCRCR) AtomicClearBits 

func (r *RRXCRCR) AtomicClearBits(mask RXCRCR)

func (*RRXCRCR) AtomicSetBits 

func (r *RRXCRCR) AtomicSetBits(mask RXCRCR)

func (*RRXCRCR) AtomicStoreBits 

func (r *RRXCRCR) AtomicStoreBits(mask, b RXCRCR)

func (*RRXCRCR) Bits 

func (r *RRXCRCR) Bits(mask RXCRCR) RXCRCR

func (*RRXCRCR) ClearBits 

func (r *RRXCRCR) ClearBits(mask RXCRCR)

func (*RRXCRCR) Load 

func (r *RRXCRCR) Load() RXCRCR

func (*RRXCRCR) SetBits 

func (r *RRXCRCR) SetBits(mask RXCRCR)

func (*RRXCRCR) Store 

func (r *RRXCRCR) Store(b RXCRCR)

func (*RRXCRCR) StoreBits 

func (r *RRXCRCR) StoreBits(mask, b RXCRCR)

type RSR 

type RSR struct{ mmio.U32 }

func (*RSR) AtomicClearBits 

func (r *RSR) AtomicClearBits(mask SR)

func (*RSR) AtomicSetBits 

func (r *RSR) AtomicSetBits(mask SR)

func (*RSR) AtomicStoreBits 

func (r *RSR) AtomicStoreBits(mask, b SR)

func (*RSR) Bits 

func (r *RSR) Bits(mask SR) SR

func (*RSR) ClearBits 

func (r *RSR) ClearBits(mask SR)

func (*RSR) Load 

func (r *RSR) Load() SR

func (*RSR) SetBits 

func (r *RSR) SetBits(mask SR)

func (*RSR) Store 

func (r *RSR) Store(b SR)

func (*RSR) StoreBits 

func (r *RSR) StoreBits(mask, b SR)

type RTXCRCR 

type RTXCRCR struct{ mmio.U32 }

func (*RTXCRCR) AtomicClearBits 

func (r *RTXCRCR) AtomicClearBits(mask TXCRCR)

func (*RTXCRCR) AtomicSetBits 

func (r *RTXCRCR) AtomicSetBits(mask TXCRCR)

func (*RTXCRCR) AtomicStoreBits 

func (r *RTXCRCR) AtomicStoreBits(mask, b TXCRCR)

func (*RTXCRCR) Bits 

func (r *RTXCRCR) Bits(mask TXCRCR) TXCRCR

func (*RTXCRCR) ClearBits 

func (r *RTXCRCR) ClearBits(mask TXCRCR)

func (*RTXCRCR) Load 

func (r *RTXCRCR) Load() TXCRCR

func (*RTXCRCR) SetBits 

func (r *RTXCRCR) SetBits(mask TXCRCR)

func (*RTXCRCR) Store 

func (r *RTXCRCR) Store(b TXCRCR)

func (*RTXCRCR) StoreBits 

func (r *RTXCRCR) StoreBits(mask, b TXCRCR)

type RXCRCR 

type RXCRCR uint32
const (
	RXCRC RXCRCR = 0xFFFF << 0 //+ Rx CRC Register.
)

func (RXCRCR) Field 

func (b RXCRCR) Field(mask RXCRCR) int

func (RXCRCR) J 

func (mask RXCRCR) J(v int) RXCRCR

type SPI_Periph 

type SPI_Periph struct {
	CR1     RCR1
	CR2     RCR2
	SR      RSR
	DR      RDR
	CRCPR   RCRCPR
	RXCRCR  RRXCRCR
	TXCRCR  RTXCRCR
	I2SCFGR RI2SCFGR
	I2SPR   RI2SPR
}

func (*SPI_Periph) ASTRTEN 

func (p *SPI_Periph) ASTRTEN() RMI2SCFGR

func (*SPI_Periph) BIDIMODE 

func (p *SPI_Periph) BIDIMODE() RMCR1

func (*SPI_Periph) BIDIOE 

func (p *SPI_Periph) BIDIOE() RMCR1

func (*SPI_Periph) BR 

func (p *SPI_Periph) BR() RMCR1

func (*SPI_Periph) BSY 

func (p *SPI_Periph) BSY() RMSR

func (*SPI_Periph) BaseAddr 

func (p *SPI_Periph) BaseAddr() uintptr

func (*SPI_Periph) CHLEN 

func (p *SPI_Periph) CHLEN() RMI2SCFGR

func (*SPI_Periph) CHSIDE 

func (p *SPI_Periph) CHSIDE() RMSR

func (*SPI_Periph) CKPOL 

func (p *SPI_Periph) CKPOL() RMI2SCFGR

func (*SPI_Periph) CPHA 

func (p *SPI_Periph) CPHA() RMCR1

func (*SPI_Periph) CPOL 

func (p *SPI_Periph) CPOL() RMCR1

func (*SPI_Periph) CRCEN 

func (p *SPI_Periph) CRCEN() RMCR1

func (*SPI_Periph) CRCERR 

func (p *SPI_Periph) CRCERR() RMSR

func (*SPI_Periph) CRCL 

func (p *SPI_Periph) CRCL() RMCR1

func (*SPI_Periph) CRCNEXT 

func (p *SPI_Periph) CRCNEXT() RMCR1

func (*SPI_Periph) CRCPOLY 

func (p *SPI_Periph) CRCPOLY() RMCRCPR

func (*SPI_Periph) DATLEN 

func (p *SPI_Periph) DATLEN() RMI2SCFGR

func (*SPI_Periph) DS 

func (p *SPI_Periph) DS() RMCR2

func (*SPI_Periph) ERRIE 

func (p *SPI_Periph) ERRIE() RMCR2

func (*SPI_Periph) FRE 

func (p *SPI_Periph) FRE() RMSR

func (*SPI_Periph) FRF 

func (p *SPI_Periph) FRF() RMCR2

func (*SPI_Periph) FRLVL 

func (p *SPI_Periph) FRLVL() RMSR

func (*SPI_Periph) FRXTH 

func (p *SPI_Periph) FRXTH() RMCR2

func (*SPI_Periph) FTLVL 

func (p *SPI_Periph) FTLVL() RMSR

func (*SPI_Periph) I2SCFG 

func (p *SPI_Periph) I2SCFG() RMI2SCFGR

func (*SPI_Periph) I2SDIV 

func (p *SPI_Periph) I2SDIV() RMI2SPR

func (*SPI_Periph) I2SE 

func (p *SPI_Periph) I2SE() RMI2SCFGR

func (*SPI_Periph) I2SMOD 

func (p *SPI_Periph) I2SMOD() RMI2SCFGR

func (*SPI_Periph) I2SSTD 

func (p *SPI_Periph) I2SSTD() RMI2SCFGR

func (*SPI_Periph) LDMARX 

func (p *SPI_Periph) LDMARX() RMCR2

func (*SPI_Periph) LDMATX 

func (p *SPI_Periph) LDMATX() RMCR2

func (*SPI_Periph) LSBFIRST 

func (p *SPI_Periph) LSBFIRST() RMCR1

func (*SPI_Periph) MCKOE 

func (p *SPI_Periph) MCKOE() RMI2SPR

func (*SPI_Periph) MODF 

func (p *SPI_Periph) MODF() RMSR

func (*SPI_Periph) MSTR 

func (p *SPI_Periph) MSTR() RMCR1

func (*SPI_Periph) NSSP 

func (p *SPI_Periph) NSSP() RMCR2

func (*SPI_Periph) ODD 

func (p *SPI_Periph) ODD() RMI2SPR

func (*SPI_Periph) OVR 

func (p *SPI_Periph) OVR() RMSR

func (*SPI_Periph) PCMSYNC 

func (p *SPI_Periph) PCMSYNC() RMI2SCFGR

func (*SPI_Periph) RXCRC 

func (p *SPI_Periph) RXCRC() RMRXCRCR

func (*SPI_Periph) RXDMAEN 

func (p *SPI_Periph) RXDMAEN() RMCR2

func (*SPI_Periph) RXNE 

func (p *SPI_Periph) RXNE() RMSR

func (*SPI_Periph) RXNEIE 

func (p *SPI_Periph) RXNEIE() RMCR2

func (*SPI_Periph) RXONLY 

func (p *SPI_Periph) RXONLY() RMCR1

func (*SPI_Periph) SPE 

func (p *SPI_Periph) SPE() RMCR1

func (*SPI_Periph) SSI 

func (p *SPI_Periph) SSI() RMCR1

func (*SPI_Periph) SSM 

func (p *SPI_Periph) SSM() RMCR1

func (*SPI_Periph) SSOE 

func (p *SPI_Periph) SSOE() RMCR2

func (*SPI_Periph) TXCRC 

func (p *SPI_Periph) TXCRC() RMTXCRCR

func (*SPI_Periph) TXDMAEN 

func (p *SPI_Periph) TXDMAEN() RMCR2

func (*SPI_Periph) TXE 

func (p *SPI_Periph) TXE() RMSR

func (*SPI_Periph) TXEIE 

func (p *SPI_Periph) TXEIE() RMCR2

func (*SPI_Periph) UDR 

func (p *SPI_Periph) UDR() RMSR

type SR 

type SR uint32
const (
	RXNE    SR = 0x01 << 0  //+ Receive buffer Not Empty.
	TXE     SR = 0x01 << 1  //+ Transmit buffer Empty.
	CHSIDE  SR = 0x01 << 2  //+ Channel side.
	UDR     SR = 0x01 << 3  //+ Underrun flag.
	CRCERR  SR = 0x01 << 4  //+ CRC Error flag.
	MODF    SR = 0x01 << 5  //+ Mode fault.
	OVR     SR = 0x01 << 6  //+ Overrun flag.
	BSY     SR = 0x01 << 7  //+ Busy flag.
	FRE     SR = 0x01 << 8  //+ TI frame format error.
	FRLVL   SR = 0x03 << 9  //+ FIFO Reception Level.
	FRLVL_0 SR = 0x01 << 9  //  Bit 0.
	FRLVL_1 SR = 0x02 << 9  //  Bit 1.
	FTLVL   SR = 0x03 << 11 //+ FIFO Transmission Level.
	FTLVL_0 SR = 0x01 << 11 //  Bit 0.
	FTLVL_1 SR = 0x02 << 11 //  Bit 1.
)

func (SR) Field 

func (b SR) Field(mask SR) int

func (SR) J 

func (mask SR) J(v int) SR

type TXCRCR 

type TXCRCR uint32
const (
	TXCRC TXCRCR = 0xFFFF << 0 //+ Tx CRC Register.
)

func (TXCRCR) Field 

func (b TXCRCR) Field(mask TXCRCR) int

func (TXCRCR) J 

func (mask TXCRCR) J(v int) TXCRCR

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