exti

package
v0.0.0-...-168ccc2 Latest Latest
Warning

This package is not in the latest version of its module.

Go to latest
Published: Dec 5, 2021 License: BSD-3-Clause Imports: 4 Imported by: 0

Documentation

Overview

Package exti provides interface to External Interrupt/Event Controller.

Peripheral: EXTI_Periph External Interrupt/Event Controller. Instances:

EXTI  mmap.EXTI_BASE

Registers:

0x00 32  IMR   Interrupt mask register.
0x04 32  EMR   Event mask register.
0x08 32  RTSR  Rising trigger selection register.
0x0C 32  FTSR  Falling trigger selection register.
0x10 32  SWIER Software interrupt event register.
0x14 32  PR    Pending register.

Import:

stm32/o/f411xe/mmap

Index

Constants

View Source
const (
	IL0n  = 0
	IL1n  = 1
	IL2n  = 2
	IL3n  = 3
	IL4n  = 4
	IL5n  = 5
	IL6n  = 6
	IL7n  = 7
	IL8n  = 8
	IL9n  = 9
	IL10n = 10
	IL11n = 11
	IL12n = 12
	IL13n = 13
	IL14n = 14
	IL15n = 15
	IL16n = 16
	IL17n = 17
	IL18n = 18
	IL19n = 19
	IL20n = 20
	IL21n = 21
	IL22n = 22
)
View Source
const (
	EL0n  = 0
	EL1n  = 1
	EL2n  = 2
	EL3n  = 3
	EL4n  = 4
	EL5n  = 5
	EL6n  = 6
	EL7n  = 7
	EL8n  = 8
	EL9n  = 9
	EL10n = 10
	EL11n = 11
	EL12n = 12
	EL13n = 13
	EL14n = 14
	EL15n = 15
	EL16n = 16
	EL17n = 17
	EL18n = 18
	EL19n = 19
	EL20n = 20
	EL21n = 21
	EL22n = 22
)
View Source
const (
	TR0n  = 0
	TR1n  = 1
	TR2n  = 2
	TR3n  = 3
	TR4n  = 4
	TR5n  = 5
	TR6n  = 6
	TR7n  = 7
	TR8n  = 8
	TR9n  = 9
	TR10n = 10
	TR11n = 11
	TR12n = 12
	TR13n = 13
	TR14n = 14
	TR15n = 15
	TR16n = 16
	TR17n = 17
	TR18n = 18
	TR19n = 19
	TR20n = 20
	TR21n = 21
	TR22n = 22
)
View Source
const (
	TF0n  = 0
	TF1n  = 1
	TF2n  = 2
	TF3n  = 3
	TF4n  = 4
	TF5n  = 5
	TF6n  = 6
	TF7n  = 7
	TF8n  = 8
	TF9n  = 9
	TF10n = 10
	TF11n = 11
	TF12n = 12
	TF13n = 13
	TF14n = 14
	TF15n = 15
	TF16n = 16
	TF17n = 17
	TF18n = 18
	TF19n = 19
	TF20n = 20
	TF21n = 21
	TF22n = 22
)
View Source
const (
	SWI0n  = 0
	SWI1n  = 1
	SWI2n  = 2
	SWI3n  = 3
	SWI4n  = 4
	SWI5n  = 5
	SWI6n  = 6
	SWI7n  = 7
	SWI8n  = 8
	SWI9n  = 9
	SWI10n = 10
	SWI11n = 11
	SWI12n = 12
	SWI13n = 13
	SWI14n = 14
	SWI15n = 15
	SWI16n = 16
	SWI17n = 17
	SWI18n = 18
	SWI19n = 19
	SWI20n = 20
	SWI21n = 21
	SWI22n = 22
)
View Source
const (
	PIF0n  = 0
	PIF1n  = 1
	PIF2n  = 2
	PIF3n  = 3
	PIF4n  = 4
	PIF5n  = 5
	PIF6n  = 6
	PIF7n  = 7
	PIF8n  = 8
	PIF9n  = 9
	PIF10n = 10
	PIF11n = 11
	PIF12n = 12
	PIF13n = 13
	PIF14n = 14
	PIF15n = 15
	PIF16n = 16
	PIF17n = 17
	PIF18n = 18
	PIF19n = 19
	PIF20n = 20
	PIF21n = 21
	PIF22n = 22
)

Variables

Functions

This section is empty.

Types

type EMR

type EMR uint32
const (
	EL0  EMR = 0x01 << 0  //+ Event Mask on line 0.
	EL1  EMR = 0x01 << 1  //+ Event Mask on line 1.
	EL2  EMR = 0x01 << 2  //+ Event Mask on line 2.
	EL3  EMR = 0x01 << 3  //+ Event Mask on line 3.
	EL4  EMR = 0x01 << 4  //+ Event Mask on line 4.
	EL5  EMR = 0x01 << 5  //+ Event Mask on line 5.
	EL6  EMR = 0x01 << 6  //+ Event Mask on line 6.
	EL7  EMR = 0x01 << 7  //+ Event Mask on line 7.
	EL8  EMR = 0x01 << 8  //+ Event Mask on line 8.
	EL9  EMR = 0x01 << 9  //+ Event Mask on line 9.
	EL10 EMR = 0x01 << 10 //+ Event Mask on line 10.
	EL11 EMR = 0x01 << 11 //+ Event Mask on line 11.
	EL12 EMR = 0x01 << 12 //+ Event Mask on line 12.
	EL13 EMR = 0x01 << 13 //+ Event Mask on line 13.
	EL14 EMR = 0x01 << 14 //+ Event Mask on line 14.
	EL15 EMR = 0x01 << 15 //+ Event Mask on line 15.
	EL16 EMR = 0x01 << 16 //+ Event Mask on line 16.
	EL17 EMR = 0x01 << 17 //+ Event Mask on line 17.
	EL18 EMR = 0x01 << 18 //+ Event Mask on line 18.
	EL19 EMR = 0x01 << 19 //+ Event Mask on line 19.
	EL20 EMR = 0x01 << 20 //+ Event Mask on line 20.
	EL21 EMR = 0x01 << 21 //+ Event Mask on line 21.
	EL22 EMR = 0x01 << 22 //+ Event Mask on line 22.
)

func (EMR) Field

func (b EMR) Field(mask EMR) int

func (EMR) J

func (mask EMR) J(v int) EMR

type EXTI_Periph

type EXTI_Periph struct {
	IMR   RIMR
	EMR   REMR
	RTSR  RRTSR
	FTSR  RFTSR
	SWIER RSWIER
	PR    RPR
}

func (*EXTI_Periph) BaseAddr

func (p *EXTI_Periph) BaseAddr() uintptr

func (*EXTI_Periph) EL0

func (p *EXTI_Periph) EL0() RMEMR

func (*EXTI_Periph) EL1

func (p *EXTI_Periph) EL1() RMEMR

func (*EXTI_Periph) EL10

func (p *EXTI_Periph) EL10() RMEMR

func (*EXTI_Periph) EL11

func (p *EXTI_Periph) EL11() RMEMR

func (*EXTI_Periph) EL12

func (p *EXTI_Periph) EL12() RMEMR

func (*EXTI_Periph) EL13

func (p *EXTI_Periph) EL13() RMEMR

func (*EXTI_Periph) EL14

func (p *EXTI_Periph) EL14() RMEMR

func (*EXTI_Periph) EL15

func (p *EXTI_Periph) EL15() RMEMR

func (*EXTI_Periph) EL16

func (p *EXTI_Periph) EL16() RMEMR

func (*EXTI_Periph) EL17

func (p *EXTI_Periph) EL17() RMEMR

func (*EXTI_Periph) EL18

func (p *EXTI_Periph) EL18() RMEMR

func (*EXTI_Periph) EL19

func (p *EXTI_Periph) EL19() RMEMR

func (*EXTI_Periph) EL2

func (p *EXTI_Periph) EL2() RMEMR

func (*EXTI_Periph) EL20

func (p *EXTI_Periph) EL20() RMEMR

func (*EXTI_Periph) EL21

func (p *EXTI_Periph) EL21() RMEMR

func (*EXTI_Periph) EL22

func (p *EXTI_Periph) EL22() RMEMR

func (*EXTI_Periph) EL3

func (p *EXTI_Periph) EL3() RMEMR

func (*EXTI_Periph) EL4

func (p *EXTI_Periph) EL4() RMEMR

func (*EXTI_Periph) EL5

func (p *EXTI_Periph) EL5() RMEMR

func (*EXTI_Periph) EL6

func (p *EXTI_Periph) EL6() RMEMR

func (*EXTI_Periph) EL7

func (p *EXTI_Periph) EL7() RMEMR

func (*EXTI_Periph) EL8

func (p *EXTI_Periph) EL8() RMEMR

func (*EXTI_Periph) EL9

func (p *EXTI_Periph) EL9() RMEMR

func (*EXTI_Periph) IL0

func (p *EXTI_Periph) IL0() RMIMR

func (*EXTI_Periph) IL1

func (p *EXTI_Periph) IL1() RMIMR

func (*EXTI_Periph) IL10

func (p *EXTI_Periph) IL10() RMIMR

func (*EXTI_Periph) IL11

func (p *EXTI_Periph) IL11() RMIMR

func (*EXTI_Periph) IL12

func (p *EXTI_Periph) IL12() RMIMR

func (*EXTI_Periph) IL13

func (p *EXTI_Periph) IL13() RMIMR

func (*EXTI_Periph) IL14

func (p *EXTI_Periph) IL14() RMIMR

func (*EXTI_Periph) IL15

func (p *EXTI_Periph) IL15() RMIMR

func (*EXTI_Periph) IL16

func (p *EXTI_Periph) IL16() RMIMR

func (*EXTI_Periph) IL17

func (p *EXTI_Periph) IL17() RMIMR

func (*EXTI_Periph) IL18

func (p *EXTI_Periph) IL18() RMIMR

func (*EXTI_Periph) IL19

func (p *EXTI_Periph) IL19() RMIMR

func (*EXTI_Periph) IL2

func (p *EXTI_Periph) IL2() RMIMR

func (*EXTI_Periph) IL20

func (p *EXTI_Periph) IL20() RMIMR

func (*EXTI_Periph) IL21

func (p *EXTI_Periph) IL21() RMIMR

func (*EXTI_Periph) IL22

func (p *EXTI_Periph) IL22() RMIMR

func (*EXTI_Periph) IL3

func (p *EXTI_Periph) IL3() RMIMR

func (*EXTI_Periph) IL4

func (p *EXTI_Periph) IL4() RMIMR

func (*EXTI_Periph) IL5

func (p *EXTI_Periph) IL5() RMIMR

func (*EXTI_Periph) IL6

func (p *EXTI_Periph) IL6() RMIMR

func (*EXTI_Periph) IL7

func (p *EXTI_Periph) IL7() RMIMR

func (*EXTI_Periph) IL8

func (p *EXTI_Periph) IL8() RMIMR

func (*EXTI_Periph) IL9

func (p *EXTI_Periph) IL9() RMIMR

func (*EXTI_Periph) PIF0

func (p *EXTI_Periph) PIF0() RMPR

func (*EXTI_Periph) PIF1

func (p *EXTI_Periph) PIF1() RMPR

func (*EXTI_Periph) PIF10

func (p *EXTI_Periph) PIF10() RMPR

func (*EXTI_Periph) PIF11

func (p *EXTI_Periph) PIF11() RMPR

func (*EXTI_Periph) PIF12

func (p *EXTI_Periph) PIF12() RMPR

func (*EXTI_Periph) PIF13

func (p *EXTI_Periph) PIF13() RMPR

func (*EXTI_Periph) PIF14

func (p *EXTI_Periph) PIF14() RMPR

func (*EXTI_Periph) PIF15

func (p *EXTI_Periph) PIF15() RMPR

func (*EXTI_Periph) PIF16

func (p *EXTI_Periph) PIF16() RMPR

func (*EXTI_Periph) PIF17

func (p *EXTI_Periph) PIF17() RMPR

func (*EXTI_Periph) PIF18

func (p *EXTI_Periph) PIF18() RMPR

func (*EXTI_Periph) PIF19

func (p *EXTI_Periph) PIF19() RMPR

func (*EXTI_Periph) PIF2

func (p *EXTI_Periph) PIF2() RMPR

func (*EXTI_Periph) PIF20

func (p *EXTI_Periph) PIF20() RMPR

func (*EXTI_Periph) PIF21

func (p *EXTI_Periph) PIF21() RMPR

func (*EXTI_Periph) PIF22

func (p *EXTI_Periph) PIF22() RMPR

func (*EXTI_Periph) PIF3

func (p *EXTI_Periph) PIF3() RMPR

func (*EXTI_Periph) PIF4

func (p *EXTI_Periph) PIF4() RMPR

func (*EXTI_Periph) PIF5

func (p *EXTI_Periph) PIF5() RMPR

func (*EXTI_Periph) PIF6

func (p *EXTI_Periph) PIF6() RMPR

func (*EXTI_Periph) PIF7

func (p *EXTI_Periph) PIF7() RMPR

func (*EXTI_Periph) PIF8

func (p *EXTI_Periph) PIF8() RMPR

func (*EXTI_Periph) PIF9

func (p *EXTI_Periph) PIF9() RMPR

func (*EXTI_Periph) SWI0

func (p *EXTI_Periph) SWI0() RMSWIER

func (*EXTI_Periph) SWI1

func (p *EXTI_Periph) SWI1() RMSWIER

func (*EXTI_Periph) SWI10

func (p *EXTI_Periph) SWI10() RMSWIER

func (*EXTI_Periph) SWI11

func (p *EXTI_Periph) SWI11() RMSWIER

func (*EXTI_Periph) SWI12

func (p *EXTI_Periph) SWI12() RMSWIER

func (*EXTI_Periph) SWI13

func (p *EXTI_Periph) SWI13() RMSWIER

func (*EXTI_Periph) SWI14

func (p *EXTI_Periph) SWI14() RMSWIER

func (*EXTI_Periph) SWI15

func (p *EXTI_Periph) SWI15() RMSWIER

func (*EXTI_Periph) SWI16

func (p *EXTI_Periph) SWI16() RMSWIER

func (*EXTI_Periph) SWI17

func (p *EXTI_Periph) SWI17() RMSWIER

func (*EXTI_Periph) SWI18

func (p *EXTI_Periph) SWI18() RMSWIER

func (*EXTI_Periph) SWI19

func (p *EXTI_Periph) SWI19() RMSWIER

func (*EXTI_Periph) SWI2

func (p *EXTI_Periph) SWI2() RMSWIER

func (*EXTI_Periph) SWI20

func (p *EXTI_Periph) SWI20() RMSWIER

func (*EXTI_Periph) SWI21

func (p *EXTI_Periph) SWI21() RMSWIER

func (*EXTI_Periph) SWI22

func (p *EXTI_Periph) SWI22() RMSWIER

func (*EXTI_Periph) SWI3

func (p *EXTI_Periph) SWI3() RMSWIER

func (*EXTI_Periph) SWI4

func (p *EXTI_Periph) SWI4() RMSWIER

func (*EXTI_Periph) SWI5

func (p *EXTI_Periph) SWI5() RMSWIER

func (*EXTI_Periph) SWI6

func (p *EXTI_Periph) SWI6() RMSWIER

func (*EXTI_Periph) SWI7

func (p *EXTI_Periph) SWI7() RMSWIER

func (*EXTI_Periph) SWI8

func (p *EXTI_Periph) SWI8() RMSWIER

func (*EXTI_Periph) SWI9

func (p *EXTI_Periph) SWI9() RMSWIER

func (*EXTI_Periph) TF0

func (p *EXTI_Periph) TF0() RMFTSR

func (*EXTI_Periph) TF1

func (p *EXTI_Periph) TF1() RMFTSR

func (*EXTI_Periph) TF10

func (p *EXTI_Periph) TF10() RMFTSR

func (*EXTI_Periph) TF11

func (p *EXTI_Periph) TF11() RMFTSR

func (*EXTI_Periph) TF12

func (p *EXTI_Periph) TF12() RMFTSR

func (*EXTI_Periph) TF13

func (p *EXTI_Periph) TF13() RMFTSR

func (*EXTI_Periph) TF14

func (p *EXTI_Periph) TF14() RMFTSR

func (*EXTI_Periph) TF15

func (p *EXTI_Periph) TF15() RMFTSR

func (*EXTI_Periph) TF16

func (p *EXTI_Periph) TF16() RMFTSR

func (*EXTI_Periph) TF17

func (p *EXTI_Periph) TF17() RMFTSR

func (*EXTI_Periph) TF18

func (p *EXTI_Periph) TF18() RMFTSR

func (*EXTI_Periph) TF19

func (p *EXTI_Periph) TF19() RMFTSR

func (*EXTI_Periph) TF2

func (p *EXTI_Periph) TF2() RMFTSR

func (*EXTI_Periph) TF20

func (p *EXTI_Periph) TF20() RMFTSR

func (*EXTI_Periph) TF21

func (p *EXTI_Periph) TF21() RMFTSR

func (*EXTI_Periph) TF22

func (p *EXTI_Periph) TF22() RMFTSR

func (*EXTI_Periph) TF3

func (p *EXTI_Periph) TF3() RMFTSR

func (*EXTI_Periph) TF4

func (p *EXTI_Periph) TF4() RMFTSR

func (*EXTI_Periph) TF5

func (p *EXTI_Periph) TF5() RMFTSR

func (*EXTI_Periph) TF6

func (p *EXTI_Periph) TF6() RMFTSR

func (*EXTI_Periph) TF7

func (p *EXTI_Periph) TF7() RMFTSR

func (*EXTI_Periph) TF8

func (p *EXTI_Periph) TF8() RMFTSR

func (*EXTI_Periph) TF9

func (p *EXTI_Periph) TF9() RMFTSR

func (*EXTI_Periph) TR0

func (p *EXTI_Periph) TR0() RMRTSR

func (*EXTI_Periph) TR1

func (p *EXTI_Periph) TR1() RMRTSR

func (*EXTI_Periph) TR10

func (p *EXTI_Periph) TR10() RMRTSR

func (*EXTI_Periph) TR11

func (p *EXTI_Periph) TR11() RMRTSR

func (*EXTI_Periph) TR12

func (p *EXTI_Periph) TR12() RMRTSR

func (*EXTI_Periph) TR13

func (p *EXTI_Periph) TR13() RMRTSR

func (*EXTI_Periph) TR14

func (p *EXTI_Periph) TR14() RMRTSR

func (*EXTI_Periph) TR15

func (p *EXTI_Periph) TR15() RMRTSR

func (*EXTI_Periph) TR16

func (p *EXTI_Periph) TR16() RMRTSR

func (*EXTI_Periph) TR17

func (p *EXTI_Periph) TR17() RMRTSR

func (*EXTI_Periph) TR18

func (p *EXTI_Periph) TR18() RMRTSR

func (*EXTI_Periph) TR19

func (p *EXTI_Periph) TR19() RMRTSR

func (*EXTI_Periph) TR2

func (p *EXTI_Periph) TR2() RMRTSR

func (*EXTI_Periph) TR20

func (p *EXTI_Periph) TR20() RMRTSR

func (*EXTI_Periph) TR21

func (p *EXTI_Periph) TR21() RMRTSR

func (*EXTI_Periph) TR22

func (p *EXTI_Periph) TR22() RMRTSR

func (*EXTI_Periph) TR3

func (p *EXTI_Periph) TR3() RMRTSR

func (*EXTI_Periph) TR4

func (p *EXTI_Periph) TR4() RMRTSR

func (*EXTI_Periph) TR5

func (p *EXTI_Periph) TR5() RMRTSR

func (*EXTI_Periph) TR6

func (p *EXTI_Periph) TR6() RMRTSR

func (*EXTI_Periph) TR7

func (p *EXTI_Periph) TR7() RMRTSR

func (*EXTI_Periph) TR8

func (p *EXTI_Periph) TR8() RMRTSR

func (*EXTI_Periph) TR9

func (p *EXTI_Periph) TR9() RMRTSR

type FTSR

type FTSR uint32
const (
	TF0  FTSR = 0x01 << 0  //+ Falling trigger event configuration bit of line 0.
	TF1  FTSR = 0x01 << 1  //+ Falling trigger event configuration bit of line 1.
	TF2  FTSR = 0x01 << 2  //+ Falling trigger event configuration bit of line 2.
	TF3  FTSR = 0x01 << 3  //+ Falling trigger event configuration bit of line 3.
	TF4  FTSR = 0x01 << 4  //+ Falling trigger event configuration bit of line 4.
	TF5  FTSR = 0x01 << 5  //+ Falling trigger event configuration bit of line 5.
	TF6  FTSR = 0x01 << 6  //+ Falling trigger event configuration bit of line 6.
	TF7  FTSR = 0x01 << 7  //+ Falling trigger event configuration bit of line 7.
	TF8  FTSR = 0x01 << 8  //+ Falling trigger event configuration bit of line 8.
	TF9  FTSR = 0x01 << 9  //+ Falling trigger event configuration bit of line 9.
	TF10 FTSR = 0x01 << 10 //+ Falling trigger event configuration bit of line 10.
	TF11 FTSR = 0x01 << 11 //+ Falling trigger event configuration bit of line 11.
	TF12 FTSR = 0x01 << 12 //+ Falling trigger event configuration bit of line 12.
	TF13 FTSR = 0x01 << 13 //+ Falling trigger event configuration bit of line 13.
	TF14 FTSR = 0x01 << 14 //+ Falling trigger event configuration bit of line 14.
	TF15 FTSR = 0x01 << 15 //+ Falling trigger event configuration bit of line 15.
	TF16 FTSR = 0x01 << 16 //+ Falling trigger event configuration bit of line 16.
	TF17 FTSR = 0x01 << 17 //+ Falling trigger event configuration bit of line 17.
	TF18 FTSR = 0x01 << 18 //+ Falling trigger event configuration bit of line 18.
	TF19 FTSR = 0x01 << 19 //+ Falling trigger event configuration bit of line 19.
	TF20 FTSR = 0x01 << 20 //+ Falling trigger event configuration bit of line 20.
	TF21 FTSR = 0x01 << 21 //+ Falling trigger event configuration bit of line 21.
	TF22 FTSR = 0x01 << 22 //+ Falling trigger event configuration bit of line 22.
)

func (FTSR) Field

func (b FTSR) Field(mask FTSR) int

func (FTSR) J

func (mask FTSR) J(v int) FTSR

type IMR

type IMR uint32
const (
	IL0    IMR = 0x01 << 0     //+ Interrupt Mask on line 0.
	IL1    IMR = 0x01 << 1     //+ Interrupt Mask on line 1.
	IL2    IMR = 0x01 << 2     //+ Interrupt Mask on line 2.
	IL3    IMR = 0x01 << 3     //+ Interrupt Mask on line 3.
	IL4    IMR = 0x01 << 4     //+ Interrupt Mask on line 4.
	IL5    IMR = 0x01 << 5     //+ Interrupt Mask on line 5.
	IL6    IMR = 0x01 << 6     //+ Interrupt Mask on line 6.
	IL7    IMR = 0x01 << 7     //+ Interrupt Mask on line 7.
	IL8    IMR = 0x01 << 8     //+ Interrupt Mask on line 8.
	IL9    IMR = 0x01 << 9     //+ Interrupt Mask on line 9.
	IL10   IMR = 0x01 << 10    //+ Interrupt Mask on line 10.
	IL11   IMR = 0x01 << 11    //+ Interrupt Mask on line 11.
	IL12   IMR = 0x01 << 12    //+ Interrupt Mask on line 12.
	IL13   IMR = 0x01 << 13    //+ Interrupt Mask on line 13.
	IL14   IMR = 0x01 << 14    //+ Interrupt Mask on line 14.
	IL15   IMR = 0x01 << 15    //+ Interrupt Mask on line 15.
	IL16   IMR = 0x01 << 16    //+ Interrupt Mask on line 16.
	IL17   IMR = 0x01 << 17    //+ Interrupt Mask on line 17.
	IL18   IMR = 0x01 << 18    //+ Interrupt Mask on line 18.
	IL19   IMR = 0x01 << 19    //+ Interrupt Mask on line 19.
	IL20   IMR = 0x01 << 20    //+ Interrupt Mask on line 20.
	IL21   IMR = 0x01 << 21    //+ Interrupt Mask on line 21.
	IL22   IMR = 0x01 << 22    //+ Interrupt Mask on line 22.
	IMRALL IMR = 0x7FFFFF << 0 //  Interrupt Mask All.
)

func (IMR) Field

func (b IMR) Field(mask IMR) int

func (IMR) J

func (mask IMR) J(v int) IMR

type PR

type PR uint32
const (
	PIF0  PR = 0x01 << 0  //+ Pending bit for line 0.
	PIF1  PR = 0x01 << 1  //+ Pending bit for line 1.
	PIF2  PR = 0x01 << 2  //+ Pending bit for line 2.
	PIF3  PR = 0x01 << 3  //+ Pending bit for line 3.
	PIF4  PR = 0x01 << 4  //+ Pending bit for line 4.
	PIF5  PR = 0x01 << 5  //+ Pending bit for line 5.
	PIF6  PR = 0x01 << 6  //+ Pending bit for line 6.
	PIF7  PR = 0x01 << 7  //+ Pending bit for line 7.
	PIF8  PR = 0x01 << 8  //+ Pending bit for line 8.
	PIF9  PR = 0x01 << 9  //+ Pending bit for line 9.
	PIF10 PR = 0x01 << 10 //+ Pending bit for line 10.
	PIF11 PR = 0x01 << 11 //+ Pending bit for line 11.
	PIF12 PR = 0x01 << 12 //+ Pending bit for line 12.
	PIF13 PR = 0x01 << 13 //+ Pending bit for line 13.
	PIF14 PR = 0x01 << 14 //+ Pending bit for line 14.
	PIF15 PR = 0x01 << 15 //+ Pending bit for line 15.
	PIF16 PR = 0x01 << 16 //+ Pending bit for line 16.
	PIF17 PR = 0x01 << 17 //+ Pending bit for line 17.
	PIF18 PR = 0x01 << 18 //+ Pending bit for line 18.
	PIF19 PR = 0x01 << 19 //+ Pending bit for line 19.
	PIF20 PR = 0x01 << 20 //+ Pending bit for line 20.
	PIF21 PR = 0x01 << 21 //+ Pending bit for line 21.
	PIF22 PR = 0x01 << 22 //+ Pending bit for line 22.
)

func (PR) Field

func (b PR) Field(mask PR) int

func (PR) J

func (mask PR) J(v int) PR

type REMR

type REMR struct{ mmio.U32 }

func (*REMR) AtomicClearBits

func (r *REMR) AtomicClearBits(mask EMR)

func (*REMR) AtomicSetBits

func (r *REMR) AtomicSetBits(mask EMR)

func (*REMR) AtomicStoreBits

func (r *REMR) AtomicStoreBits(mask, b EMR)

func (*REMR) Bits

func (r *REMR) Bits(mask EMR) EMR

func (*REMR) ClearBits

func (r *REMR) ClearBits(mask EMR)

func (*REMR) Load

func (r *REMR) Load() EMR

func (*REMR) SetBits

func (r *REMR) SetBits(mask EMR)

func (*REMR) Store

func (r *REMR) Store(b EMR)

func (*REMR) StoreBits

func (r *REMR) StoreBits(mask, b EMR)

type RFTSR

type RFTSR struct{ mmio.U32 }

func (*RFTSR) AtomicClearBits

func (r *RFTSR) AtomicClearBits(mask FTSR)

func (*RFTSR) AtomicSetBits

func (r *RFTSR) AtomicSetBits(mask FTSR)

func (*RFTSR) AtomicStoreBits

func (r *RFTSR) AtomicStoreBits(mask, b FTSR)

func (*RFTSR) Bits

func (r *RFTSR) Bits(mask FTSR) FTSR

func (*RFTSR) ClearBits

func (r *RFTSR) ClearBits(mask FTSR)

func (*RFTSR) Load

func (r *RFTSR) Load() FTSR

func (*RFTSR) SetBits

func (r *RFTSR) SetBits(mask FTSR)

func (*RFTSR) Store

func (r *RFTSR) Store(b FTSR)

func (*RFTSR) StoreBits

func (r *RFTSR) StoreBits(mask, b FTSR)

type RIMR

type RIMR struct{ mmio.U32 }

func (*RIMR) AtomicClearBits

func (r *RIMR) AtomicClearBits(mask IMR)

func (*RIMR) AtomicSetBits

func (r *RIMR) AtomicSetBits(mask IMR)

func (*RIMR) AtomicStoreBits

func (r *RIMR) AtomicStoreBits(mask, b IMR)

func (*RIMR) Bits

func (r *RIMR) Bits(mask IMR) IMR

func (*RIMR) ClearBits

func (r *RIMR) ClearBits(mask IMR)

func (*RIMR) Load

func (r *RIMR) Load() IMR

func (*RIMR) SetBits

func (r *RIMR) SetBits(mask IMR)

func (*RIMR) Store

func (r *RIMR) Store(b IMR)

func (*RIMR) StoreBits

func (r *RIMR) StoreBits(mask, b IMR)

type RMEMR

type RMEMR struct{ mmio.UM32 }

func (RMEMR) Load

func (rm RMEMR) Load() EMR

func (RMEMR) Store

func (rm RMEMR) Store(b EMR)

type RMFTSR

type RMFTSR struct{ mmio.UM32 }

func (RMFTSR) Load

func (rm RMFTSR) Load() FTSR

func (RMFTSR) Store

func (rm RMFTSR) Store(b FTSR)

type RMIMR

type RMIMR struct{ mmio.UM32 }

func (RMIMR) Load

func (rm RMIMR) Load() IMR

func (RMIMR) Store

func (rm RMIMR) Store(b IMR)

type RMPR

type RMPR struct{ mmio.UM32 }

func (RMPR) Load

func (rm RMPR) Load() PR

func (RMPR) Store

func (rm RMPR) Store(b PR)

type RMRTSR

type RMRTSR struct{ mmio.UM32 }

func (RMRTSR) Load

func (rm RMRTSR) Load() RTSR

func (RMRTSR) Store

func (rm RMRTSR) Store(b RTSR)

type RMSWIER

type RMSWIER struct{ mmio.UM32 }

func (RMSWIER) Load

func (rm RMSWIER) Load() SWIER

func (RMSWIER) Store

func (rm RMSWIER) Store(b SWIER)

type RPR

type RPR struct{ mmio.U32 }

func (*RPR) AtomicClearBits

func (r *RPR) AtomicClearBits(mask PR)

func (*RPR) AtomicSetBits

func (r *RPR) AtomicSetBits(mask PR)

func (*RPR) AtomicStoreBits

func (r *RPR) AtomicStoreBits(mask, b PR)

func (*RPR) Bits

func (r *RPR) Bits(mask PR) PR

func (*RPR) ClearBits

func (r *RPR) ClearBits(mask PR)

func (*RPR) Load

func (r *RPR) Load() PR

func (*RPR) SetBits

func (r *RPR) SetBits(mask PR)

func (*RPR) Store

func (r *RPR) Store(b PR)

func (*RPR) StoreBits

func (r *RPR) StoreBits(mask, b PR)

type RRTSR

type RRTSR struct{ mmio.U32 }

func (*RRTSR) AtomicClearBits

func (r *RRTSR) AtomicClearBits(mask RTSR)

func (*RRTSR) AtomicSetBits

func (r *RRTSR) AtomicSetBits(mask RTSR)

func (*RRTSR) AtomicStoreBits

func (r *RRTSR) AtomicStoreBits(mask, b RTSR)

func (*RRTSR) Bits

func (r *RRTSR) Bits(mask RTSR) RTSR

func (*RRTSR) ClearBits

func (r *RRTSR) ClearBits(mask RTSR)

func (*RRTSR) Load

func (r *RRTSR) Load() RTSR

func (*RRTSR) SetBits

func (r *RRTSR) SetBits(mask RTSR)

func (*RRTSR) Store

func (r *RRTSR) Store(b RTSR)

func (*RRTSR) StoreBits

func (r *RRTSR) StoreBits(mask, b RTSR)

type RSWIER

type RSWIER struct{ mmio.U32 }

func (*RSWIER) AtomicClearBits

func (r *RSWIER) AtomicClearBits(mask SWIER)

func (*RSWIER) AtomicSetBits

func (r *RSWIER) AtomicSetBits(mask SWIER)

func (*RSWIER) AtomicStoreBits

func (r *RSWIER) AtomicStoreBits(mask, b SWIER)

func (*RSWIER) Bits

func (r *RSWIER) Bits(mask SWIER) SWIER

func (*RSWIER) ClearBits

func (r *RSWIER) ClearBits(mask SWIER)

func (*RSWIER) Load

func (r *RSWIER) Load() SWIER

func (*RSWIER) SetBits

func (r *RSWIER) SetBits(mask SWIER)

func (*RSWIER) Store

func (r *RSWIER) Store(b SWIER)

func (*RSWIER) StoreBits

func (r *RSWIER) StoreBits(mask, b SWIER)

type RTSR

type RTSR uint32
const (
	TR0  RTSR = 0x01 << 0  //+ Rising trigger event configuration bit of line 0.
	TR1  RTSR = 0x01 << 1  //+ Rising trigger event configuration bit of line 1.
	TR2  RTSR = 0x01 << 2  //+ Rising trigger event configuration bit of line 2.
	TR3  RTSR = 0x01 << 3  //+ Rising trigger event configuration bit of line 3.
	TR4  RTSR = 0x01 << 4  //+ Rising trigger event configuration bit of line 4.
	TR5  RTSR = 0x01 << 5  //+ Rising trigger event configuration bit of line 5.
	TR6  RTSR = 0x01 << 6  //+ Rising trigger event configuration bit of line 6.
	TR7  RTSR = 0x01 << 7  //+ Rising trigger event configuration bit of line 7.
	TR8  RTSR = 0x01 << 8  //+ Rising trigger event configuration bit of line 8.
	TR9  RTSR = 0x01 << 9  //+ Rising trigger event configuration bit of line 9.
	TR10 RTSR = 0x01 << 10 //+ Rising trigger event configuration bit of line 10.
	TR11 RTSR = 0x01 << 11 //+ Rising trigger event configuration bit of line 11.
	TR12 RTSR = 0x01 << 12 //+ Rising trigger event configuration bit of line 12.
	TR13 RTSR = 0x01 << 13 //+ Rising trigger event configuration bit of line 13.
	TR14 RTSR = 0x01 << 14 //+ Rising trigger event configuration bit of line 14.
	TR15 RTSR = 0x01 << 15 //+ Rising trigger event configuration bit of line 15.
	TR16 RTSR = 0x01 << 16 //+ Rising trigger event configuration bit of line 16.
	TR17 RTSR = 0x01 << 17 //+ Rising trigger event configuration bit of line 17.
	TR18 RTSR = 0x01 << 18 //+ Rising trigger event configuration bit of line 18.
	TR19 RTSR = 0x01 << 19 //+ Rising trigger event configuration bit of line 19.
	TR20 RTSR = 0x01 << 20 //+ Rising trigger event configuration bit of line 20.
	TR21 RTSR = 0x01 << 21 //+ Rising trigger event configuration bit of line 21.
	TR22 RTSR = 0x01 << 22 //+ Rising trigger event configuration bit of line 22.
)

func (RTSR) Field

func (b RTSR) Field(mask RTSR) int

func (RTSR) J

func (mask RTSR) J(v int) RTSR

type SWIER

type SWIER uint32
const (
	SWI0  SWIER = 0x01 << 0  //+ Software Interrupt on line 0.
	SWI1  SWIER = 0x01 << 1  //+ Software Interrupt on line 1.
	SWI2  SWIER = 0x01 << 2  //+ Software Interrupt on line 2.
	SWI3  SWIER = 0x01 << 3  //+ Software Interrupt on line 3.
	SWI4  SWIER = 0x01 << 4  //+ Software Interrupt on line 4.
	SWI5  SWIER = 0x01 << 5  //+ Software Interrupt on line 5.
	SWI6  SWIER = 0x01 << 6  //+ Software Interrupt on line 6.
	SWI7  SWIER = 0x01 << 7  //+ Software Interrupt on line 7.
	SWI8  SWIER = 0x01 << 8  //+ Software Interrupt on line 8.
	SWI9  SWIER = 0x01 << 9  //+ Software Interrupt on line 9.
	SWI10 SWIER = 0x01 << 10 //+ Software Interrupt on line 10.
	SWI11 SWIER = 0x01 << 11 //+ Software Interrupt on line 11.
	SWI12 SWIER = 0x01 << 12 //+ Software Interrupt on line 12.
	SWI13 SWIER = 0x01 << 13 //+ Software Interrupt on line 13.
	SWI14 SWIER = 0x01 << 14 //+ Software Interrupt on line 14.
	SWI15 SWIER = 0x01 << 15 //+ Software Interrupt on line 15.
	SWI16 SWIER = 0x01 << 16 //+ Software Interrupt on line 16.
	SWI17 SWIER = 0x01 << 17 //+ Software Interrupt on line 17.
	SWI18 SWIER = 0x01 << 18 //+ Software Interrupt on line 18.
	SWI19 SWIER = 0x01 << 19 //+ Software Interrupt on line 19.
	SWI20 SWIER = 0x01 << 20 //+ Software Interrupt on line 20.
	SWI21 SWIER = 0x01 << 21 //+ Software Interrupt on line 21.
	SWI22 SWIER = 0x01 << 22 //+ Software Interrupt on line 22.
)

func (SWIER) Field

func (b SWIER) Field(mask SWIER) int

func (SWIER) J

func (mask SWIER) J(v int) SWIER

Jump to

Keyboard shortcuts

? : This menu
/ : Search site
f or F : Jump to
y or Y : Canonical URL