adc

package
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 Go to latest Published: Dec 5, 2021 License: BSD-3-Clause Imports: 4 Imported by: 0

Documentation

Overview

Package adc provides interface to Analog to Digital Converter.

Peripheral: ADC_Periph Analog to Digital Converter. Instances: 

ADC1  mmap.ADC1_BASE
ADC2  mmap.ADC2_BASE
ADC3  mmap.ADC3_BASE
ADC4  mmap.ADC4_BASE

Registers: 

0x00 32  ISR     Interrupt and Status Register.
0x04 32  IER     Interrupt Enable Register.
0x08 32  CR      Control register.
0x0C 32  CFGR    Configuration register.
0x14 32  SMPR1   Sample time register 1.
0x18 32  SMPR2   Sample time register 2.
0x20 32  TR1     Watchdog threshold register 1.
0x24 32  TR2     Watchdog threshold register 2.
0x28 32  TR3     Watchdog threshold register 3.
0x30 32  SQR1    Regular sequence register 1.
0x34 32  SQR2    Regular sequence register 2.
0x38 32  SQR3    Regular sequence register 3.
0x3C 32  SQR4    Regular sequence register 4.
0x40 32  DR      Regular data register.
0x4C 32  JSQR    Injected sequence register.
0x60 32  OFR[4]  Offset registers.
0x80 32  JDR[4]  Injected data registers.
0xA0 32  AWD2CR  Analog Watchdog 2 Configuration Register.
0xA4 32  AWD3CR  Analog Watchdog 3 Configuration Register.
0xB0 32  DIFSEL  Differential Mode Selection Register.
0xB4 32  CALFACT Calibration Factors.

Import: 

stm32/o/f303xe/mmap

Peripheral: ADC_Common_Periph Analog to Digital Converter. Instances: 

ADC12_COMMON  mmap.ADC1_2_COMMON_BASE
ADC34_COMMON  mmap.ADC3_4_COMMON_BASE

Registers: 

0x00 32  CSR ADC Common status register.
0x08 32  CCR ADC common control register.
0x0C 32  CDR ADC common regular data register for dual.

Import: 

stm32/o/f303xe/mmap

Index

Constants

View Source 
const (
	ADRDYn = 0
	EOSMPn = 1
	EOCn   = 2
	EOSn   = 3
	OVRn   = 4
	JEOCn  = 5
	JEOSn  = 6
	AWD1n  = 7
	AWD2n  = 8
	AWD3n  = 9
	JQOVFn = 10
)
View Source 
const (
	ADRDYIEIEn = 0
	EOSMPIEIEn = 1
	EOCIEIEn   = 2
	EOSIEIEn   = 3
	OVRIEIEn   = 4
	JEOCIEIEn  = 5
	JEOSIEIEn  = 6
	AWD1IEIEn  = 7
	AWD2IEIEn  = 8
	AWD3IEIEn  = 9
	JQOVFIEIEn = 10
)
View Source 
const (
	ADENn     = 0
	ADDISn    = 1
	ADSTARTn  = 2
	JADSTARTn = 3
	ADSTPn    = 4
	JADSTPn   = 5
	ADVREGENn = 28
	ADCALDIFn = 30
	ADCALn    = 31
)
View Source 
const (
	DMAENn   = 0
	DMACFGn  = 1
	RESn     = 3
	ALIGNn   = 5
	EXTSELn  = 6
	EXTENn   = 10
	OVRMODn  = 12
	CONTn    = 13
	AUTDLYn  = 14
	DISCENn  = 16
	DISCNUMn = 17
	JDISCENn = 20
	JQMn     = 21
	AWD1SGLn = 22
	AWD1ENn  = 23
	JAWD1ENn = 24
	JAUTOn   = 25
	AWD1CHn  = 26
	AUTOFFn  = 15
)
View Source 
const (
	SMP0n = 0
	SMP1n = 3
	SMP2n = 6
	SMP3n = 9
	SMP4n = 12
	SMP5n = 15
	SMP6n = 18
	SMP7n = 21
	SMP8n = 24
	SMP9n = 27
)
View Source 
const (
	SMP10n = 0
	SMP11n = 3
	SMP12n = 6
	SMP13n = 9
	SMP14n = 12
	SMP15n = 15
	SMP16n = 18
	SMP17n = 21
	SMP18n = 24
)
View Source 
const (
	LT1n = 0
	HT1n = 16
)
View Source 
const (
	LT2n = 0
	HT2n = 16
)
View Source 
const (
	LT3n = 0
	HT3n = 16
)
View Source 
const (
	Ln   = 0
	SQ1n = 6
	SQ2n = 12
	SQ3n = 18
	SQ4n = 24
)
View Source 
const (
	SQ5n = 0
	SQ6n = 6
	SQ7n = 12
	SQ8n = 18
	SQ9n = 24
)
View Source 
const (
	SQ10n = 0
	SQ11n = 6
	SQ12n = 12
	SQ13n = 18
	SQ14n = 24
)
View Source 
const (
	SQ15n = 0
	SQ16n = 6
)
View Source 
const (
	JLn      = 0
	JEXTSELn = 2
	JEXTENn  = 6
	JSQ1n    = 8
	JSQ2n    = 14
	JSQ3n    = 20
	JSQ4n    = 26
)
View Source 
const (
	OFFSET1n    = 0
	OFFSET1_CHn = 26
	OFFSET1_ENn = 31
)
View Source 
const (
	CALFACT_Sn = 0
	CALFACT_Dn = 16
)
View Source 
const (
	ADRDY_MSTn       = 0
	ADRDY_EOSMP_MSTn = 1
	ADRDY_EOC_MSTn   = 2
	ADRDY_EOS_MSTn   = 3
	ADRDY_OVR_MSTn   = 4
	ADRDY_JEOC_MSTn  = 5
	ADRDY_JEOS_MSTn  = 6
	AWD1_MSTn        = 7
	AWD2_MSTn        = 8
	AWD3_MSTn        = 9
	JQOVF_MSTn       = 10
	ADRDY_SLVn       = 16
	ADRDY_EOSMP_SLVn = 17
	ADRDY_EOC_SLVn   = 18
	ADRDY_EOS_SLVn   = 19
	ADRDY_OVR_SLVn   = 20
	ADRDY_JEOC_SLVn  = 21
	ADRDY_JEOS_SLVn  = 22
	AWD1_SLVn        = 23
	AWD2_SLVn        = 24
	AWD3_SLVn        = 25
	JQOVF_SLVn       = 26
)
View Source 
const (
	MULTIn   = 0
	DELAYn   = 8
	MDMACFGn = 13
	MDMAn    = 14
	CKMODEn  = 16
	VREFENn  = 22
	TSENn    = 23
	VBATENn  = 24
)
View Source 
const (
	RDATA_MSTn = 0
	RDATA_SLVn = 16
)
View Source 
const (
	AWD2CHn = 0
)
View Source 
const (
	AWD3CHn = 0
)
View Source 
const (
	JDATAn = 0
)
View Source 
const (
	RDATAn = 0
)

Variables

View Source 
var ADC1 = (*ADC_Periph)(unsafe.Pointer(uintptr(mmap.ADC1_BASE)))
View Source 
var ADC12_COMMON = (*ADC_Common_Periph)(unsafe.Pointer(uintptr(mmap.ADC1_2_COMMON_BASE)))
View Source 
var ADC2 = (*ADC_Periph)(unsafe.Pointer(uintptr(mmap.ADC2_BASE)))
View Source 
var ADC3 = (*ADC_Periph)(unsafe.Pointer(uintptr(mmap.ADC3_BASE)))
View Source 
var ADC34_COMMON = (*ADC_Common_Periph)(unsafe.Pointer(uintptr(mmap.ADC3_4_COMMON_BASE)))
View Source 
var ADC4 = (*ADC_Periph)(unsafe.Pointer(uintptr(mmap.ADC4_BASE)))

Functions

This section is empty.

Types

type ADC_Common_Periph 

type ADC_Common_Periph struct {
	CSR RCSR

	CCR RCCR
	CDR RCDR
	// contains filtered or unexported fields
}

func (*ADC_Common_Periph) ADRDY_EOC_MST 

func (p *ADC_Common_Periph) ADRDY_EOC_MST() RMCSR

func (*ADC_Common_Periph) ADRDY_EOC_SLV 

func (p *ADC_Common_Periph) ADRDY_EOC_SLV() RMCSR

func (*ADC_Common_Periph) ADRDY_EOSMP_MST 

func (p *ADC_Common_Periph) ADRDY_EOSMP_MST() RMCSR

func (*ADC_Common_Periph) ADRDY_EOSMP_SLV 

func (p *ADC_Common_Periph) ADRDY_EOSMP_SLV() RMCSR

func (*ADC_Common_Periph) ADRDY_EOS_MST 

func (p *ADC_Common_Periph) ADRDY_EOS_MST() RMCSR

func (*ADC_Common_Periph) ADRDY_EOS_SLV 

func (p *ADC_Common_Periph) ADRDY_EOS_SLV() RMCSR

func (*ADC_Common_Periph) ADRDY_JEOC_MST 

func (p *ADC_Common_Periph) ADRDY_JEOC_MST() RMCSR

func (*ADC_Common_Periph) ADRDY_JEOC_SLV 

func (p *ADC_Common_Periph) ADRDY_JEOC_SLV() RMCSR

func (*ADC_Common_Periph) ADRDY_JEOS_MST 

func (p *ADC_Common_Periph) ADRDY_JEOS_MST() RMCSR

func (*ADC_Common_Periph) ADRDY_JEOS_SLV 

func (p *ADC_Common_Periph) ADRDY_JEOS_SLV() RMCSR

func (*ADC_Common_Periph) ADRDY_MST 

func (p *ADC_Common_Periph) ADRDY_MST() RMCSR

func (*ADC_Common_Periph) ADRDY_OVR_MST 

func (p *ADC_Common_Periph) ADRDY_OVR_MST() RMCSR

func (*ADC_Common_Periph) ADRDY_OVR_SLV 

func (p *ADC_Common_Periph) ADRDY_OVR_SLV() RMCSR

func (*ADC_Common_Periph) ADRDY_SLV 

func (p *ADC_Common_Periph) ADRDY_SLV() RMCSR

func (*ADC_Common_Periph) AWD1_MST 

func (p *ADC_Common_Periph) AWD1_MST() RMCSR

func (*ADC_Common_Periph) AWD1_SLV 

func (p *ADC_Common_Periph) AWD1_SLV() RMCSR

func (*ADC_Common_Periph) AWD2_MST 

func (p *ADC_Common_Periph) AWD2_MST() RMCSR

func (*ADC_Common_Periph) AWD2_SLV 

func (p *ADC_Common_Periph) AWD2_SLV() RMCSR

func (*ADC_Common_Periph) AWD3_MST 

func (p *ADC_Common_Periph) AWD3_MST() RMCSR

func (*ADC_Common_Periph) AWD3_SLV 

func (p *ADC_Common_Periph) AWD3_SLV() RMCSR

func (*ADC_Common_Periph) BaseAddr 

func (p *ADC_Common_Periph) BaseAddr() uintptr

func (*ADC_Common_Periph) CKMODE 

func (p *ADC_Common_Periph) CKMODE() RMCCR

func (*ADC_Common_Periph) DELAY 

func (p *ADC_Common_Periph) DELAY() RMCCR

func (*ADC_Common_Periph) JQOVF_MST 

func (p *ADC_Common_Periph) JQOVF_MST() RMCSR

func (*ADC_Common_Periph) JQOVF_SLV 

func (p *ADC_Common_Periph) JQOVF_SLV() RMCSR

func (*ADC_Common_Periph) MDMA 

func (p *ADC_Common_Periph) MDMA() RMCCR

func (*ADC_Common_Periph) MDMACFG 

func (p *ADC_Common_Periph) MDMACFG() RMCCR

func (*ADC_Common_Periph) MULTI 

func (p *ADC_Common_Periph) MULTI() RMCCR

func (*ADC_Common_Periph) RDATA_MST 

func (p *ADC_Common_Periph) RDATA_MST() RMCDR

func (*ADC_Common_Periph) RDATA_SLV 

func (p *ADC_Common_Periph) RDATA_SLV() RMCDR

func (*ADC_Common_Periph) TSEN 

func (p *ADC_Common_Periph) TSEN() RMCCR

func (*ADC_Common_Periph) VBATEN 

func (p *ADC_Common_Periph) VBATEN() RMCCR

func (*ADC_Common_Periph) VREFEN 

func (p *ADC_Common_Periph) VREFEN() RMCCR

type ADC_Periph 

type ADC_Periph struct {
	ISR  RISR
	IER  RIER
	CR   RCR
	CFGR RCFGR

	SMPR1 RSMPR1
	SMPR2 RSMPR2

	TR1 RTR1
	TR2 RTR2
	TR3 RTR3

	SQR1 RSQR1
	SQR2 RSQR2
	SQR3 RSQR3
	SQR4 RSQR4
	DR   RDR

	JSQR RJSQR

	OFR [4]ROFR

	JDR [4]RJDR

	AWD2CR RAWD2CR
	AWD3CR RAWD3CR

	DIFSEL  RDIFSEL
	CALFACT RCALFACT
	// contains filtered or unexported fields
}

func (*ADC_Periph) ADCAL 

func (p *ADC_Periph) ADCAL() RMCR

func (*ADC_Periph) ADCALDIF 

func (p *ADC_Periph) ADCALDIF() RMCR

func (*ADC_Periph) ADDIS 

func (p *ADC_Periph) ADDIS() RMCR

func (*ADC_Periph) ADEN 

func (p *ADC_Periph) ADEN() RMCR

func (*ADC_Periph) ADRDY 

func (p *ADC_Periph) ADRDY() RMISR

func (*ADC_Periph) ADRDYIEIE 

func (p *ADC_Periph) ADRDYIEIE() RMIER

func (*ADC_Periph) ADSTART 

func (p *ADC_Periph) ADSTART() RMCR

func (*ADC_Periph) ADSTP 

func (p *ADC_Periph) ADSTP() RMCR

func (*ADC_Periph) ADVREGEN 

func (p *ADC_Periph) ADVREGEN() RMCR

func (*ADC_Periph) ALIGN 

func (p *ADC_Periph) ALIGN() RMCFGR

func (*ADC_Periph) AUTDLY 

func (p *ADC_Periph) AUTDLY() RMCFGR

func (*ADC_Periph) AUTOFF 

func (p *ADC_Periph) AUTOFF() RMCFGR

func (*ADC_Periph) AWD1 

func (p *ADC_Periph) AWD1() RMISR

func (*ADC_Periph) AWD1CH 

func (p *ADC_Periph) AWD1CH() RMCFGR

func (*ADC_Periph) AWD1EN 

func (p *ADC_Periph) AWD1EN() RMCFGR

func (*ADC_Periph) AWD1IEIE 

func (p *ADC_Periph) AWD1IEIE() RMIER

func (*ADC_Periph) AWD1SGL 

func (p *ADC_Periph) AWD1SGL() RMCFGR

func (*ADC_Periph) AWD2 

func (p *ADC_Periph) AWD2() RMISR

func (*ADC_Periph) AWD2CH 

func (p *ADC_Periph) AWD2CH() RMAWD2CR

func (*ADC_Periph) AWD2IEIE 

func (p *ADC_Periph) AWD2IEIE() RMIER

func (*ADC_Periph) AWD3 

func (p *ADC_Periph) AWD3() RMISR

func (*ADC_Periph) AWD3CH 

func (p *ADC_Periph) AWD3CH() RMAWD3CR

func (*ADC_Periph) AWD3IEIE 

func (p *ADC_Periph) AWD3IEIE() RMIER

func (*ADC_Periph) BaseAddr 

func (p *ADC_Periph) BaseAddr() uintptr

func (*ADC_Periph) CALFACT_D 

func (p *ADC_Periph) CALFACT_D() RMCALFACT

func (*ADC_Periph) CALFACT_S 

func (p *ADC_Periph) CALFACT_S() RMCALFACT

func (*ADC_Periph) CONT 

func (p *ADC_Periph) CONT() RMCFGR

func (*ADC_Periph) DISCEN 

func (p *ADC_Periph) DISCEN() RMCFGR

func (*ADC_Periph) DISCNUM 

func (p *ADC_Periph) DISCNUM() RMCFGR

func (*ADC_Periph) DMACFG 

func (p *ADC_Periph) DMACFG() RMCFGR

func (*ADC_Periph) DMAEN 

func (p *ADC_Periph) DMAEN() RMCFGR

func (*ADC_Periph) EOC 

func (p *ADC_Periph) EOC() RMISR

func (*ADC_Periph) EOCIEIE 

func (p *ADC_Periph) EOCIEIE() RMIER

func (*ADC_Periph) EOS 

func (p *ADC_Periph) EOS() RMISR

func (*ADC_Periph) EOSIEIE 

func (p *ADC_Periph) EOSIEIE() RMIER

func (*ADC_Periph) EOSMP 

func (p *ADC_Periph) EOSMP() RMISR

func (*ADC_Periph) EOSMPIEIE 

func (p *ADC_Periph) EOSMPIEIE() RMIER

func (*ADC_Periph) EXTEN 

func (p *ADC_Periph) EXTEN() RMCFGR

func (*ADC_Periph) EXTSEL 

func (p *ADC_Periph) EXTSEL() RMCFGR

func (*ADC_Periph) HT1 

func (p *ADC_Periph) HT1() RMTR1

func (*ADC_Periph) HT2 

func (p *ADC_Periph) HT2() RMTR2

func (*ADC_Periph) HT3 

func (p *ADC_Periph) HT3() RMTR3

func (*ADC_Periph) JADSTART 

func (p *ADC_Periph) JADSTART() RMCR

func (*ADC_Periph) JADSTP 

func (p *ADC_Periph) JADSTP() RMCR

func (*ADC_Periph) JAUTO 

func (p *ADC_Periph) JAUTO() RMCFGR

func (*ADC_Periph) JAWD1EN 

func (p *ADC_Periph) JAWD1EN() RMCFGR

func (*ADC_Periph) JDATA 

func (p *ADC_Periph) JDATA(n int) RMJDR

func (*ADC_Periph) JDISCEN 

func (p *ADC_Periph) JDISCEN() RMCFGR

func (*ADC_Periph) JEOC 

func (p *ADC_Periph) JEOC() RMISR

func (*ADC_Periph) JEOCIEIE 

func (p *ADC_Periph) JEOCIEIE() RMIER

func (*ADC_Periph) JEOS 

func (p *ADC_Periph) JEOS() RMISR

func (*ADC_Periph) JEOSIEIE 

func (p *ADC_Periph) JEOSIEIE() RMIER

func (*ADC_Periph) JEXTEN 

func (p *ADC_Periph) JEXTEN() RMJSQR

func (*ADC_Periph) JEXTSEL 

func (p *ADC_Periph) JEXTSEL() RMJSQR

func (*ADC_Periph) JL 

func (p *ADC_Periph) JL() RMJSQR

func (*ADC_Periph) JQM 

func (p *ADC_Periph) JQM() RMCFGR

func (*ADC_Periph) JQOVF 

func (p *ADC_Periph) JQOVF() RMISR

func (*ADC_Periph) JQOVFIEIE 

func (p *ADC_Periph) JQOVFIEIE() RMIER

func (*ADC_Periph) JSQ1 

func (p *ADC_Periph) JSQ1() RMJSQR

func (*ADC_Periph) JSQ2 

func (p *ADC_Periph) JSQ2() RMJSQR

func (*ADC_Periph) JSQ3 

func (p *ADC_Periph) JSQ3() RMJSQR

func (*ADC_Periph) JSQ4 

func (p *ADC_Periph) JSQ4() RMJSQR

func (*ADC_Periph) L 

func (p *ADC_Periph) L() RMSQR1

func (*ADC_Periph) LT1 

func (p *ADC_Periph) LT1() RMTR1

func (*ADC_Periph) LT2 

func (p *ADC_Periph) LT2() RMTR2

func (*ADC_Periph) LT3 

func (p *ADC_Periph) LT3() RMTR3

func (*ADC_Periph) OFFSET1 

func (p *ADC_Periph) OFFSET1(n int) RMOFR

func (*ADC_Periph) OFFSET1_CH 

func (p *ADC_Periph) OFFSET1_CH(n int) RMOFR

func (*ADC_Periph) OFFSET1_EN 

func (p *ADC_Periph) OFFSET1_EN(n int) RMOFR

func (*ADC_Periph) OVR 

func (p *ADC_Periph) OVR() RMISR

func (*ADC_Periph) OVRIEIE 

func (p *ADC_Periph) OVRIEIE() RMIER

func (*ADC_Periph) OVRMOD 

func (p *ADC_Periph) OVRMOD() RMCFGR

func (*ADC_Periph) RDATA 

func (p *ADC_Periph) RDATA() RMDR

func (*ADC_Periph) RES 

func (p *ADC_Periph) RES() RMCFGR

func (*ADC_Periph) SMP0 

func (p *ADC_Periph) SMP0() RMSMPR1

func (*ADC_Periph) SMP1 

func (p *ADC_Periph) SMP1() RMSMPR1

func (*ADC_Periph) SMP10 

func (p *ADC_Periph) SMP10() RMSMPR2

func (*ADC_Periph) SMP11 

func (p *ADC_Periph) SMP11() RMSMPR2

func (*ADC_Periph) SMP12 

func (p *ADC_Periph) SMP12() RMSMPR2

func (*ADC_Periph) SMP13 

func (p *ADC_Periph) SMP13() RMSMPR2

func (*ADC_Periph) SMP14 

func (p *ADC_Periph) SMP14() RMSMPR2

func (*ADC_Periph) SMP15 

func (p *ADC_Periph) SMP15() RMSMPR2

func (*ADC_Periph) SMP16 

func (p *ADC_Periph) SMP16() RMSMPR2

func (*ADC_Periph) SMP17 

func (p *ADC_Periph) SMP17() RMSMPR2

func (*ADC_Periph) SMP18 

func (p *ADC_Periph) SMP18() RMSMPR2

func (*ADC_Periph) SMP2 

func (p *ADC_Periph) SMP2() RMSMPR1

func (*ADC_Periph) SMP3 

func (p *ADC_Periph) SMP3() RMSMPR1

func (*ADC_Periph) SMP4 

func (p *ADC_Periph) SMP4() RMSMPR1

func (*ADC_Periph) SMP5 

func (p *ADC_Periph) SMP5() RMSMPR1

func (*ADC_Periph) SMP6 

func (p *ADC_Periph) SMP6() RMSMPR1

func (*ADC_Periph) SMP7 

func (p *ADC_Periph) SMP7() RMSMPR1

func (*ADC_Periph) SMP8 

func (p *ADC_Periph) SMP8() RMSMPR1

func (*ADC_Periph) SMP9 

func (p *ADC_Periph) SMP9() RMSMPR1

func (*ADC_Periph) SQ1 

func (p *ADC_Periph) SQ1() RMSQR1

func (*ADC_Periph) SQ10 

func (p *ADC_Periph) SQ10() RMSQR3

func (*ADC_Periph) SQ11 

func (p *ADC_Periph) SQ11() RMSQR3

func (*ADC_Periph) SQ12 

func (p *ADC_Periph) SQ12() RMSQR3

func (*ADC_Periph) SQ13 

func (p *ADC_Periph) SQ13() RMSQR3

func (*ADC_Periph) SQ14 

func (p *ADC_Periph) SQ14() RMSQR3

func (*ADC_Periph) SQ15 

func (p *ADC_Periph) SQ15() RMSQR4

func (*ADC_Periph) SQ16 

func (p *ADC_Periph) SQ16() RMSQR4

func (*ADC_Periph) SQ2 

func (p *ADC_Periph) SQ2() RMSQR1

func (*ADC_Periph) SQ3 

func (p *ADC_Periph) SQ3() RMSQR1

func (*ADC_Periph) SQ4 

func (p *ADC_Periph) SQ4() RMSQR1

func (*ADC_Periph) SQ5 

func (p *ADC_Periph) SQ5() RMSQR2

func (*ADC_Periph) SQ6 

func (p *ADC_Periph) SQ6() RMSQR2

func (*ADC_Periph) SQ7 

func (p *ADC_Periph) SQ7() RMSQR2

func (*ADC_Periph) SQ8 

func (p *ADC_Periph) SQ8() RMSQR2

func (*ADC_Periph) SQ9 

func (p *ADC_Periph) SQ9() RMSQR2

type AWD2CR 

type AWD2CR uint32
const (
	AWD2CH AWD2CR = 0x7FFFF << 0 //+ ADC analog watchdog 2 monitored channel selection.
)

func (AWD2CR) Field 

func (b AWD2CR) Field(mask AWD2CR) int

func (AWD2CR) J 

func (mask AWD2CR) J(v int) AWD2CR

type AWD3CR 

type AWD3CR uint32
const (
	AWD3CH AWD3CR = 0x7FFFF << 0 //+ ADC analog watchdog 3 monitored channel selection.
)

func (AWD3CR) Field 

func (b AWD3CR) Field(mask AWD3CR) int

func (AWD3CR) J 

func (mask AWD3CR) J(v int) AWD3CR

type CALFACT 

type CALFACT uint32
const (
	CALFACT_S CALFACT = 0x7F << 0  //+ ADC calibration factor in single-ended mode.
	CALFACT_D CALFACT = 0x7F << 16 //+ ADC calibration factor in differential mode.
)

func (CALFACT) Field 

func (b CALFACT) Field(mask CALFACT) int

func (CALFACT) J 

func (mask CALFACT) J(v int) CALFACT

type CCR 

type CCR uint32
const (
	MULTI   CCR = 0x1F << 0  //+ Multi ADC mode selection.
	DELAY   CCR = 0x0F << 8  //+ Delay between 2 sampling phases.
	MDMACFG CCR = 0x01 << 13 //+ DMA configuration for multi-ADC mode.
	MDMA    CCR = 0x03 << 14 //+ DMA mode for multi-ADC mode.
	CKMODE  CCR = 0x03 << 16 //+ ADC clock mode.
	VREFEN  CCR = 0x01 << 22 //+ VREFINT enable.
	TSEN    CCR = 0x01 << 23 //+ Temperature sensor enable.
	VBATEN  CCR = 0x01 << 24 //+ VBAT enable.
	DUAL    CCR = 0x1F << 0  //  ADC multimode mode selection.
)

func (CCR) Field 

func (b CCR) Field(mask CCR) int

func (CCR) J 

func (mask CCR) J(v int) CCR

type CDR 

type CDR uint32
const (
	RDATA_MST CDR = 0xFFFF << 0  //+ Regular Data of the master ADC.
	RDATA_SLV CDR = 0xFFFF << 16 //+ Regular Data of the master ADC.
)

func (CDR) Field 

func (b CDR) Field(mask CDR) int

func (CDR) J 

func (mask CDR) J(v int) CDR

type CFGR 

type CFGR uint32
const (
	DMAEN   CFGR = 0x01 << 0  //+ ADC DMA enable.
	DMACFG  CFGR = 0x01 << 1  //+ ADC DMA configuration.
	RES     CFGR = 0x03 << 3  //+ ADC data resolution.
	ALIGN   CFGR = 0x01 << 5  //+ ADC data alignement.
	EXTSEL  CFGR = 0x0F << 6  //+ ADC group regular external trigger source.
	EXTEN   CFGR = 0x03 << 10 //+ ADC group regular external trigger polarity.
	OVRMOD  CFGR = 0x01 << 12 //+ ADC group regular overrun configuration.
	CONT    CFGR = 0x01 << 13 //+ ADC group regular continuous conversion mode.
	AUTDLY  CFGR = 0x01 << 14 //+ ADC low power auto wait.
	DISCEN  CFGR = 0x01 << 16 //+ ADC group regular sequencer discontinuous mode.
	DISCNUM CFGR = 0x07 << 17 //+ ADC Discontinuous mode channel count.
	JDISCEN CFGR = 0x01 << 20 //+ ADC Discontinuous mode on injected channels.
	JQM     CFGR = 0x01 << 21 //+ ADC group injected contexts queue mode.
	AWD1SGL CFGR = 0x01 << 22 //+ ADC analog watchdog 1 monitoring a single channel or all channels.
	AWD1EN  CFGR = 0x01 << 23 //+ ADC analog watchdog 1 enable on scope ADC group regular.
	JAWD1EN CFGR = 0x01 << 24 //+ ADC analog watchdog 1 enable on scope ADC group injected.
	JAUTO   CFGR = 0x01 << 25 //+ ADC group injected automatic trigger mode.
	AWD1CH  CFGR = 0x1F << 26 //+ ADC analog watchdog 1 monitored channel selection.
	AUTOFF  CFGR = 0x01 << 15 //+ ADC low power auto power off.
)

func (CFGR) Field 

func (b CFGR) Field(mask CFGR) int

func (CFGR) J 

func (mask CFGR) J(v int) CFGR

type CR 

type CR uint32
const (
	ADEN     CR = 0x01 << 0  //+ ADC enable.
	ADDIS    CR = 0x01 << 1  //+ ADC disable.
	ADSTART  CR = 0x01 << 2  //+ ADC group regular conversion start.
	JADSTART CR = 0x01 << 3  //+ ADC group injected conversion start.
	ADSTP    CR = 0x01 << 4  //+ ADC group regular conversion stop.
	JADSTP   CR = 0x01 << 5  //+ ADC group injected conversion stop.
	ADVREGEN CR = 0x03 << 28 //+ ADC voltage regulator enable.
	ADCALDIF CR = 0x01 << 30 //+ ADC differential mode for calibration.
	ADCAL    CR = 0x01 << 31 //+ ADC calibration.
)

func (CR) Field 

func (b CR) Field(mask CR) int

func (CR) J 

func (mask CR) J(v int) CR

type CSR 

type CSR uint32
const (
	ADRDY_MST       CSR = 0x01 << 0  //+ Master ADC ready.
	ADRDY_EOSMP_MST CSR = 0x01 << 1  //+ End of sampling phase flag of the master ADC.
	ADRDY_EOC_MST   CSR = 0x01 << 2  //+ End of regular conversion of the master ADC.
	ADRDY_EOS_MST   CSR = 0x01 << 3  //+ End of regular sequence flag of the master ADC.
	ADRDY_OVR_MST   CSR = 0x01 << 4  //+ Overrun flag of the master ADC.
	ADRDY_JEOC_MST  CSR = 0x01 << 5  //+ End of injected conversion of the master ADC.
	ADRDY_JEOS_MST  CSR = 0x01 << 6  //+ End of injected sequence flag of the master ADC.
	AWD1_MST        CSR = 0x01 << 7  //+ Analog watchdog 1 flag of the master ADC.
	AWD2_MST        CSR = 0x01 << 8  //+ Analog watchdog 2 flag of the master ADC.
	AWD3_MST        CSR = 0x01 << 9  //+ Analog watchdog 3 flag of the master ADC.
	JQOVF_MST       CSR = 0x01 << 10 //+ Injected context queue overflow flag of the master ADC.
	ADRDY_SLV       CSR = 0x01 << 16 //+ Slave ADC ready.
	ADRDY_EOSMP_SLV CSR = 0x01 << 17 //+ End of sampling phase flag of the slave ADC.
	ADRDY_EOC_SLV   CSR = 0x01 << 18 //+ End of regular conversion of the slave ADC.
	ADRDY_EOS_SLV   CSR = 0x01 << 19 //+ End of regular sequence flag of the slave ADC.
	ADRDY_OVR_SLV   CSR = 0x01 << 20 //+ Overrun flag of the slave ADC.
	ADRDY_JEOC_SLV  CSR = 0x01 << 21 //+ End of injected conversion of the slave ADC.
	ADRDY_JEOS_SLV  CSR = 0x01 << 22 //+ End of injected sequence flag of the slave ADC.
	AWD1_SLV        CSR = 0x01 << 23 //+ Analog watchdog 1 flag of the slave ADC.
	AWD2_SLV        CSR = 0x01 << 24 //+ Analog watchdog 2 flag of the slave ADC.
	AWD3_SLV        CSR = 0x01 << 25 //+ Analog watchdog 3 flag of the slave ADC.
	JQOVF_SLV       CSR = 0x01 << 26 //+ Injected context queue overflow flag of the slave ADC.
	EOSMP_MST       CSR = 0x01 << 1  //  ADC multimode master group regular end of sampling flag.
	EOC_MST         CSR = 0x01 << 2  //  ADC multimode master group regular end of unitary conversion flag.
	EOS_MST         CSR = 0x01 << 3  //  ADC multimode master group regular end of sequence conversions flag.
	OVR_MST         CSR = 0x01 << 4  //  ADC multimode master group regular overrun flag.
	JEOC_MST        CSR = 0x01 << 5  //  ADC multimode master group injected end of unitary conversion flag.
	JEOS_MST        CSR = 0x01 << 6  //  ADC multimode master group injected end of sequence conversions flag.
	EOSMP_SLV       CSR = 0x01 << 17 //  ADC multimode slave group regular end of sampling flag.
	EOC_SLV         CSR = 0x01 << 18 //  ADC multimode slave group regular end of unitary conversion flag.
	EOS_SLV         CSR = 0x01 << 19 //  ADC multimode slave group regular end of sequence conversions flag.
	OVR_SLV         CSR = 0x01 << 20 //  ADC multimode slave group regular overrun flag.
	JEOC_SLV        CSR = 0x01 << 21 //  ADC multimode slave group injected end of unitary conversion flag.
	JEOS_SLV        CSR = 0x01 << 22 //  ADC multimode slave group injected end of sequence conversions flag.
)

func (CSR) Field 

func (b CSR) Field(mask CSR) int

func (CSR) J 

func (mask CSR) J(v int) CSR

type DIFSEL 

type DIFSEL uint32

func (DIFSEL) Field 

func (b DIFSEL) Field(mask DIFSEL) int

func (DIFSEL) J 

func (mask DIFSEL) J(v int) DIFSEL

type DR 

type DR uint32
const (
	RDATA DR = 0xFFFF << 0 //+ ADC group regular conversion data.
)

func (DR) Field 

func (b DR) Field(mask DR) int

func (DR) J 

func (mask DR) J(v int) DR

type IER 

type IER uint32
const (
	ADRDYIEIE IER = 0x01 << 0  //+ ADC ready interrupt.
	EOSMPIEIE IER = 0x01 << 1  //+ ADC group regular end of sampling interrupt.
	EOCIEIE   IER = 0x01 << 2  //+ ADC group regular end of unitary conversion interrupt.
	EOSIEIE   IER = 0x01 << 3  //+ ADC group regular end of sequence conversions interrupt.
	OVRIEIE   IER = 0x01 << 4  //+ ADC group regular overrun interrupt.
	JEOCIEIE  IER = 0x01 << 5  //+ ADC group injected end of unitary conversion interrupt.
	JEOSIEIE  IER = 0x01 << 6  //+ ADC group injected end of sequence conversions interrupt.
	AWD1IEIE  IER = 0x01 << 7  //+ ADC analog watchdog 1 interrupt.
	AWD2IEIE  IER = 0x01 << 8  //+ ADC analog watchdog 2 interrupt.
	AWD3IEIE  IER = 0x01 << 9  //+ ADC analog watchdog 3 interrupt.
	JQOVFIEIE IER = 0x01 << 10 //+ ADC group injected contexts queue overflow interrupt.
)

func (IER) Field 

func (b IER) Field(mask IER) int

func (IER) J 

func (mask IER) J(v int) IER

type ISR 

type ISR uint32
const (
	ADRDY ISR = 0x01 << 0  //+ ADC ready flag.
	EOSMP ISR = 0x01 << 1  //+ ADC group regular end of sampling flag.
	EOC   ISR = 0x01 << 2  //+ ADC group regular end of unitary conversion flag.
	EOS   ISR = 0x01 << 3  //+ ADC group regular end of sequence conversions flag.
	OVR   ISR = 0x01 << 4  //+ ADC group regular overrun flag.
	JEOC  ISR = 0x01 << 5  //+ ADC group injected end of unitary conversion flag.
	JEOS  ISR = 0x01 << 6  //+ ADC group injected end of sequence conversions flag.
	AWD1  ISR = 0x01 << 7  //+ ADC analog watchdog 1 flag.
	AWD2  ISR = 0x01 << 8  //+ ADC analog watchdog 2 flag.
	AWD3  ISR = 0x01 << 9  //+ ADC analog watchdog 3 flag.
	JQOVF ISR = 0x01 << 10 //+ ADC group injected contexts queue overflow flag.
)

func (ISR) Field 

func (b ISR) Field(mask ISR) int

func (ISR) J 

func (mask ISR) J(v int) ISR

type JDR 

type JDR uint32
const (
	JDATA JDR = 0xFFFF << 0 //+ ADC group injected sequencer rank 1 conversion data.
)

func (JDR) Field 

func (b JDR) Field(mask JDR) int

func (JDR) J 

func (mask JDR) J(v int) JDR

type JSQR 

type JSQR uint32
const (
	JL      JSQR = 0x03 << 0  //+ ADC group injected sequencer scan length.
	JEXTSEL JSQR = 0x0F << 2  //+ ADC group injected external trigger source.
	JEXTEN  JSQR = 0x03 << 6  //+ ADC group injected external trigger polarity.
	JSQ1    JSQR = 0x1F << 8  //+ ADC group injected sequencer rank 1.
	JSQ2    JSQR = 0x1F << 14 //+ ADC group injected sequencer rank 2.
	JSQ3    JSQR = 0x1F << 20 //+ ADC group injected sequencer rank 3.
	JSQ4    JSQR = 0x1F << 26 //+ ADC group injected sequencer rank 4.
)

func (JSQR) Field 

func (b JSQR) Field(mask JSQR) int

func (JSQR) J 

func (mask JSQR) J(v int) JSQR

type OFR 

type OFR uint32
const (
	OFFSET1    OFR = 0xFFF << 0 //+ ADC offset number 1 offset level.
	OFFSET1_CH OFR = 0x1F << 26 //+ ADC offset number 1 channel selection.
	OFFSET1_EN OFR = 0x01 << 31 //+ ADC offset number 1 enable.
)

func (OFR) Field 

func (b OFR) Field(mask OFR) int

func (OFR) J 

func (mask OFR) J(v int) OFR

type RAWD2CR 

type RAWD2CR struct{ mmio.U32 }

func (*RAWD2CR) AtomicClearBits 

func (r *RAWD2CR) AtomicClearBits(mask AWD2CR)

func (*RAWD2CR) AtomicSetBits 

func (r *RAWD2CR) AtomicSetBits(mask AWD2CR)

func (*RAWD2CR) AtomicStoreBits 

func (r *RAWD2CR) AtomicStoreBits(mask, b AWD2CR)

func (*RAWD2CR) Bits 

func (r *RAWD2CR) Bits(mask AWD2CR) AWD2CR

func (*RAWD2CR) ClearBits 

func (r *RAWD2CR) ClearBits(mask AWD2CR)

func (*RAWD2CR) Load 

func (r *RAWD2CR) Load() AWD2CR

func (*RAWD2CR) SetBits 

func (r *RAWD2CR) SetBits(mask AWD2CR)

func (*RAWD2CR) Store 

func (r *RAWD2CR) Store(b AWD2CR)

func (*RAWD2CR) StoreBits 

func (r *RAWD2CR) StoreBits(mask, b AWD2CR)

type RAWD3CR 

type RAWD3CR struct{ mmio.U32 }

func (*RAWD3CR) AtomicClearBits 

func (r *RAWD3CR) AtomicClearBits(mask AWD3CR)

func (*RAWD3CR) AtomicSetBits 

func (r *RAWD3CR) AtomicSetBits(mask AWD3CR)

func (*RAWD3CR) AtomicStoreBits 

func (r *RAWD3CR) AtomicStoreBits(mask, b AWD3CR)

func (*RAWD3CR) Bits 

func (r *RAWD3CR) Bits(mask AWD3CR) AWD3CR

func (*RAWD3CR) ClearBits 

func (r *RAWD3CR) ClearBits(mask AWD3CR)

func (*RAWD3CR) Load 

func (r *RAWD3CR) Load() AWD3CR

func (*RAWD3CR) SetBits 

func (r *RAWD3CR) SetBits(mask AWD3CR)

func (*RAWD3CR) Store 

func (r *RAWD3CR) Store(b AWD3CR)

func (*RAWD3CR) StoreBits 

func (r *RAWD3CR) StoreBits(mask, b AWD3CR)

type RCALFACT 

type RCALFACT struct{ mmio.U32 }

func (*RCALFACT) AtomicClearBits 

func (r *RCALFACT) AtomicClearBits(mask CALFACT)

func (*RCALFACT) AtomicSetBits 

func (r *RCALFACT) AtomicSetBits(mask CALFACT)

func (*RCALFACT) AtomicStoreBits 

func (r *RCALFACT) AtomicStoreBits(mask, b CALFACT)

func (*RCALFACT) Bits 

func (r *RCALFACT) Bits(mask CALFACT) CALFACT

func (*RCALFACT) ClearBits 

func (r *RCALFACT) ClearBits(mask CALFACT)

func (*RCALFACT) Load 

func (r *RCALFACT) Load() CALFACT

func (*RCALFACT) SetBits 

func (r *RCALFACT) SetBits(mask CALFACT)

func (*RCALFACT) Store 

func (r *RCALFACT) Store(b CALFACT)

func (*RCALFACT) StoreBits 

func (r *RCALFACT) StoreBits(mask, b CALFACT)

type RCCR 

type RCCR struct{ mmio.U32 }

func (*RCCR) AtomicClearBits 

func (r *RCCR) AtomicClearBits(mask CCR)

func (*RCCR) AtomicSetBits 

func (r *RCCR) AtomicSetBits(mask CCR)

func (*RCCR) AtomicStoreBits 

func (r *RCCR) AtomicStoreBits(mask, b CCR)

func (*RCCR) Bits 

func (r *RCCR) Bits(mask CCR) CCR

func (*RCCR) ClearBits 

func (r *RCCR) ClearBits(mask CCR)

func (*RCCR) Load 

func (r *RCCR) Load() CCR

func (*RCCR) SetBits 

func (r *RCCR) SetBits(mask CCR)

func (*RCCR) Store 

func (r *RCCR) Store(b CCR)

func (*RCCR) StoreBits 

func (r *RCCR) StoreBits(mask, b CCR)

type RCDR 

type RCDR struct{ mmio.U32 }

func (*RCDR) AtomicClearBits 

func (r *RCDR) AtomicClearBits(mask CDR)

func (*RCDR) AtomicSetBits 

func (r *RCDR) AtomicSetBits(mask CDR)

func (*RCDR) AtomicStoreBits 

func (r *RCDR) AtomicStoreBits(mask, b CDR)

func (*RCDR) Bits 

func (r *RCDR) Bits(mask CDR) CDR

func (*RCDR) ClearBits 

func (r *RCDR) ClearBits(mask CDR)

func (*RCDR) Load 

func (r *RCDR) Load() CDR

func (*RCDR) SetBits 

func (r *RCDR) SetBits(mask CDR)

func (*RCDR) Store 

func (r *RCDR) Store(b CDR)

func (*RCDR) StoreBits 

func (r *RCDR) StoreBits(mask, b CDR)

type RCFGR 

type RCFGR struct{ mmio.U32 }

func (*RCFGR) AtomicClearBits 

func (r *RCFGR) AtomicClearBits(mask CFGR)

func (*RCFGR) AtomicSetBits 

func (r *RCFGR) AtomicSetBits(mask CFGR)

func (*RCFGR) AtomicStoreBits 

func (r *RCFGR) AtomicStoreBits(mask, b CFGR)

func (*RCFGR) Bits 

func (r *RCFGR) Bits(mask CFGR) CFGR

func (*RCFGR) ClearBits 

func (r *RCFGR) ClearBits(mask CFGR)

func (*RCFGR) Load 

func (r *RCFGR) Load() CFGR

func (*RCFGR) SetBits 

func (r *RCFGR) SetBits(mask CFGR)

func (*RCFGR) Store 

func (r *RCFGR) Store(b CFGR)

func (*RCFGR) StoreBits 

func (r *RCFGR) StoreBits(mask, b CFGR)

type RCR 

type RCR struct{ mmio.U32 }

func (*RCR) AtomicClearBits 

func (r *RCR) AtomicClearBits(mask CR)

func (*RCR) AtomicSetBits 

func (r *RCR) AtomicSetBits(mask CR)

func (*RCR) AtomicStoreBits 

func (r *RCR) AtomicStoreBits(mask, b CR)

func (*RCR) Bits 

func (r *RCR) Bits(mask CR) CR

func (*RCR) ClearBits 

func (r *RCR) ClearBits(mask CR)

func (*RCR) Load 

func (r *RCR) Load() CR

func (*RCR) SetBits 

func (r *RCR) SetBits(mask CR)

func (*RCR) Store 

func (r *RCR) Store(b CR)

func (*RCR) StoreBits 

func (r *RCR) StoreBits(mask, b CR)

type RCSR 

type RCSR struct{ mmio.U32 }

func (*RCSR) AtomicClearBits 

func (r *RCSR) AtomicClearBits(mask CSR)

func (*RCSR) AtomicSetBits 

func (r *RCSR) AtomicSetBits(mask CSR)

func (*RCSR) AtomicStoreBits 

func (r *RCSR) AtomicStoreBits(mask, b CSR)

func (*RCSR) Bits 

func (r *RCSR) Bits(mask CSR) CSR

func (*RCSR) ClearBits 

func (r *RCSR) ClearBits(mask CSR)

func (*RCSR) Load 

func (r *RCSR) Load() CSR

func (*RCSR) SetBits 

func (r *RCSR) SetBits(mask CSR)

func (*RCSR) Store 

func (r *RCSR) Store(b CSR)

func (*RCSR) StoreBits 

func (r *RCSR) StoreBits(mask, b CSR)

type RDIFSEL 

type RDIFSEL struct{ mmio.U32 }

func (*RDIFSEL) AtomicClearBits 

func (r *RDIFSEL) AtomicClearBits(mask DIFSEL)

func (*RDIFSEL) AtomicSetBits 

func (r *RDIFSEL) AtomicSetBits(mask DIFSEL)

func (*RDIFSEL) AtomicStoreBits 

func (r *RDIFSEL) AtomicStoreBits(mask, b DIFSEL)

func (*RDIFSEL) Bits 

func (r *RDIFSEL) Bits(mask DIFSEL) DIFSEL

func (*RDIFSEL) ClearBits 

func (r *RDIFSEL) ClearBits(mask DIFSEL)

func (*RDIFSEL) Load 

func (r *RDIFSEL) Load() DIFSEL

func (*RDIFSEL) SetBits 

func (r *RDIFSEL) SetBits(mask DIFSEL)

func (*RDIFSEL) Store 

func (r *RDIFSEL) Store(b DIFSEL)

func (*RDIFSEL) StoreBits 

func (r *RDIFSEL) StoreBits(mask, b DIFSEL)

type RDR 

type RDR struct{ mmio.U32 }

func (*RDR) AtomicClearBits 

func (r *RDR) AtomicClearBits(mask DR)

func (*RDR) AtomicSetBits 

func (r *RDR) AtomicSetBits(mask DR)

func (*RDR) AtomicStoreBits 

func (r *RDR) AtomicStoreBits(mask, b DR)

func (*RDR) Bits 

func (r *RDR) Bits(mask DR) DR

func (*RDR) ClearBits 

func (r *RDR) ClearBits(mask DR)

func (*RDR) Load 

func (r *RDR) Load() DR

func (*RDR) SetBits 

func (r *RDR) SetBits(mask DR)

func (*RDR) Store 

func (r *RDR) Store(b DR)

func (*RDR) StoreBits 

func (r *RDR) StoreBits(mask, b DR)

type RIER 

type RIER struct{ mmio.U32 }

func (*RIER) AtomicClearBits 

func (r *RIER) AtomicClearBits(mask IER)

func (*RIER) AtomicSetBits 

func (r *RIER) AtomicSetBits(mask IER)

func (*RIER) AtomicStoreBits 

func (r *RIER) AtomicStoreBits(mask, b IER)

func (*RIER) Bits 

func (r *RIER) Bits(mask IER) IER

func (*RIER) ClearBits 

func (r *RIER) ClearBits(mask IER)

func (*RIER) Load 

func (r *RIER) Load() IER

func (*RIER) SetBits 

func (r *RIER) SetBits(mask IER)

func (*RIER) Store 

func (r *RIER) Store(b IER)

func (*RIER) StoreBits 

func (r *RIER) StoreBits(mask, b IER)

type RISR 

type RISR struct{ mmio.U32 }

func (*RISR) AtomicClearBits 

func (r *RISR) AtomicClearBits(mask ISR)

func (*RISR) AtomicSetBits 

func (r *RISR) AtomicSetBits(mask ISR)

func (*RISR) AtomicStoreBits 

func (r *RISR) AtomicStoreBits(mask, b ISR)

func (*RISR) Bits 

func (r *RISR) Bits(mask ISR) ISR

func (*RISR) ClearBits 

func (r *RISR) ClearBits(mask ISR)

func (*RISR) Load 

func (r *RISR) Load() ISR

func (*RISR) SetBits 

func (r *RISR) SetBits(mask ISR)

func (*RISR) Store 

func (r *RISR) Store(b ISR)

func (*RISR) StoreBits 

func (r *RISR) StoreBits(mask, b ISR)

type RJDR 

type RJDR struct{ mmio.U32 }

func (*RJDR) AtomicClearBits 

func (r *RJDR) AtomicClearBits(mask JDR)

func (*RJDR) AtomicSetBits 

func (r *RJDR) AtomicSetBits(mask JDR)

func (*RJDR) AtomicStoreBits 

func (r *RJDR) AtomicStoreBits(mask, b JDR)

func (*RJDR) Bits 

func (r *RJDR) Bits(mask JDR) JDR

func (*RJDR) ClearBits 

func (r *RJDR) ClearBits(mask JDR)

func (*RJDR) Load 

func (r *RJDR) Load() JDR

func (*RJDR) SetBits 

func (r *RJDR) SetBits(mask JDR)

func (*RJDR) Store 

func (r *RJDR) Store(b JDR)

func (*RJDR) StoreBits 

func (r *RJDR) StoreBits(mask, b JDR)

type RJSQR 

type RJSQR struct{ mmio.U32 }

func (*RJSQR) AtomicClearBits 

func (r *RJSQR) AtomicClearBits(mask JSQR)

func (*RJSQR) AtomicSetBits 

func (r *RJSQR) AtomicSetBits(mask JSQR)

func (*RJSQR) AtomicStoreBits 

func (r *RJSQR) AtomicStoreBits(mask, b JSQR)

func (*RJSQR) Bits 

func (r *RJSQR) Bits(mask JSQR) JSQR

func (*RJSQR) ClearBits 

func (r *RJSQR) ClearBits(mask JSQR)

func (*RJSQR) Load 

func (r *RJSQR) Load() JSQR

func (*RJSQR) SetBits 

func (r *RJSQR) SetBits(mask JSQR)

func (*RJSQR) Store 

func (r *RJSQR) Store(b JSQR)

func (*RJSQR) StoreBits 

func (r *RJSQR) StoreBits(mask, b JSQR)

type RMAWD2CR 

type RMAWD2CR struct{ mmio.UM32 }

func (RMAWD2CR) Load 

func (rm RMAWD2CR) Load() AWD2CR

func (RMAWD2CR) Store 

func (rm RMAWD2CR) Store(b AWD2CR)

type RMAWD3CR 

type RMAWD3CR struct{ mmio.UM32 }

func (RMAWD3CR) Load 

func (rm RMAWD3CR) Load() AWD3CR

func (RMAWD3CR) Store 

func (rm RMAWD3CR) Store(b AWD3CR)

type RMCALFACT 

type RMCALFACT struct{ mmio.UM32 }

func (RMCALFACT) Load 

func (rm RMCALFACT) Load() CALFACT

func (RMCALFACT) Store 

func (rm RMCALFACT) Store(b CALFACT)

type RMCCR 

type RMCCR struct{ mmio.UM32 }

func (RMCCR) Load 

func (rm RMCCR) Load() CCR

func (RMCCR) Store 

func (rm RMCCR) Store(b CCR)

type RMCDR 

type RMCDR struct{ mmio.UM32 }

func (RMCDR) Load 

func (rm RMCDR) Load() CDR

func (RMCDR) Store 

func (rm RMCDR) Store(b CDR)

type RMCFGR 

type RMCFGR struct{ mmio.UM32 }

func (RMCFGR) Load 

func (rm RMCFGR) Load() CFGR

func (RMCFGR) Store 

func (rm RMCFGR) Store(b CFGR)

type RMCR 

type RMCR struct{ mmio.UM32 }

func (RMCR) Load 

func (rm RMCR) Load() CR

func (RMCR) Store 

func (rm RMCR) Store(b CR)

type RMCSR 

type RMCSR struct{ mmio.UM32 }

func (RMCSR) Load 

func (rm RMCSR) Load() CSR

func (RMCSR) Store 

func (rm RMCSR) Store(b CSR)

type RMDIFSEL 

type RMDIFSEL struct{ mmio.UM32 }

func (RMDIFSEL) Load 

func (rm RMDIFSEL) Load() DIFSEL

func (RMDIFSEL) Store 

func (rm RMDIFSEL) Store(b DIFSEL)

type RMDR 

type RMDR struct{ mmio.UM32 }

func (RMDR) Load 

func (rm RMDR) Load() DR

func (RMDR) Store 

func (rm RMDR) Store(b DR)

type RMIER 

type RMIER struct{ mmio.UM32 }

func (RMIER) Load 

func (rm RMIER) Load() IER

func (RMIER) Store 

func (rm RMIER) Store(b IER)

type RMISR 

type RMISR struct{ mmio.UM32 }

func (RMISR) Load 

func (rm RMISR) Load() ISR

func (RMISR) Store 

func (rm RMISR) Store(b ISR)

type RMJDR 

type RMJDR struct{ mmio.UM32 }

func (RMJDR) Load 

func (rm RMJDR) Load() JDR

func (RMJDR) Store 

func (rm RMJDR) Store(b JDR)

type RMJSQR 

type RMJSQR struct{ mmio.UM32 }

func (RMJSQR) Load 

func (rm RMJSQR) Load() JSQR

func (RMJSQR) Store 

func (rm RMJSQR) Store(b JSQR)

type RMOFR 

type RMOFR struct{ mmio.UM32 }

func (RMOFR) Load 

func (rm RMOFR) Load() OFR

func (RMOFR) Store 

func (rm RMOFR) Store(b OFR)

type RMSMPR1 

type RMSMPR1 struct{ mmio.UM32 }

func (RMSMPR1) Load 

func (rm RMSMPR1) Load() SMPR1

func (RMSMPR1) Store 

func (rm RMSMPR1) Store(b SMPR1)

type RMSMPR2 

type RMSMPR2 struct{ mmio.UM32 }

func (RMSMPR2) Load 

func (rm RMSMPR2) Load() SMPR2

func (RMSMPR2) Store 

func (rm RMSMPR2) Store(b SMPR2)

type RMSQR1 

type RMSQR1 struct{ mmio.UM32 }

func (RMSQR1) Load 

func (rm RMSQR1) Load() SQR1

func (RMSQR1) Store 

func (rm RMSQR1) Store(b SQR1)

type RMSQR2 

type RMSQR2 struct{ mmio.UM32 }

func (RMSQR2) Load 

func (rm RMSQR2) Load() SQR2

func (RMSQR2) Store 

func (rm RMSQR2) Store(b SQR2)

type RMSQR3 

type RMSQR3 struct{ mmio.UM32 }

func (RMSQR3) Load 

func (rm RMSQR3) Load() SQR3

func (RMSQR3) Store 

func (rm RMSQR3) Store(b SQR3)

type RMSQR4 

type RMSQR4 struct{ mmio.UM32 }

func (RMSQR4) Load 

func (rm RMSQR4) Load() SQR4

func (RMSQR4) Store 

func (rm RMSQR4) Store(b SQR4)

type RMTR1 

type RMTR1 struct{ mmio.UM32 }

func (RMTR1) Load 

func (rm RMTR1) Load() TR1

func (RMTR1) Store 

func (rm RMTR1) Store(b TR1)

type RMTR2 

type RMTR2 struct{ mmio.UM32 }

func (RMTR2) Load 

func (rm RMTR2) Load() TR2

func (RMTR2) Store 

func (rm RMTR2) Store(b TR2)

type RMTR3 

type RMTR3 struct{ mmio.UM32 }

func (RMTR3) Load 

func (rm RMTR3) Load() TR3

func (RMTR3) Store 

func (rm RMTR3) Store(b TR3)

type ROFR 

type ROFR struct{ mmio.U32 }

func (*ROFR) AtomicClearBits 

func (r *ROFR) AtomicClearBits(mask OFR)

func (*ROFR) AtomicSetBits 

func (r *ROFR) AtomicSetBits(mask OFR)

func (*ROFR) AtomicStoreBits 

func (r *ROFR) AtomicStoreBits(mask, b OFR)

func (*ROFR) Bits 

func (r *ROFR) Bits(mask OFR) OFR

func (*ROFR) ClearBits 

func (r *ROFR) ClearBits(mask OFR)

func (*ROFR) Load 

func (r *ROFR) Load() OFR

func (*ROFR) SetBits 

func (r *ROFR) SetBits(mask OFR)

func (*ROFR) Store 

func (r *ROFR) Store(b OFR)

func (*ROFR) StoreBits 

func (r *ROFR) StoreBits(mask, b OFR)

type RSMPR1 

type RSMPR1 struct{ mmio.U32 }

func (*RSMPR1) AtomicClearBits 

func (r *RSMPR1) AtomicClearBits(mask SMPR1)

func (*RSMPR1) AtomicSetBits 

func (r *RSMPR1) AtomicSetBits(mask SMPR1)

func (*RSMPR1) AtomicStoreBits 

func (r *RSMPR1) AtomicStoreBits(mask, b SMPR1)

func (*RSMPR1) Bits 

func (r *RSMPR1) Bits(mask SMPR1) SMPR1

func (*RSMPR1) ClearBits 

func (r *RSMPR1) ClearBits(mask SMPR1)

func (*RSMPR1) Load 

func (r *RSMPR1) Load() SMPR1

func (*RSMPR1) SetBits 

func (r *RSMPR1) SetBits(mask SMPR1)

func (*RSMPR1) Store 

func (r *RSMPR1) Store(b SMPR1)

func (*RSMPR1) StoreBits 

func (r *RSMPR1) StoreBits(mask, b SMPR1)

type RSMPR2 

type RSMPR2 struct{ mmio.U32 }

func (*RSMPR2) AtomicClearBits 

func (r *RSMPR2) AtomicClearBits(mask SMPR2)

func (*RSMPR2) AtomicSetBits 

func (r *RSMPR2) AtomicSetBits(mask SMPR2)

func (*RSMPR2) AtomicStoreBits 

func (r *RSMPR2) AtomicStoreBits(mask, b SMPR2)

func (*RSMPR2) Bits 

func (r *RSMPR2) Bits(mask SMPR2) SMPR2

func (*RSMPR2) ClearBits 

func (r *RSMPR2) ClearBits(mask SMPR2)

func (*RSMPR2) Load 

func (r *RSMPR2) Load() SMPR2

func (*RSMPR2) SetBits 

func (r *RSMPR2) SetBits(mask SMPR2)

func (*RSMPR2) Store 

func (r *RSMPR2) Store(b SMPR2)

func (*RSMPR2) StoreBits 

func (r *RSMPR2) StoreBits(mask, b SMPR2)

type RSQR1 

type RSQR1 struct{ mmio.U32 }

func (*RSQR1) AtomicClearBits 

func (r *RSQR1) AtomicClearBits(mask SQR1)

func (*RSQR1) AtomicSetBits 

func (r *RSQR1) AtomicSetBits(mask SQR1)

func (*RSQR1) AtomicStoreBits 

func (r *RSQR1) AtomicStoreBits(mask, b SQR1)

func (*RSQR1) Bits 

func (r *RSQR1) Bits(mask SQR1) SQR1

func (*RSQR1) ClearBits 

func (r *RSQR1) ClearBits(mask SQR1)

func (*RSQR1) Load 

func (r *RSQR1) Load() SQR1

func (*RSQR1) SetBits 

func (r *RSQR1) SetBits(mask SQR1)

func (*RSQR1) Store 

func (r *RSQR1) Store(b SQR1)

func (*RSQR1) StoreBits 

func (r *RSQR1) StoreBits(mask, b SQR1)

type RSQR2 

type RSQR2 struct{ mmio.U32 }

func (*RSQR2) AtomicClearBits 

func (r *RSQR2) AtomicClearBits(mask SQR2)

func (*RSQR2) AtomicSetBits 

func (r *RSQR2) AtomicSetBits(mask SQR2)

func (*RSQR2) AtomicStoreBits 

func (r *RSQR2) AtomicStoreBits(mask, b SQR2)

func (*RSQR2) Bits 

func (r *RSQR2) Bits(mask SQR2) SQR2

func (*RSQR2) ClearBits 

func (r *RSQR2) ClearBits(mask SQR2)

func (*RSQR2) Load 

func (r *RSQR2) Load() SQR2

func (*RSQR2) SetBits 

func (r *RSQR2) SetBits(mask SQR2)

func (*RSQR2) Store 

func (r *RSQR2) Store(b SQR2)

func (*RSQR2) StoreBits 

func (r *RSQR2) StoreBits(mask, b SQR2)

type RSQR3 

type RSQR3 struct{ mmio.U32 }

func (*RSQR3) AtomicClearBits 

func (r *RSQR3) AtomicClearBits(mask SQR3)

func (*RSQR3) AtomicSetBits 

func (r *RSQR3) AtomicSetBits(mask SQR3)

func (*RSQR3) AtomicStoreBits 

func (r *RSQR3) AtomicStoreBits(mask, b SQR3)

func (*RSQR3) Bits 

func (r *RSQR3) Bits(mask SQR3) SQR3

func (*RSQR3) ClearBits 

func (r *RSQR3) ClearBits(mask SQR3)

func (*RSQR3) Load 

func (r *RSQR3) Load() SQR3

func (*RSQR3) SetBits 

func (r *RSQR3) SetBits(mask SQR3)

func (*RSQR3) Store 

func (r *RSQR3) Store(b SQR3)

func (*RSQR3) StoreBits 

func (r *RSQR3) StoreBits(mask, b SQR3)

type RSQR4 

type RSQR4 struct{ mmio.U32 }

func (*RSQR4) AtomicClearBits 

func (r *RSQR4) AtomicClearBits(mask SQR4)

func (*RSQR4) AtomicSetBits 

func (r *RSQR4) AtomicSetBits(mask SQR4)

func (*RSQR4) AtomicStoreBits 

func (r *RSQR4) AtomicStoreBits(mask, b SQR4)

func (*RSQR4) Bits 

func (r *RSQR4) Bits(mask SQR4) SQR4

func (*RSQR4) ClearBits 

func (r *RSQR4) ClearBits(mask SQR4)

func (*RSQR4) Load 

func (r *RSQR4) Load() SQR4

func (*RSQR4) SetBits 

func (r *RSQR4) SetBits(mask SQR4)

func (*RSQR4) Store 

func (r *RSQR4) Store(b SQR4)

func (*RSQR4) StoreBits 

func (r *RSQR4) StoreBits(mask, b SQR4)

type RTR1 

type RTR1 struct{ mmio.U32 }

func (*RTR1) AtomicClearBits 

func (r *RTR1) AtomicClearBits(mask TR1)

func (*RTR1) AtomicSetBits 

func (r *RTR1) AtomicSetBits(mask TR1)

func (*RTR1) AtomicStoreBits 

func (r *RTR1) AtomicStoreBits(mask, b TR1)

func (*RTR1) Bits 

func (r *RTR1) Bits(mask TR1) TR1

func (*RTR1) ClearBits 

func (r *RTR1) ClearBits(mask TR1)

func (*RTR1) Load 

func (r *RTR1) Load() TR1

func (*RTR1) SetBits 

func (r *RTR1) SetBits(mask TR1)

func (*RTR1) Store 

func (r *RTR1) Store(b TR1)

func (*RTR1) StoreBits 

func (r *RTR1) StoreBits(mask, b TR1)

type RTR2 

type RTR2 struct{ mmio.U32 }

func (*RTR2) AtomicClearBits 

func (r *RTR2) AtomicClearBits(mask TR2)

func (*RTR2) AtomicSetBits 

func (r *RTR2) AtomicSetBits(mask TR2)

func (*RTR2) AtomicStoreBits 

func (r *RTR2) AtomicStoreBits(mask, b TR2)

func (*RTR2) Bits 

func (r *RTR2) Bits(mask TR2) TR2

func (*RTR2) ClearBits 

func (r *RTR2) ClearBits(mask TR2)

func (*RTR2) Load 

func (r *RTR2) Load() TR2

func (*RTR2) SetBits 

func (r *RTR2) SetBits(mask TR2)

func (*RTR2) Store 

func (r *RTR2) Store(b TR2)

func (*RTR2) StoreBits 

func (r *RTR2) StoreBits(mask, b TR2)

type RTR3 

type RTR3 struct{ mmio.U32 }

func (*RTR3) AtomicClearBits 

func (r *RTR3) AtomicClearBits(mask TR3)

func (*RTR3) AtomicSetBits 

func (r *RTR3) AtomicSetBits(mask TR3)

func (*RTR3) AtomicStoreBits 

func (r *RTR3) AtomicStoreBits(mask, b TR3)

func (*RTR3) Bits 

func (r *RTR3) Bits(mask TR3) TR3

func (*RTR3) ClearBits 

func (r *RTR3) ClearBits(mask TR3)

func (*RTR3) Load 

func (r *RTR3) Load() TR3

func (*RTR3) SetBits 

func (r *RTR3) SetBits(mask TR3)

func (*RTR3) Store 

func (r *RTR3) Store(b TR3)

func (*RTR3) StoreBits 

func (r *RTR3) StoreBits(mask, b TR3)

type SMPR1 

type SMPR1 uint32
const (
	SMP0 SMPR1 = 0x07 << 0  //+ ADC channel 0 sampling time selection.
	SMP1 SMPR1 = 0x07 << 3  //+ ADC channel 1 sampling time selection.
	SMP2 SMPR1 = 0x07 << 6  //+ ADC channel 2 sampling time selection.
	SMP3 SMPR1 = 0x07 << 9  //+ ADC channel 3 sampling time selection.
	SMP4 SMPR1 = 0x07 << 12 //+ ADC channel 4 sampling time selection.
	SMP5 SMPR1 = 0x07 << 15 //+ ADC channel 5 sampling time selection.
	SMP6 SMPR1 = 0x07 << 18 //+ ADC channel 6 sampling time selection.
	SMP7 SMPR1 = 0x07 << 21 //+ ADC channel 7 sampling time selection.
	SMP8 SMPR1 = 0x07 << 24 //+ ADC channel 8 sampling time selection.
	SMP9 SMPR1 = 0x07 << 27 //+ ADC channel 9 sampling time selection.
)

func (SMPR1) Field 

func (b SMPR1) Field(mask SMPR1) int

func (SMPR1) J 

func (mask SMPR1) J(v int) SMPR1

type SMPR2 

type SMPR2 uint32
const (
	SMP10 SMPR2 = 0x07 << 0  //+ ADC channel 10 sampling time selection.
	SMP11 SMPR2 = 0x07 << 3  //+ ADC channel 11 sampling time selection.
	SMP12 SMPR2 = 0x07 << 6  //+ ADC channel 12 sampling time selection.
	SMP13 SMPR2 = 0x07 << 9  //+ ADC channel 13 sampling time selection.
	SMP14 SMPR2 = 0x07 << 12 //+ ADC channel 14 sampling time selection.
	SMP15 SMPR2 = 0x07 << 15 //+ ADC channel 15 sampling time selection.
	SMP16 SMPR2 = 0x07 << 18 //+ ADC channel 16 sampling time selection.
	SMP17 SMPR2 = 0x07 << 21 //+ ADC channel 17 sampling time selection.
	SMP18 SMPR2 = 0x07 << 24 //+ ADC channel 18 sampling time selection.
)

func (SMPR2) Field 

func (b SMPR2) Field(mask SMPR2) int

func (SMPR2) J 

func (mask SMPR2) J(v int) SMPR2

type SQR1 

type SQR1 uint32
const (
	L   SQR1 = 0x0F << 0  //+ ADC group regular sequencer scan length.
	SQ1 SQR1 = 0x1F << 6  //+ ADC group regular sequencer rank 1.
	SQ2 SQR1 = 0x1F << 12 //+ ADC group regular sequencer rank 2.
	SQ3 SQR1 = 0x1F << 18 //+ ADC group regular sequencer rank 3.
	SQ4 SQR1 = 0x1F << 24 //+ ADC group regular sequencer rank 4.
)

func (SQR1) Field 

func (b SQR1) Field(mask SQR1) int

func (SQR1) J 

func (mask SQR1) J(v int) SQR1

type SQR2 

type SQR2 uint32
const (
	SQ5 SQR2 = 0x1F << 0  //+ ADC group regular sequencer rank 5.
	SQ6 SQR2 = 0x1F << 6  //+ ADC group regular sequencer rank 6.
	SQ7 SQR2 = 0x1F << 12 //+ ADC group regular sequencer rank 7.
	SQ8 SQR2 = 0x1F << 18 //+ ADC group regular sequencer rank 8.
	SQ9 SQR2 = 0x1F << 24 //+ ADC group regular sequencer rank 9.
)

func (SQR2) Field 

func (b SQR2) Field(mask SQR2) int

func (SQR2) J 

func (mask SQR2) J(v int) SQR2

type SQR3 

type SQR3 uint32
const (
	SQ10 SQR3 = 0x1F << 0  //+ ADC group regular sequencer rank 10.
	SQ11 SQR3 = 0x1F << 6  //+ ADC group regular sequencer rank 11.
	SQ12 SQR3 = 0x1F << 12 //+ ADC group regular sequencer rank 12.
	SQ13 SQR3 = 0x1F << 18 //+ ADC group regular sequencer rank 13.
	SQ14 SQR3 = 0x1F << 24 //+ ADC group regular sequencer rank 14.
)

func (SQR3) Field 

func (b SQR3) Field(mask SQR3) int

func (SQR3) J 

func (mask SQR3) J(v int) SQR3

type SQR4 

type SQR4 uint32
const (
	SQ15 SQR4 = 0x1F << 0 //+ ADC group regular sequencer rank 15.
	SQ16 SQR4 = 0x1F << 6 //+ ADC group regular sequencer rank 16.
)

func (SQR4) Field 

func (b SQR4) Field(mask SQR4) int

func (SQR4) J 

func (mask SQR4) J(v int) SQR4

type TR1 

type TR1 uint32
const (
	LT1 TR1 = 0xFFF << 0  //+ ADC analog watchdog 1 threshold low.
	HT1 TR1 = 0xFFF << 16 //+ ADC Analog watchdog 1 threshold high.
)

func (TR1) Field 

func (b TR1) Field(mask TR1) int

func (TR1) J 

func (mask TR1) J(v int) TR1

type TR2 

type TR2 uint32
const (
	LT2 TR2 = 0xFF << 0  //+ ADC analog watchdog 2 threshold low.
	HT2 TR2 = 0xFF << 16 //+ ADC analog watchdog 2 threshold high.
)

func (TR2) Field 

func (b TR2) Field(mask TR2) int

func (TR2) J 

func (mask TR2) J(v int) TR2

type TR3 

type TR3 uint32
const (
	LT3 TR3 = 0xFF << 0  //+ ADC analog watchdog 3 threshold low.
	HT3 TR3 = 0xFF << 16 //+ ADC analog watchdog 3 threshold high.
)

func (TR3) Field 

func (b TR3) Field(mask TR3) int

func (TR3) J 

func (mask TR3) J(v int) TR3

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