dbgmcu

package
v0.0.0-...-168ccc2 Latest Latest
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 Go to latest Published: Dec 5, 2021 License: BSD-3-Clause Imports: 4 Imported by: 0

Documentation

Overview

Package dbgmcu provides interface to Debug MCU.

Peripheral: DBGMCU_Periph Debug MCU. Instances: 

DBGMCU  mmap.DBGMCU_BASE

Registers: 

0x00 32  IDCODE
0x04 32  CR

Import: 

stm32/o/f10x_hd/mmap

Index

Constants

View Source 
const (
	DEV_IDn = 0
	REV_IDn = 16
)
View Source 
const (
	DBG_SLEEPn              = 0
	DBG_STOPn               = 1
	DBG_STANDBYn            = 2
	TRACE_IOENn             = 5
	TRACE_MODEn             = 6
	DBG_IWDG_STOPn          = 8
	DBG_WWDG_STOPn          = 9
	DBG_TIM1_STOPn          = 10
	DBG_TIM2_STOPn          = 11
	DBG_TIM3_STOPn          = 12
	DBG_TIM4_STOPn          = 13
	DBG_CAN1_STOPn          = 14
	DBG_I2C1_SMBUS_TIMEOUTn = 15
	DBG_I2C2_SMBUS_TIMEOUTn = 16
	DBG_TIM8_STOPn          = 17
	DBG_TIM5_STOPn          = 18
	DBG_TIM6_STOPn          = 19
	DBG_TIM7_STOPn          = 20
	DBG_CAN2_STOPn          = 21
	DBG_TIM15_STOPn         = 22
	DBG_TIM16_STOPn         = 23
	DBG_TIM17_STOPn         = 24
	DBG_TIM12_STOPn         = 25
	DBG_TIM13_STOPn         = 26
	DBG_TIM14_STOPn         = 27
	DBG_TIM9_STOPn          = 28
	DBG_TIM10_STOPn         = 29
	DBG_TIM11_STOPn         = 30
)

Variables

View Source 
var DBGMCU = (*DBGMCU_Periph)(unsafe.Pointer(uintptr(mmap.DBGMCU_BASE)))

Functions

This section is empty.

Types

type CR 

type CR uint32
const (
	DBG_SLEEP              CR = 0x01 << 0  //+ Debug Sleep Mode.
	DBG_STOP               CR = 0x01 << 1  //+ Debug Stop Mode.
	DBG_STANDBY            CR = 0x01 << 2  //+ Debug Standby mode.
	TRACE_IOEN             CR = 0x01 << 5  //+ Trace Pin Assignment Control.
	TRACE_MODE             CR = 0x03 << 6  //+ TRACE_MODE[1:0] bits (Trace Pin Assignment Control).
	TRACE_MODE_0           CR = 0x01 << 6  //  Bit 0.
	TRACE_MODE_1           CR = 0x02 << 6  //  Bit 1.
	DBG_IWDG_STOP          CR = 0x01 << 8  //+ Debug Independent Watchdog stopped when Core is halted.
	DBG_WWDG_STOP          CR = 0x01 << 9  //+ Debug Window Watchdog stopped when Core is halted.
	DBG_TIM1_STOP          CR = 0x01 << 10 //+ TIM1 counter stopped when core is halted.
	DBG_TIM2_STOP          CR = 0x01 << 11 //+ TIM2 counter stopped when core is halted.
	DBG_TIM3_STOP          CR = 0x01 << 12 //+ TIM3 counter stopped when core is halted.
	DBG_TIM4_STOP          CR = 0x01 << 13 //+ TIM4 counter stopped when core is halted.
	DBG_CAN1_STOP          CR = 0x01 << 14 //+ Debug CAN1 stopped when Core is halted.
	DBG_I2C1_SMBUS_TIMEOUT CR = 0x01 << 15 //+ SMBUS timeout mode stopped when Core is halted.
	DBG_I2C2_SMBUS_TIMEOUT CR = 0x01 << 16 //+ SMBUS timeout mode stopped when Core is halted.
	DBG_TIM8_STOP          CR = 0x01 << 17 //+ TIM8 counter stopped when core is halted.
	DBG_TIM5_STOP          CR = 0x01 << 18 //+ TIM5 counter stopped when core is halted.
	DBG_TIM6_STOP          CR = 0x01 << 19 //+ TIM6 counter stopped when core is halted.
	DBG_TIM7_STOP          CR = 0x01 << 20 //+ TIM7 counter stopped when core is halted.
	DBG_CAN2_STOP          CR = 0x01 << 21 //+ Debug CAN2 stopped when Core is halted.
	DBG_TIM15_STOP         CR = 0x01 << 22 //+ Debug TIM15 stopped when Core is halted.
	DBG_TIM16_STOP         CR = 0x01 << 23 //+ Debug TIM16 stopped when Core is halted.
	DBG_TIM17_STOP         CR = 0x01 << 24 //+ Debug TIM17 stopped when Core is halted.
	DBG_TIM12_STOP         CR = 0x01 << 25 //+ Debug TIM12 stopped when Core is halted.
	DBG_TIM13_STOP         CR = 0x01 << 26 //+ Debug TIM13 stopped when Core is halted.
	DBG_TIM14_STOP         CR = 0x01 << 27 //+ Debug TIM14 stopped when Core is halted.
	DBG_TIM9_STOP          CR = 0x01 << 28 //+ Debug TIM9 stopped when Core is halted.
	DBG_TIM10_STOP         CR = 0x01 << 29 //+ Debug TIM10 stopped when Core is halted.
	DBG_TIM11_STOP         CR = 0x01 << 30 //+ Debug TIM11 stopped when Core is halted.
)

func (CR) Field 

func (b CR) Field(mask CR) int

func (CR) J 

func (mask CR) J(v int) CR

type DBGMCU_Periph 

type DBGMCU_Periph struct {
	IDCODE RIDCODE
	CR     RCR
}

func (*DBGMCU_Periph) BaseAddr 

func (p *DBGMCU_Periph) BaseAddr() uintptr

func (*DBGMCU_Periph) DBG_CAN1_STOP 

func (p *DBGMCU_Periph) DBG_CAN1_STOP() RMCR

func (*DBGMCU_Periph) DBG_CAN2_STOP 

func (p *DBGMCU_Periph) DBG_CAN2_STOP() RMCR

func (*DBGMCU_Periph) DBG_I2C1_SMBUS_TIMEOUT 

func (p *DBGMCU_Periph) DBG_I2C1_SMBUS_TIMEOUT() RMCR

func (*DBGMCU_Periph) DBG_I2C2_SMBUS_TIMEOUT 

func (p *DBGMCU_Periph) DBG_I2C2_SMBUS_TIMEOUT() RMCR

func (*DBGMCU_Periph) DBG_IWDG_STOP 

func (p *DBGMCU_Periph) DBG_IWDG_STOP() RMCR

func (*DBGMCU_Periph) DBG_SLEEP 

func (p *DBGMCU_Periph) DBG_SLEEP() RMCR

func (*DBGMCU_Periph) DBG_STANDBY 

func (p *DBGMCU_Periph) DBG_STANDBY() RMCR

func (*DBGMCU_Periph) DBG_STOP 

func (p *DBGMCU_Periph) DBG_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM10_STOP 

func (p *DBGMCU_Periph) DBG_TIM10_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM11_STOP 

func (p *DBGMCU_Periph) DBG_TIM11_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM12_STOP 

func (p *DBGMCU_Periph) DBG_TIM12_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM13_STOP 

func (p *DBGMCU_Periph) DBG_TIM13_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM14_STOP 

func (p *DBGMCU_Periph) DBG_TIM14_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM15_STOP 

func (p *DBGMCU_Periph) DBG_TIM15_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM16_STOP 

func (p *DBGMCU_Periph) DBG_TIM16_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM17_STOP 

func (p *DBGMCU_Periph) DBG_TIM17_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM1_STOP 

func (p *DBGMCU_Periph) DBG_TIM1_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM2_STOP 

func (p *DBGMCU_Periph) DBG_TIM2_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM3_STOP 

func (p *DBGMCU_Periph) DBG_TIM3_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM4_STOP 

func (p *DBGMCU_Periph) DBG_TIM4_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM5_STOP 

func (p *DBGMCU_Periph) DBG_TIM5_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM6_STOP 

func (p *DBGMCU_Periph) DBG_TIM6_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM7_STOP 

func (p *DBGMCU_Periph) DBG_TIM7_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM8_STOP 

func (p *DBGMCU_Periph) DBG_TIM8_STOP() RMCR

func (*DBGMCU_Periph) DBG_TIM9_STOP 

func (p *DBGMCU_Periph) DBG_TIM9_STOP() RMCR

func (*DBGMCU_Periph) DBG_WWDG_STOP 

func (p *DBGMCU_Periph) DBG_WWDG_STOP() RMCR

func (*DBGMCU_Periph) DEV_ID 

func (p *DBGMCU_Periph) DEV_ID() RMIDCODE

func (*DBGMCU_Periph) REV_ID 

func (p *DBGMCU_Periph) REV_ID() RMIDCODE

func (*DBGMCU_Periph) TRACE_IOEN 

func (p *DBGMCU_Periph) TRACE_IOEN() RMCR

func (*DBGMCU_Periph) TRACE_MODE 

func (p *DBGMCU_Periph) TRACE_MODE() RMCR

type IDCODE 

type IDCODE uint32
const (
	DEV_ID    IDCODE = 0xFFF << 0   //+ Device Identifier.
	REV_ID    IDCODE = 0xFFFF << 16 //+ REV_ID[15:0] bits (Revision Identifier).
	REV_ID_0  IDCODE = 0x01 << 16   //  Bit 0.
	REV_ID_1  IDCODE = 0x02 << 16   //  Bit 1.
	REV_ID_2  IDCODE = 0x04 << 16   //  Bit 2.
	REV_ID_3  IDCODE = 0x08 << 16   //  Bit 3.
	REV_ID_4  IDCODE = 0x10 << 16   //  Bit 4.
	REV_ID_5  IDCODE = 0x20 << 16   //  Bit 5.
	REV_ID_6  IDCODE = 0x40 << 16   //  Bit 6.
	REV_ID_7  IDCODE = 0x80 << 16   //  Bit 7.
	REV_ID_8  IDCODE = 0x100 << 16  //  Bit 8.
	REV_ID_9  IDCODE = 0x200 << 16  //  Bit 9.
	REV_ID_10 IDCODE = 0x400 << 16  //  Bit 10.
	REV_ID_11 IDCODE = 0x800 << 16  //  Bit 11.
	REV_ID_12 IDCODE = 0x1000 << 16 //  Bit 12.
	REV_ID_13 IDCODE = 0x2000 << 16 //  Bit 13.
	REV_ID_14 IDCODE = 0x4000 << 16 //  Bit 14.
	REV_ID_15 IDCODE = 0x8000 << 16 //  Bit 15.
)

func (IDCODE) Field 

func (b IDCODE) Field(mask IDCODE) int

func (IDCODE) J 

func (mask IDCODE) J(v int) IDCODE

type RCR 

type RCR struct{ mmio.U32 }

func (*RCR) AtomicClearBits 

func (r *RCR) AtomicClearBits(mask CR)

func (*RCR) AtomicSetBits 

func (r *RCR) AtomicSetBits(mask CR)

func (*RCR) AtomicStoreBits 

func (r *RCR) AtomicStoreBits(mask, b CR)

func (*RCR) Bits 

func (r *RCR) Bits(mask CR) CR

func (*RCR) ClearBits 

func (r *RCR) ClearBits(mask CR)

func (*RCR) Load 

func (r *RCR) Load() CR

func (*RCR) SetBits 

func (r *RCR) SetBits(mask CR)

func (*RCR) Store 

func (r *RCR) Store(b CR)

func (*RCR) StoreBits 

func (r *RCR) StoreBits(mask, b CR)

type RIDCODE 

type RIDCODE struct{ mmio.U32 }

func (*RIDCODE) AtomicClearBits 

func (r *RIDCODE) AtomicClearBits(mask IDCODE)

func (*RIDCODE) AtomicSetBits 

func (r *RIDCODE) AtomicSetBits(mask IDCODE)

func (*RIDCODE) AtomicStoreBits 

func (r *RIDCODE) AtomicStoreBits(mask, b IDCODE)

func (*RIDCODE) Bits 

func (r *RIDCODE) Bits(mask IDCODE) IDCODE

func (*RIDCODE) ClearBits 

func (r *RIDCODE) ClearBits(mask IDCODE)

func (*RIDCODE) Load 

func (r *RIDCODE) Load() IDCODE

func (*RIDCODE) SetBits 

func (r *RIDCODE) SetBits(mask IDCODE)

func (*RIDCODE) Store 

func (r *RIDCODE) Store(b IDCODE)

func (*RIDCODE) StoreBits 

func (r *RIDCODE) StoreBits(mask, b IDCODE)

type RMCR 

type RMCR struct{ mmio.UM32 }

func (RMCR) Load 

func (rm RMCR) Load() CR

func (RMCR) Store 

func (rm RMCR) Store(b CR)

type RMIDCODE 

type RMIDCODE struct{ mmio.UM32 }

func (RMIDCODE) Load 

func (rm RMIDCODE) Load() IDCODE

func (RMIDCODE) Store 

func (rm RMIDCODE) Store(b IDCODE)

Source Files

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