afio

package
v0.0.0-...-168ccc2 Latest Latest
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 Go to latest Published: Dec 5, 2021 License: BSD-3-Clause Imports: 4 Imported by: 0

Documentation

Overview

Package afio provides interface to Alternate Function I/O.

Peripheral: AFIO_Periph Alternate Function I/O. Instances: 

AFIO  mmap.AFIO_BASE

Registers: 

0x00 32  EVCR
0x04 32  MAPR
0x08 32  EXTICR[4]
0x1C 32  MAPR2

Import: 

stm32/o/f10x_hd/mmap

Index

Constants

View Source 
const (
	PINn  = 0
	PORTn = 4
	EVOEn = 7
)
View Source 
const (
	SPI1_REMAPn         = 0
	I2C1_REMAPn         = 1
	USART1_REMAPn       = 2
	USART2_REMAPn       = 3
	USART3_REMAPn       = 4
	TIM1_REMAPn         = 6
	TIM2_REMAPn         = 8
	TIM3_REMAPn         = 10
	TIM4_REMAPn         = 12
	CAN_REMAPn          = 13
	PD01_REMAPn         = 15
	TIM5CH4_IREMAPn     = 16
	ADC1_ETRGINJ_REMAPn = 17
	ADC1_ETRGREG_REMAPn = 18
	ADC2_ETRGINJ_REMAPn = 19
	ADC2_ETRGREG_REMAPn = 20
	SWJ_CFGn            = 24
)
View Source 
const (
	EXTI0n = 0
	EXTI1n = 4
	EXTI2n = 8
	EXTI3n = 12
)

Variables

View Source 
var AFIO = (*AFIO_Periph)(unsafe.Pointer(uintptr(mmap.AFIO_BASE)))

Functions

This section is empty.

Types

type AFIO_Periph 

type AFIO_Periph struct {
	EVCR   REVCR
	MAPR   RMAPR
	EXTICR [4]REXTICR

	MAPR2 RMAPR2
	// contains filtered or unexported fields
}

func (*AFIO_Periph) ADC1_ETRGINJ_REMAP 

func (p *AFIO_Periph) ADC1_ETRGINJ_REMAP() RMMAPR

func (*AFIO_Periph) ADC1_ETRGREG_REMAP 

func (p *AFIO_Periph) ADC1_ETRGREG_REMAP() RMMAPR

func (*AFIO_Periph) ADC2_ETRGINJ_REMAP 

func (p *AFIO_Periph) ADC2_ETRGINJ_REMAP() RMMAPR

func (*AFIO_Periph) ADC2_ETRGREG_REMAP 

func (p *AFIO_Periph) ADC2_ETRGREG_REMAP() RMMAPR

func (*AFIO_Periph) BaseAddr 

func (p *AFIO_Periph) BaseAddr() uintptr

func (*AFIO_Periph) CAN_REMAP 

func (p *AFIO_Periph) CAN_REMAP() RMMAPR

func (*AFIO_Periph) EVOE 

func (p *AFIO_Periph) EVOE() RMEVCR

func (*AFIO_Periph) EXTI0 

func (p *AFIO_Periph) EXTI0(n int) RMEXTICR

func (*AFIO_Periph) EXTI1 

func (p *AFIO_Periph) EXTI1(n int) RMEXTICR

func (*AFIO_Periph) EXTI2 

func (p *AFIO_Periph) EXTI2(n int) RMEXTICR

func (*AFIO_Periph) EXTI3 

func (p *AFIO_Periph) EXTI3(n int) RMEXTICR

func (*AFIO_Periph) I2C1_REMAP 

func (p *AFIO_Periph) I2C1_REMAP() RMMAPR

func (*AFIO_Periph) PD01_REMAP 

func (p *AFIO_Periph) PD01_REMAP() RMMAPR

func (*AFIO_Periph) PIN 

func (p *AFIO_Periph) PIN() RMEVCR

func (*AFIO_Periph) PORT 

func (p *AFIO_Periph) PORT() RMEVCR

func (*AFIO_Periph) SPI1_REMAP 

func (p *AFIO_Periph) SPI1_REMAP() RMMAPR

func (*AFIO_Periph) SWJ_CFG 

func (p *AFIO_Periph) SWJ_CFG() RMMAPR

func (*AFIO_Periph) TIM1_REMAP 

func (p *AFIO_Periph) TIM1_REMAP() RMMAPR

func (*AFIO_Periph) TIM2_REMAP 

func (p *AFIO_Periph) TIM2_REMAP() RMMAPR

func (*AFIO_Periph) TIM3_REMAP 

func (p *AFIO_Periph) TIM3_REMAP() RMMAPR

func (*AFIO_Periph) TIM4_REMAP 

func (p *AFIO_Periph) TIM4_REMAP() RMMAPR

func (*AFIO_Periph) TIM5CH4_IREMAP 

func (p *AFIO_Periph) TIM5CH4_IREMAP() RMMAPR

func (*AFIO_Periph) USART1_REMAP 

func (p *AFIO_Periph) USART1_REMAP() RMMAPR

func (*AFIO_Periph) USART2_REMAP 

func (p *AFIO_Periph) USART2_REMAP() RMMAPR

func (*AFIO_Periph) USART3_REMAP 

func (p *AFIO_Periph) USART3_REMAP() RMMAPR

type EVCR 

type EVCR uint32
const (
	PIN      EVCR = 0x0F << 0 //+ PIN[3:0] bits (Pin selection).
	PIN_0    EVCR = 0x01 << 0 //  Bit 0.
	PIN_1    EVCR = 0x02 << 0 //  Bit 1.
	PIN_2    EVCR = 0x04 << 0 //  Bit 2.
	PIN_3    EVCR = 0x08 << 0 //  Bit 3.
	PIN_PX0  EVCR = 0x00 << 0 //  Pin 0 selected.
	PIN_PX1  EVCR = 0x01 << 0 //  Pin 1 selected.
	PIN_PX2  EVCR = 0x02 << 0 //  Pin 2 selected.
	PIN_PX3  EVCR = 0x03 << 0 //  Pin 3 selected.
	PIN_PX4  EVCR = 0x04 << 0 //  Pin 4 selected.
	PIN_PX5  EVCR = 0x05 << 0 //  Pin 5 selected.
	PIN_PX6  EVCR = 0x06 << 0 //  Pin 6 selected.
	PIN_PX7  EVCR = 0x07 << 0 //  Pin 7 selected.
	PIN_PX8  EVCR = 0x08 << 0 //  Pin 8 selected.
	PIN_PX9  EVCR = 0x09 << 0 //  Pin 9 selected.
	PIN_PX10 EVCR = 0x0A << 0 //  Pin 10 selected.
	PIN_PX11 EVCR = 0x0B << 0 //  Pin 11 selected.
	PIN_PX12 EVCR = 0x0C << 0 //  Pin 12 selected.
	PIN_PX13 EVCR = 0x0D << 0 //  Pin 13 selected.
	PIN_PX14 EVCR = 0x0E << 0 //  Pin 14 selected.
	PIN_PX15 EVCR = 0x0F << 0 //  Pin 15 selected.
	PORT     EVCR = 0x07 << 4 //+ PORT[2:0] bits (Port selection).
	PORT_0   EVCR = 0x01 << 4 //  Bit 0.
	PORT_1   EVCR = 0x02 << 4 //  Bit 1.
	PORT_2   EVCR = 0x04 << 4 //  Bit 2.
	PORT_PA  EVCR = 0x00 << 4 //  Port A selected.
	PORT_PB  EVCR = 0x01 << 4 //  Port B selected.
	PORT_PC  EVCR = 0x02 << 4 //  Port C selected.
	PORT_PD  EVCR = 0x03 << 4 //  Port D selected.
	PORT_PE  EVCR = 0x04 << 4 //  Port E selected.
	EVOE     EVCR = 0x01 << 7 //+ Event Output Enable.
)

func (EVCR) Field 

func (b EVCR) Field(mask EVCR) int

func (EVCR) J 

func (mask EVCR) J(v int) EVCR

type EXTICR 

type EXTICR uint32
const (
	EXTI0    EXTICR = 0x0F << 0  //+ EXTI 0 configuration.
	EXTI1    EXTICR = 0x0F << 4  //+ EXTI 1 configuration.
	EXTI2    EXTICR = 0x0F << 8  //+ EXTI 2 configuration.
	EXTI3    EXTICR = 0x0F << 12 //+ EXTI 3 configuration.
	EXTI0_PA EXTICR = 0x00 << 12 //  PA[0] pin.
	EXTI0_PB EXTICR = 0x01 << 0  //  PB[0] pin.
	EXTI0_PC EXTICR = 0x02 << 0  //  PC[0] pin.
	EXTI0_PD EXTICR = 0x03 << 0  //  PD[0] pin.
	EXTI0_PE EXTICR = 0x04 << 0  //  PE[0] pin.
	EXTI0_PF EXTICR = 0x05 << 0  //  PF[0] pin.
	EXTI0_PG EXTICR = 0x06 << 0  //  PG[0] pin.
	EXTI1_PA EXTICR = 0x00 << 12 //  PA[1] pin.
	EXTI1_PB EXTICR = 0x01 << 4  //  PB[1] pin.
	EXTI1_PC EXTICR = 0x02 << 4  //  PC[1] pin.
	EXTI1_PD EXTICR = 0x03 << 4  //  PD[1] pin.
	EXTI1_PE EXTICR = 0x04 << 4  //  PE[1] pin.
	EXTI1_PF EXTICR = 0x05 << 4  //  PF[1] pin.
	EXTI1_PG EXTICR = 0x06 << 4  //  PG[1] pin.
	EXTI2_PA EXTICR = 0x00 << 12 //  PA[2] pin.
	EXTI2_PB EXTICR = 0x01 << 8  //  PB[2] pin.
	EXTI2_PC EXTICR = 0x02 << 8  //  PC[2] pin.
	EXTI2_PD EXTICR = 0x03 << 8  //  PD[2] pin.
	EXTI2_PE EXTICR = 0x04 << 8  //  PE[2] pin.
	EXTI2_PF EXTICR = 0x05 << 8  //  PF[2] pin.
	EXTI2_PG EXTICR = 0x06 << 8  //  PG[2] pin.
	EXTI3_PA EXTICR = 0x00 << 12 //  PA[3] pin.
	EXTI3_PB EXTICR = 0x01 << 12 //  PB[3] pin.
	EXTI3_PC EXTICR = 0x02 << 12 //  PC[3] pin.
	EXTI3_PD EXTICR = 0x03 << 12 //  PD[3] pin.
	EXTI3_PE EXTICR = 0x04 << 12 //  PE[3] pin.
	EXTI3_PF EXTICR = 0x05 << 12 //  PF[3] pin.
	EXTI3_PG EXTICR = 0x06 << 12 //  PG[3] pin.
)

func (EXTICR) Field 

func (b EXTICR) Field(mask EXTICR) int

func (EXTICR) J 

func (mask EXTICR) J(v int) EXTICR

type MAPR 

type MAPR uint32
const (
	SPI1_REMAP                MAPR = 0x01 << 0  //+ SPI1 remapping.
	I2C1_REMAP                MAPR = 0x01 << 1  //+ I2C1 remapping.
	USART1_REMAP              MAPR = 0x01 << 2  //+ USART1 remapping.
	USART2_REMAP              MAPR = 0x01 << 3  //+ USART2 remapping.
	USART3_REMAP              MAPR = 0x03 << 4  //+ USART3_REMAP[1:0] bits (USART3 remapping).
	USART3_REMAP_0            MAPR = 0x01 << 4  //  Bit 0.
	USART3_REMAP_1            MAPR = 0x02 << 4  //  Bit 1.
	USART3_REMAP_NOREMAP      MAPR = 0x00 << 4  //  No remap (TX/PB10, RX/PB11, CK/PB12, CTS/PB13, RTS/PB14).
	USART3_REMAP_PARTIALREMAP MAPR = 0x01 << 4  //  Partial remap (TX/PC10, RX/PC11, CK/PC12, CTS/PB13, RTS/PB14).
	USART3_REMAP_FULLREMAP    MAPR = 0x03 << 4  //  Full remap (TX/PD8, RX/PD9, CK/PD10, CTS/PD11, RTS/PD12).
	TIM1_REMAP                MAPR = 0x03 << 6  //+ TIM1_REMAP[1:0] bits (TIM1 remapping).
	TIM1_REMAP_0              MAPR = 0x01 << 6  //  Bit 0.
	TIM1_REMAP_1              MAPR = 0x02 << 6  //  Bit 1.
	TIM1_REMAP_NOREMAP        MAPR = 0x00 << 6  //  No remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PB12, CH1N/PB13, CH2N/PB14, CH3N/PB15).
	TIM1_REMAP_PARTIALREMAP   MAPR = 0x01 << 6  //  Partial remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PA6, CH1N/PA7, CH2N/PB0, CH3N/PB1).
	TIM1_REMAP_FULLREMAP      MAPR = 0x03 << 6  //  Full remap (ETR/PE7, CH1/PE9, CH2/PE11, CH3/PE13, CH4/PE14, BKIN/PE15, CH1N/PE8, CH2N/PE10, CH3N/PE12).
	TIM2_REMAP                MAPR = 0x03 << 8  //+ TIM2_REMAP[1:0] bits (TIM2 remapping).
	TIM2_REMAP_0              MAPR = 0x01 << 8  //  Bit 0.
	TIM2_REMAP_1              MAPR = 0x02 << 8  //  Bit 1.
	TIM2_REMAP_NOREMAP        MAPR = 0x00 << 8  //  No remap (CH1/ETR/PA0, CH2/PA1, CH3/PA2, CH4/PA3).
	TIM2_REMAP_PARTIALREMAP1  MAPR = 0x01 << 8  //  Partial remap (CH1/ETR/PA15, CH2/PB3, CH3/PA2, CH4/PA3).
	TIM2_REMAP_PARTIALREMAP2  MAPR = 0x02 << 8  //  Partial remap (CH1/ETR/PA0, CH2/PA1, CH3/PB10, CH4/PB11).
	TIM2_REMAP_FULLREMAP      MAPR = 0x03 << 8  //  Full remap (CH1/ETR/PA15, CH2/PB3, CH3/PB10, CH4/PB11).
	TIM3_REMAP                MAPR = 0x03 << 10 //+ TIM3_REMAP[1:0] bits (TIM3 remapping).
	TIM3_REMAP_0              MAPR = 0x01 << 10 //  Bit 0.
	TIM3_REMAP_1              MAPR = 0x02 << 10 //  Bit 1.
	TIM3_REMAP_NOREMAP        MAPR = 0x00 << 10 //  No remap (CH1/PA6, CH2/PA7, CH3/PB0, CH4/PB1).
	TIM3_REMAP_PARTIALREMAP   MAPR = 0x02 << 10 //  Partial remap (CH1/PB4, CH2/PB5, CH3/PB0, CH4/PB1).
	TIM3_REMAP_FULLREMAP      MAPR = 0x03 << 10 //  Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9).
	TIM4_REMAP                MAPR = 0x01 << 12 //+ TIM4_REMAP bit (TIM4 remapping).
	CAN_REMAP                 MAPR = 0x03 << 13 //+ CAN_REMAP[1:0] bits (CAN Alternate function remapping).
	CAN_REMAP_0               MAPR = 0x01 << 13 //  Bit 0.
	CAN_REMAP_1               MAPR = 0x02 << 13 //  Bit 1.
	CAN_REMAP_REMAP1          MAPR = 0x00 << 13 //  CANRX mapped to PA11, CANTX mapped to PA12.
	CAN_REMAP_REMAP2          MAPR = 0x02 << 13 //  CANRX mapped to PB8, CANTX mapped to PB9.
	CAN_REMAP_REMAP3          MAPR = 0x03 << 13 //  CANRX mapped to PD0, CANTX mapped to PD1.
	PD01_REMAP                MAPR = 0x01 << 15 //+ Port D0/Port D1 mapping on OSC_IN/OSC_OUT.
	TIM5CH4_IREMAP            MAPR = 0x01 << 16 //+ TIM5 Channel4 Internal Remap.
	ADC1_ETRGINJ_REMAP        MAPR = 0x01 << 17 //+ ADC 1 External Trigger Injected Conversion remapping.
	ADC1_ETRGREG_REMAP        MAPR = 0x01 << 18 //+ ADC 1 External Trigger Regular Conversion remapping.
	ADC2_ETRGINJ_REMAP        MAPR = 0x01 << 19 //+ ADC 2 External Trigger Injected Conversion remapping.
	ADC2_ETRGREG_REMAP        MAPR = 0x01 << 20 //+ ADC 2 External Trigger Regular Conversion remapping.
	SWJ_CFG                   MAPR = 0x07 << 24 //+ SWJ_CFG[2:0] bits (Serial Wire JTAG configuration).
	SWJ_CFG_0                 MAPR = 0x01 << 24 //  Bit 0.
	SWJ_CFG_1                 MAPR = 0x02 << 24 //  Bit 1.
	SWJ_CFG_2                 MAPR = 0x04 << 24 //  Bit 2.
	SWJ_CFG_RESET             MAPR = 0x00 << 24 //  Full SWJ (JTAG-DP + SW-DP) : Reset State.
	SWJ_CFG_NOJNTRST          MAPR = 0x01 << 24 //  Full SWJ (JTAG-DP + SW-DP) but without JNTRST.
	SWJ_CFG_JTAGDISABLE       MAPR = 0x02 << 24 //  JTAG-DP Disabled and SW-DP Enabled.
	SWJ_CFG_DISABLE           MAPR = 0x04 << 24 //  JTAG-DP Disabled and SW-DP Disabled.
)

func (MAPR) Field 

func (b MAPR) Field(mask MAPR) int

func (MAPR) J 

func (mask MAPR) J(v int) MAPR

type MAPR2 

type MAPR2 uint32

func (MAPR2) Field 

func (b MAPR2) Field(mask MAPR2) int

func (MAPR2) J 

func (mask MAPR2) J(v int) MAPR2

type REVCR 

type REVCR struct{ mmio.U32 }

func (*REVCR) AtomicClearBits 

func (r *REVCR) AtomicClearBits(mask EVCR)

func (*REVCR) AtomicSetBits 

func (r *REVCR) AtomicSetBits(mask EVCR)

func (*REVCR) AtomicStoreBits 

func (r *REVCR) AtomicStoreBits(mask, b EVCR)

func (*REVCR) Bits 

func (r *REVCR) Bits(mask EVCR) EVCR

func (*REVCR) ClearBits 

func (r *REVCR) ClearBits(mask EVCR)

func (*REVCR) Load 

func (r *REVCR) Load() EVCR

func (*REVCR) SetBits 

func (r *REVCR) SetBits(mask EVCR)

func (*REVCR) Store 

func (r *REVCR) Store(b EVCR)

func (*REVCR) StoreBits 

func (r *REVCR) StoreBits(mask, b EVCR)

type REXTICR 

type REXTICR struct{ mmio.U32 }

func (*REXTICR) AtomicClearBits 

func (r *REXTICR) AtomicClearBits(mask EXTICR)

func (*REXTICR) AtomicSetBits 

func (r *REXTICR) AtomicSetBits(mask EXTICR)

func (*REXTICR) AtomicStoreBits 

func (r *REXTICR) AtomicStoreBits(mask, b EXTICR)

func (*REXTICR) Bits 

func (r *REXTICR) Bits(mask EXTICR) EXTICR

func (*REXTICR) ClearBits 

func (r *REXTICR) ClearBits(mask EXTICR)

func (*REXTICR) Load 

func (r *REXTICR) Load() EXTICR

func (*REXTICR) SetBits 

func (r *REXTICR) SetBits(mask EXTICR)

func (*REXTICR) Store 

func (r *REXTICR) Store(b EXTICR)

func (*REXTICR) StoreBits 

func (r *REXTICR) StoreBits(mask, b EXTICR)

type RMAPR 

type RMAPR struct{ mmio.U32 }

func (*RMAPR) AtomicClearBits 

func (r *RMAPR) AtomicClearBits(mask MAPR)

func (*RMAPR) AtomicSetBits 

func (r *RMAPR) AtomicSetBits(mask MAPR)

func (*RMAPR) AtomicStoreBits 

func (r *RMAPR) AtomicStoreBits(mask, b MAPR)

func (*RMAPR) Bits 

func (r *RMAPR) Bits(mask MAPR) MAPR

func (*RMAPR) ClearBits 

func (r *RMAPR) ClearBits(mask MAPR)

func (*RMAPR) Load 

func (r *RMAPR) Load() MAPR

func (*RMAPR) SetBits 

func (r *RMAPR) SetBits(mask MAPR)

func (*RMAPR) Store 

func (r *RMAPR) Store(b MAPR)

func (*RMAPR) StoreBits 

func (r *RMAPR) StoreBits(mask, b MAPR)

type RMAPR2 

type RMAPR2 struct{ mmio.U32 }

func (*RMAPR2) AtomicClearBits 

func (r *RMAPR2) AtomicClearBits(mask MAPR2)

func (*RMAPR2) AtomicSetBits 

func (r *RMAPR2) AtomicSetBits(mask MAPR2)

func (*RMAPR2) AtomicStoreBits 

func (r *RMAPR2) AtomicStoreBits(mask, b MAPR2)

func (*RMAPR2) Bits 

func (r *RMAPR2) Bits(mask MAPR2) MAPR2

func (*RMAPR2) ClearBits 

func (r *RMAPR2) ClearBits(mask MAPR2)

func (*RMAPR2) Load 

func (r *RMAPR2) Load() MAPR2

func (*RMAPR2) SetBits 

func (r *RMAPR2) SetBits(mask MAPR2)

func (*RMAPR2) Store 

func (r *RMAPR2) Store(b MAPR2)

func (*RMAPR2) StoreBits 

func (r *RMAPR2) StoreBits(mask, b MAPR2)

type RMEVCR 

type RMEVCR struct{ mmio.UM32 }

func (RMEVCR) Load 

func (rm RMEVCR) Load() EVCR

func (RMEVCR) Store 

func (rm RMEVCR) Store(b EVCR)

type RMEXTICR 

type RMEXTICR struct{ mmio.UM32 }

func (RMEXTICR) Load 

func (rm RMEXTICR) Load() EXTICR

func (RMEXTICR) Store 

func (rm RMEXTICR) Store(b EXTICR)

type RMMAPR 

type RMMAPR struct{ mmio.UM32 }

func (RMMAPR) Load 

func (rm RMMAPR) Load() MAPR

func (RMMAPR) Store 

func (rm RMMAPR) Store(b MAPR)

type RMMAPR2 

type RMMAPR2 struct{ mmio.UM32 }

func (RMMAPR2) Load 

func (rm RMMAPR2) Load() MAPR2

func (RMMAPR2) Store 

func (rm RMMAPR2) Store(b MAPR2)

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