tim

package
v0.0.0-...-168ccc2 Latest Latest
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 Go to latest Published: Dec 5, 2021 License: BSD-3-Clause Imports: 4 Imported by: 0

Documentation

Overview

Package tim provides interface to TIM.

Peripheral: TIM_Periph TIM. Instances: 

TIM3   mmap.TIM3_BASE
TIM6   mmap.TIM6_BASE
TIM14  mmap.TIM14_BASE
TIM1   mmap.TIM1_BASE
TIM15  mmap.TIM15_BASE
TIM16  mmap.TIM16_BASE
TIM17  mmap.TIM17_BASE

Registers: 

0x00 32  CR1   Control register 1.
0x04 32  CR2   Control register 2.
0x08 32  SMCR  Slave Mode Control register.
0x0C 32  DIER  DMA/interrupt enable register.
0x10 32  SR    Status register.
0x14 32  EGR   Event generation register.
0x18 32  CCMR1 Capture/compare mode register 1.
0x1C 32  CCMR2 Capture/compare mode register 2.
0x20 32  CCER  Capture/compare enable register.
0x24 32  CNT   Counter register.
0x28 32  PSC   Prescaler register.
0x2C 32  ARR   Auto-reload register.
0x30 32  RCR   Repetition counter register.
0x34 32  CCR1  Capture/compare register 1.
0x38 32  CCR2  Capture/compare register 2.
0x3C 32  CCR3  Capture/compare register 3.
0x40 32  CCR4  Capture/compare register 4.
0x44 32  BDTR  Break and dead-time register.
0x48 32  DCR   DMA control register.
0x4C 32  DMAR  DMA address for full transfer register.
0x50 32  OR    Option register.

Import: 

stm32/o/f030x8/mmap

Index

Constants

View Source 
const (
	CENn  = 0
	UDISn = 1
	URSn  = 2
	OPMn  = 3
	DIRn  = 4
	CMSn  = 5
	ARPEn = 7
	CKDn  = 8
)
View Source 
const (
	CCPCn  = 0
	CCUSn  = 2
	CCDSn  = 3
	MMSn   = 4
	TI1Sn  = 7
	OIS1n  = 8
	OIS1Nn = 9
	OIS2n  = 10
	OIS2Nn = 11
	OIS3n  = 12
	OIS3Nn = 13
	OIS4n  = 14
)
View Source 
const (
	SMSn  = 0
	OCCSn = 3
	TSn   = 4
	MSMn  = 7
	ETFn  = 8
	ETPSn = 12
	ECEn  = 14
	ETPn  = 15
)
View Source 
const (
	UIEn   = 0
	CC1IEn = 1
	CC2IEn = 2
	CC3IEn = 3
	CC4IEn = 4
	COMIEn = 5
	TIEn   = 6
	BIEn   = 7
	UDEn   = 8
	CC1DEn = 9
	CC2DEn = 10
	CC3DEn = 11
	CC4DEn = 12
	COMDEn = 13
	TDEn   = 14
)
View Source 
const (
	UIFn   = 0
	CC1IFn = 1
	CC2IFn = 2
	CC3IFn = 3
	CC4IFn = 4
	COMIFn = 5
	TIFn   = 6
	BIFn   = 7
	CC1OFn = 9
	CC2OFn = 10
	CC3OFn = 11
	CC4OFn = 12
)
View Source 
const (
	UGn   = 0
	CC1Gn = 1
	CC2Gn = 2
	CC3Gn = 3
	CC4Gn = 4
	COMGn = 5
	TGn   = 6
	BGn   = 7
)
View Source 
const (
	CC1Sn   = 0
	OC1FEn  = 2
	OC1PEn  = 3
	OC1Mn   = 4
	OC1CEn  = 7
	CC2Sn   = 8
	OC2FEn  = 10
	OC2PEn  = 11
	OC2Mn   = 12
	OC2CEn  = 15
	IC1PSCn = 2
	IC1Fn   = 4
	IC2PSCn = 10
	IC2Fn   = 12
)
View Source 
const (
	CC3Sn   = 0
	OC3FEn  = 2
	OC3PEn  = 3
	OC3Mn   = 4
	OC3CEn  = 7
	CC4Sn   = 8
	OC4FEn  = 10
	OC4PEn  = 11
	OC4Mn   = 12
	OC4CEn  = 15
	IC3PSCn = 2
	IC3Fn   = 4
	IC4PSCn = 10
	IC4Fn   = 12
)
View Source 
const (
	CC1En  = 0
	CC1Pn  = 1
	CC1NEn = 2
	CC1NPn = 3
	CC2En  = 4
	CC2Pn  = 5
	CC2NEn = 6
	CC2NPn = 7
	CC3En  = 8
	CC3Pn  = 9
	CC3NEn = 10
	CC3NPn = 11
	CC4En  = 12
	CC4Pn  = 13
	CC4NPn = 15
)
View Source 
const (
	DTGn  = 0
	LOCKn = 8
	OSSIn = 10
	OSSRn = 11
	BKEn  = 12
	BKPn  = 13
	AOEn  = 14
	MOEn  = 15
)
View Source 
const (
	DBAn = 0
	DBLn = 8
)
View Source 
const (
	DMABn = 0
)
View Source 
const (
	REPn = 0
)

Variables

View Source 
var TIM1 = (*TIM_Periph)(unsafe.Pointer(uintptr(mmap.TIM1_BASE)))
View Source 
var TIM14 = (*TIM_Periph)(unsafe.Pointer(uintptr(mmap.TIM14_BASE)))
View Source 
var TIM15 = (*TIM_Periph)(unsafe.Pointer(uintptr(mmap.TIM15_BASE)))
View Source 
var TIM16 = (*TIM_Periph)(unsafe.Pointer(uintptr(mmap.TIM16_BASE)))
View Source 
var TIM17 = (*TIM_Periph)(unsafe.Pointer(uintptr(mmap.TIM17_BASE)))
View Source 
var TIM3 = (*TIM_Periph)(unsafe.Pointer(uintptr(mmap.TIM3_BASE)))
View Source 
var TIM6 = (*TIM_Periph)(unsafe.Pointer(uintptr(mmap.TIM6_BASE)))

Functions

This section is empty.

Types

type ARR 

type ARR uint32

func (ARR) Field 

func (b ARR) Field(mask ARR) int

func (ARR) J 

func (mask ARR) J(v int) ARR

type BDTR 

type BDTR uint32
const (
	DTG  BDTR = 0xFF << 0  //+ DTG[0:7] bits (Dead-Time Generator set-up).
	LOCK BDTR = 0x03 << 8  //+ LOCK[1:0] bits (Lock Configuration).
	OSSI BDTR = 0x01 << 10 //+ Off-State Selection for Idle mode.
	OSSR BDTR = 0x01 << 11 //+ Off-State Selection for Run mode.
	BKE  BDTR = 0x01 << 12 //+ Break enable.
	BKP  BDTR = 0x01 << 13 //+ Break Polarity.
	AOE  BDTR = 0x01 << 14 //+ Automatic Output enable.
	MOE  BDTR = 0x01 << 15 //+ Main Output enable.
)

func (BDTR) Field 

func (b BDTR) Field(mask BDTR) int

func (BDTR) J 

func (mask BDTR) J(v int) BDTR

type CCER 

type CCER uint32
const (
	CC1E  CCER = 0x01 << 0  //+ Capture/Compare 1 output enable.
	CC1P  CCER = 0x01 << 1  //+ Capture/Compare 1 output Polarity.
	CC1NE CCER = 0x01 << 2  //+ Capture/Compare 1 Complementary output enable.
	CC1NP CCER = 0x01 << 3  //+ Capture/Compare 1 Complementary output Polarity.
	CC2E  CCER = 0x01 << 4  //+ Capture/Compare 2 output enable.
	CC2P  CCER = 0x01 << 5  //+ Capture/Compare 2 output Polarity.
	CC2NE CCER = 0x01 << 6  //+ Capture/Compare 2 Complementary output enable.
	CC2NP CCER = 0x01 << 7  //+ Capture/Compare 2 Complementary output Polarity.
	CC3E  CCER = 0x01 << 8  //+ Capture/Compare 3 output enable.
	CC3P  CCER = 0x01 << 9  //+ Capture/Compare 3 output Polarity.
	CC3NE CCER = 0x01 << 10 //+ Capture/Compare 3 Complementary output enable.
	CC3NP CCER = 0x01 << 11 //+ Capture/Compare 3 Complementary output Polarity.
	CC4E  CCER = 0x01 << 12 //+ Capture/Compare 4 output enable.
	CC4P  CCER = 0x01 << 13 //+ Capture/Compare 4 output Polarity.
	CC4NP CCER = 0x01 << 15 //+ Capture/Compare 4 Complementary output Polarity.
)

func (CCER) Field 

func (b CCER) Field(mask CCER) int

func (CCER) J 

func (mask CCER) J(v int) CCER

type CCMR1 

type CCMR1 uint32
const (
	CC1S   CCMR1 = 0x03 << 0  //+ CC1S[1:0] bits (Capture/Compare 1 Selection).
	OC1FE  CCMR1 = 0x01 << 2  //+ Output Compare 1 Fast enable.
	OC1PE  CCMR1 = 0x01 << 3  //+ Output Compare 1 Preload enable.
	OC1M   CCMR1 = 0x07 << 4  //+ OC1M[2:0] bits (Output Compare 1 Mode).
	OC1CE  CCMR1 = 0x01 << 7  //+ Output Compare 1Clear Enable.
	CC2S   CCMR1 = 0x03 << 8  //+ CC2S[1:0] bits (Capture/Compare 2 Selection).
	OC2FE  CCMR1 = 0x01 << 10 //+ Output Compare 2 Fast enable.
	OC2PE  CCMR1 = 0x01 << 11 //+ Output Compare 2 Preload enable.
	OC2M   CCMR1 = 0x07 << 12 //+ OC2M[2:0] bits (Output Compare 2 Mode).
	OC2CE  CCMR1 = 0x01 << 15 //+ Output Compare 2 Clear Enable.
	IC1PSC CCMR1 = 0x03 << 2  //+ IC1PSC[1:0] bits (Input Capture 1 Prescaler).
	IC1F   CCMR1 = 0x0F << 4  //+ IC1F[3:0] bits (Input Capture 1 Filter).
	IC2PSC CCMR1 = 0x03 << 10 //+ IC2PSC[1:0] bits (Input Capture 2 Prescaler).
	IC2F   CCMR1 = 0x0F << 12 //+ IC2F[3:0] bits (Input Capture 2 Filter).
)

func (CCMR1) Field 

func (b CCMR1) Field(mask CCMR1) int

func (CCMR1) J 

func (mask CCMR1) J(v int) CCMR1

type CCMR2 

type CCMR2 uint32
const (
	CC3S   CCMR2 = 0x03 << 0  //+ CC3S[1:0] bits (Capture/Compare 3 Selection).
	OC3FE  CCMR2 = 0x01 << 2  //+ Output Compare 3 Fast enable.
	OC3PE  CCMR2 = 0x01 << 3  //+ Output Compare 3 Preload enable.
	OC3M   CCMR2 = 0x07 << 4  //+ OC3M[2:0] bits (Output Compare 3 Mode).
	OC3CE  CCMR2 = 0x01 << 7  //+ Output Compare 3 Clear Enable.
	CC4S   CCMR2 = 0x03 << 8  //+ CC4S[1:0] bits (Capture/Compare 4 Selection).
	OC4FE  CCMR2 = 0x01 << 10 //+ Output Compare 4 Fast enable.
	OC4PE  CCMR2 = 0x01 << 11 //+ Output Compare 4 Preload enable.
	OC4M   CCMR2 = 0x07 << 12 //+ OC4M[2:0] bits (Output Compare 4 Mode).
	OC4CE  CCMR2 = 0x01 << 15 //+ Output Compare 4 Clear Enable.
	IC3PSC CCMR2 = 0x03 << 2  //+ IC3PSC[1:0] bits (Input Capture 3 Prescaler).
	IC3F   CCMR2 = 0x0F << 4  //+ IC3F[3:0] bits (Input Capture 3 Filter).
	IC4PSC CCMR2 = 0x03 << 10 //+ IC4PSC[1:0] bits (Input Capture 4 Prescaler).
	IC4F   CCMR2 = 0x0F << 12 //+ IC4F[3:0] bits (Input Capture 4 Filter).
)

func (CCMR2) Field 

func (b CCMR2) Field(mask CCMR2) int

func (CCMR2) J 

func (mask CCMR2) J(v int) CCMR2

type CCR1 

type CCR1 uint32

func (CCR1) Field 

func (b CCR1) Field(mask CCR1) int

func (CCR1) J 

func (mask CCR1) J(v int) CCR1

type CCR2 

type CCR2 uint32

func (CCR2) Field 

func (b CCR2) Field(mask CCR2) int

func (CCR2) J 

func (mask CCR2) J(v int) CCR2

type CCR3 

type CCR3 uint32

func (CCR3) Field 

func (b CCR3) Field(mask CCR3) int

func (CCR3) J 

func (mask CCR3) J(v int) CCR3

type CCR4 

type CCR4 uint32

func (CCR4) Field 

func (b CCR4) Field(mask CCR4) int

func (CCR4) J 

func (mask CCR4) J(v int) CCR4

type CNT 

type CNT uint32

func (CNT) Field 

func (b CNT) Field(mask CNT) int

func (CNT) J 

func (mask CNT) J(v int) CNT

type CR1 

type CR1 uint32
const (
	CEN  CR1 = 0x01 << 0 //+ Counter enable.
	UDIS CR1 = 0x01 << 1 //+ Update disable.
	URS  CR1 = 0x01 << 2 //+ Update request source.
	OPM  CR1 = 0x01 << 3 //+ One pulse mode.
	DIR  CR1 = 0x01 << 4 //+ Direction.
	CMS  CR1 = 0x03 << 5 //+ CMS[1:0] bits (Center-aligned mode selection).
	ARPE CR1 = 0x01 << 7 //+ Auto-reload preload enable.
	CKD  CR1 = 0x03 << 8 //+ CKD[1:0] bits (clock division).
)

func (CR1) Field 

func (b CR1) Field(mask CR1) int

func (CR1) J 

func (mask CR1) J(v int) CR1

type CR2 

type CR2 uint32
const (
	CCPC  CR2 = 0x01 << 0  //+ Capture/Compare Preloaded Control.
	CCUS  CR2 = 0x01 << 2  //+ Capture/Compare Control Update Selection.
	CCDS  CR2 = 0x01 << 3  //+ Capture/Compare DMA Selection.
	MMS   CR2 = 0x07 << 4  //+ MMS[2:0] bits (Master Mode Selection).
	TI1S  CR2 = 0x01 << 7  //+ TI1 Selection.
	OIS1  CR2 = 0x01 << 8  //+ Output Idle state 1 (OC1 output).
	OIS1N CR2 = 0x01 << 9  //+ Output Idle state 1 (OC1N output).
	OIS2  CR2 = 0x01 << 10 //+ Output Idle state 2 (OC2 output).
	OIS2N CR2 = 0x01 << 11 //+ Output Idle state 2 (OC2N output).
	OIS3  CR2 = 0x01 << 12 //+ Output Idle state 3 (OC3 output).
	OIS3N CR2 = 0x01 << 13 //+ Output Idle state 3 (OC3N output).
	OIS4  CR2 = 0x01 << 14 //+ Output Idle state 4 (OC4 output).
)

func (CR2) Field 

func (b CR2) Field(mask CR2) int

func (CR2) J 

func (mask CR2) J(v int) CR2

type DCR 

type DCR uint32
const (
	DBA DCR = 0x1F << 0 //+ DBA[4:0] bits (DMA Base Address).
	DBL DCR = 0x1F << 8 //+ DBL[4:0] bits (DMA Burst Length).
)

func (DCR) Field 

func (b DCR) Field(mask DCR) int

func (DCR) J 

func (mask DCR) J(v int) DCR

type DIER 

type DIER uint32
const (
	UIE   DIER = 0x01 << 0  //+ Update interrupt enable.
	CC1IE DIER = 0x01 << 1  //+ Capture/Compare 1 interrupt enable.
	CC2IE DIER = 0x01 << 2  //+ Capture/Compare 2 interrupt enable.
	CC3IE DIER = 0x01 << 3  //+ Capture/Compare 3 interrupt enable.
	CC4IE DIER = 0x01 << 4  //+ Capture/Compare 4 interrupt enable.
	COMIE DIER = 0x01 << 5  //+ COM interrupt enable.
	TIE   DIER = 0x01 << 6  //+ Trigger interrupt enable.
	BIE   DIER = 0x01 << 7  //+ Break interrupt enable.
	UDE   DIER = 0x01 << 8  //+ Update DMA request enable.
	CC1DE DIER = 0x01 << 9  //+ Capture/Compare 1 DMA request enable.
	CC2DE DIER = 0x01 << 10 //+ Capture/Compare 2 DMA request enable.
	CC3DE DIER = 0x01 << 11 //+ Capture/Compare 3 DMA request enable.
	CC4DE DIER = 0x01 << 12 //+ Capture/Compare 4 DMA request enable.
	COMDE DIER = 0x01 << 13 //+ COM DMA request enable.
	TDE   DIER = 0x01 << 14 //+ Trigger DMA request enable.
)

func (DIER) Field 

func (b DIER) Field(mask DIER) int

func (DIER) J 

func (mask DIER) J(v int) DIER

type DMAR 

type DMAR uint32
const (
	DMAB DMAR = 0xFFFF << 0 //+ DMA register for burst accesses.
)

func (DMAR) Field 

func (b DMAR) Field(mask DMAR) int

func (DMAR) J 

func (mask DMAR) J(v int) DMAR

type EGR 

type EGR uint32
const (
	UG   EGR = 0x01 << 0 //+ Update Generation.
	CC1G EGR = 0x01 << 1 //+ Capture/Compare 1 Generation.
	CC2G EGR = 0x01 << 2 //+ Capture/Compare 2 Generation.
	CC3G EGR = 0x01 << 3 //+ Capture/Compare 3 Generation.
	CC4G EGR = 0x01 << 4 //+ Capture/Compare 4 Generation.
	COMG EGR = 0x01 << 5 //+ Capture/Compare Control Update Generation.
	TG   EGR = 0x01 << 6 //+ Trigger Generation.
	BG   EGR = 0x01 << 7 //+ Break Generation.
)

func (EGR) Field 

func (b EGR) Field(mask EGR) int

func (EGR) J 

func (mask EGR) J(v int) EGR

type OR 

type OR uint32

func (OR) Field 

func (b OR) Field(mask OR) int

func (OR) J 

func (mask OR) J(v int) OR

type PSC 

type PSC uint32

func (PSC) Field 

func (b PSC) Field(mask PSC) int

func (PSC) J 

func (mask PSC) J(v int) PSC

type RARR 

type RARR struct{ mmio.U32 }

func (*RARR) AtomicClearBits 

func (r *RARR) AtomicClearBits(mask ARR)

func (*RARR) AtomicSetBits 

func (r *RARR) AtomicSetBits(mask ARR)

func (*RARR) AtomicStoreBits 

func (r *RARR) AtomicStoreBits(mask, b ARR)

func (*RARR) Bits 

func (r *RARR) Bits(mask ARR) ARR

func (*RARR) ClearBits 

func (r *RARR) ClearBits(mask ARR)

func (*RARR) Load 

func (r *RARR) Load() ARR

func (*RARR) SetBits 

func (r *RARR) SetBits(mask ARR)

func (*RARR) Store 

func (r *RARR) Store(b ARR)

func (*RARR) StoreBits 

func (r *RARR) StoreBits(mask, b ARR)

type RBDTR 

type RBDTR struct{ mmio.U32 }

func (*RBDTR) AtomicClearBits 

func (r *RBDTR) AtomicClearBits(mask BDTR)

func (*RBDTR) AtomicSetBits 

func (r *RBDTR) AtomicSetBits(mask BDTR)

func (*RBDTR) AtomicStoreBits 

func (r *RBDTR) AtomicStoreBits(mask, b BDTR)

func (*RBDTR) Bits 

func (r *RBDTR) Bits(mask BDTR) BDTR

func (*RBDTR) ClearBits 

func (r *RBDTR) ClearBits(mask BDTR)

func (*RBDTR) Load 

func (r *RBDTR) Load() BDTR

func (*RBDTR) SetBits 

func (r *RBDTR) SetBits(mask BDTR)

func (*RBDTR) Store 

func (r *RBDTR) Store(b BDTR)

func (*RBDTR) StoreBits 

func (r *RBDTR) StoreBits(mask, b BDTR)

type RCCER 

type RCCER struct{ mmio.U32 }

func (*RCCER) AtomicClearBits 

func (r *RCCER) AtomicClearBits(mask CCER)

func (*RCCER) AtomicSetBits 

func (r *RCCER) AtomicSetBits(mask CCER)

func (*RCCER) AtomicStoreBits 

func (r *RCCER) AtomicStoreBits(mask, b CCER)

func (*RCCER) Bits 

func (r *RCCER) Bits(mask CCER) CCER

func (*RCCER) ClearBits 

func (r *RCCER) ClearBits(mask CCER)

func (*RCCER) Load 

func (r *RCCER) Load() CCER

func (*RCCER) SetBits 

func (r *RCCER) SetBits(mask CCER)

func (*RCCER) Store 

func (r *RCCER) Store(b CCER)

func (*RCCER) StoreBits 

func (r *RCCER) StoreBits(mask, b CCER)

type RCCMR1 

type RCCMR1 struct{ mmio.U32 }

func (*RCCMR1) AtomicClearBits 

func (r *RCCMR1) AtomicClearBits(mask CCMR1)

func (*RCCMR1) AtomicSetBits 

func (r *RCCMR1) AtomicSetBits(mask CCMR1)

func (*RCCMR1) AtomicStoreBits 

func (r *RCCMR1) AtomicStoreBits(mask, b CCMR1)

func (*RCCMR1) Bits 

func (r *RCCMR1) Bits(mask CCMR1) CCMR1

func (*RCCMR1) ClearBits 

func (r *RCCMR1) ClearBits(mask CCMR1)

func (*RCCMR1) Load 

func (r *RCCMR1) Load() CCMR1

func (*RCCMR1) SetBits 

func (r *RCCMR1) SetBits(mask CCMR1)

func (*RCCMR1) Store 

func (r *RCCMR1) Store(b CCMR1)

func (*RCCMR1) StoreBits 

func (r *RCCMR1) StoreBits(mask, b CCMR1)

type RCCMR2 

type RCCMR2 struct{ mmio.U32 }

func (*RCCMR2) AtomicClearBits 

func (r *RCCMR2) AtomicClearBits(mask CCMR2)

func (*RCCMR2) AtomicSetBits 

func (r *RCCMR2) AtomicSetBits(mask CCMR2)

func (*RCCMR2) AtomicStoreBits 

func (r *RCCMR2) AtomicStoreBits(mask, b CCMR2)

func (*RCCMR2) Bits 

func (r *RCCMR2) Bits(mask CCMR2) CCMR2

func (*RCCMR2) ClearBits 

func (r *RCCMR2) ClearBits(mask CCMR2)

func (*RCCMR2) Load 

func (r *RCCMR2) Load() CCMR2

func (*RCCMR2) SetBits 

func (r *RCCMR2) SetBits(mask CCMR2)

func (*RCCMR2) Store 

func (r *RCCMR2) Store(b CCMR2)

func (*RCCMR2) StoreBits 

func (r *RCCMR2) StoreBits(mask, b CCMR2)

type RCCR1 

type RCCR1 struct{ mmio.U32 }

func (*RCCR1) AtomicClearBits 

func (r *RCCR1) AtomicClearBits(mask CCR1)

func (*RCCR1) AtomicSetBits 

func (r *RCCR1) AtomicSetBits(mask CCR1)

func (*RCCR1) AtomicStoreBits 

func (r *RCCR1) AtomicStoreBits(mask, b CCR1)

func (*RCCR1) Bits 

func (r *RCCR1) Bits(mask CCR1) CCR1

func (*RCCR1) ClearBits 

func (r *RCCR1) ClearBits(mask CCR1)

func (*RCCR1) Load 

func (r *RCCR1) Load() CCR1

func (*RCCR1) SetBits 

func (r *RCCR1) SetBits(mask CCR1)

func (*RCCR1) Store 

func (r *RCCR1) Store(b CCR1)

func (*RCCR1) StoreBits 

func (r *RCCR1) StoreBits(mask, b CCR1)

type RCCR2 

type RCCR2 struct{ mmio.U32 }

func (*RCCR2) AtomicClearBits 

func (r *RCCR2) AtomicClearBits(mask CCR2)

func (*RCCR2) AtomicSetBits 

func (r *RCCR2) AtomicSetBits(mask CCR2)

func (*RCCR2) AtomicStoreBits 

func (r *RCCR2) AtomicStoreBits(mask, b CCR2)

func (*RCCR2) Bits 

func (r *RCCR2) Bits(mask CCR2) CCR2

func (*RCCR2) ClearBits 

func (r *RCCR2) ClearBits(mask CCR2)

func (*RCCR2) Load 

func (r *RCCR2) Load() CCR2

func (*RCCR2) SetBits 

func (r *RCCR2) SetBits(mask CCR2)

func (*RCCR2) Store 

func (r *RCCR2) Store(b CCR2)

func (*RCCR2) StoreBits 

func (r *RCCR2) StoreBits(mask, b CCR2)

type RCCR3 

type RCCR3 struct{ mmio.U32 }

func (*RCCR3) AtomicClearBits 

func (r *RCCR3) AtomicClearBits(mask CCR3)

func (*RCCR3) AtomicSetBits 

func (r *RCCR3) AtomicSetBits(mask CCR3)

func (*RCCR3) AtomicStoreBits 

func (r *RCCR3) AtomicStoreBits(mask, b CCR3)

func (*RCCR3) Bits 

func (r *RCCR3) Bits(mask CCR3) CCR3

func (*RCCR3) ClearBits 

func (r *RCCR3) ClearBits(mask CCR3)

func (*RCCR3) Load 

func (r *RCCR3) Load() CCR3

func (*RCCR3) SetBits 

func (r *RCCR3) SetBits(mask CCR3)

func (*RCCR3) Store 

func (r *RCCR3) Store(b CCR3)

func (*RCCR3) StoreBits 

func (r *RCCR3) StoreBits(mask, b CCR3)

type RCCR4 

type RCCR4 struct{ mmio.U32 }

func (*RCCR4) AtomicClearBits 

func (r *RCCR4) AtomicClearBits(mask CCR4)

func (*RCCR4) AtomicSetBits 

func (r *RCCR4) AtomicSetBits(mask CCR4)

func (*RCCR4) AtomicStoreBits 

func (r *RCCR4) AtomicStoreBits(mask, b CCR4)

func (*RCCR4) Bits 

func (r *RCCR4) Bits(mask CCR4) CCR4

func (*RCCR4) ClearBits 

func (r *RCCR4) ClearBits(mask CCR4)

func (*RCCR4) Load 

func (r *RCCR4) Load() CCR4

func (*RCCR4) SetBits 

func (r *RCCR4) SetBits(mask CCR4)

func (*RCCR4) Store 

func (r *RCCR4) Store(b CCR4)

func (*RCCR4) StoreBits 

func (r *RCCR4) StoreBits(mask, b CCR4)

type RCNT 

type RCNT struct{ mmio.U32 }

func (*RCNT) AtomicClearBits 

func (r *RCNT) AtomicClearBits(mask CNT)

func (*RCNT) AtomicSetBits 

func (r *RCNT) AtomicSetBits(mask CNT)

func (*RCNT) AtomicStoreBits 

func (r *RCNT) AtomicStoreBits(mask, b CNT)

func (*RCNT) Bits 

func (r *RCNT) Bits(mask CNT) CNT

func (*RCNT) ClearBits 

func (r *RCNT) ClearBits(mask CNT)

func (*RCNT) Load 

func (r *RCNT) Load() CNT

func (*RCNT) SetBits 

func (r *RCNT) SetBits(mask CNT)

func (*RCNT) Store 

func (r *RCNT) Store(b CNT)

func (*RCNT) StoreBits 

func (r *RCNT) StoreBits(mask, b CNT)

type RCR 

type RCR uint32
const (
	REP RCR = 0xFF << 0 //+ Repetition Counter Value.
)

func (RCR) Field 

func (b RCR) Field(mask RCR) int

func (RCR) J 

func (mask RCR) J(v int) RCR

type RCR1 

type RCR1 struct{ mmio.U32 }

func (*RCR1) AtomicClearBits 

func (r *RCR1) AtomicClearBits(mask CR1)

func (*RCR1) AtomicSetBits 

func (r *RCR1) AtomicSetBits(mask CR1)

func (*RCR1) AtomicStoreBits 

func (r *RCR1) AtomicStoreBits(mask, b CR1)

func (*RCR1) Bits 

func (r *RCR1) Bits(mask CR1) CR1

func (*RCR1) ClearBits 

func (r *RCR1) ClearBits(mask CR1)

func (*RCR1) Load 

func (r *RCR1) Load() CR1

func (*RCR1) SetBits 

func (r *RCR1) SetBits(mask CR1)

func (*RCR1) Store 

func (r *RCR1) Store(b CR1)

func (*RCR1) StoreBits 

func (r *RCR1) StoreBits(mask, b CR1)

type RCR2 

type RCR2 struct{ mmio.U32 }

func (*RCR2) AtomicClearBits 

func (r *RCR2) AtomicClearBits(mask CR2)

func (*RCR2) AtomicSetBits 

func (r *RCR2) AtomicSetBits(mask CR2)

func (*RCR2) AtomicStoreBits 

func (r *RCR2) AtomicStoreBits(mask, b CR2)

func (*RCR2) Bits 

func (r *RCR2) Bits(mask CR2) CR2

func (*RCR2) ClearBits 

func (r *RCR2) ClearBits(mask CR2)

func (*RCR2) Load 

func (r *RCR2) Load() CR2

func (*RCR2) SetBits 

func (r *RCR2) SetBits(mask CR2)

func (*RCR2) Store 

func (r *RCR2) Store(b CR2)

func (*RCR2) StoreBits 

func (r *RCR2) StoreBits(mask, b CR2)

type RDCR 

type RDCR struct{ mmio.U32 }

func (*RDCR) AtomicClearBits 

func (r *RDCR) AtomicClearBits(mask DCR)

func (*RDCR) AtomicSetBits 

func (r *RDCR) AtomicSetBits(mask DCR)

func (*RDCR) AtomicStoreBits 

func (r *RDCR) AtomicStoreBits(mask, b DCR)

func (*RDCR) Bits 

func (r *RDCR) Bits(mask DCR) DCR

func (*RDCR) ClearBits 

func (r *RDCR) ClearBits(mask DCR)

func (*RDCR) Load 

func (r *RDCR) Load() DCR

func (*RDCR) SetBits 

func (r *RDCR) SetBits(mask DCR)

func (*RDCR) Store 

func (r *RDCR) Store(b DCR)

func (*RDCR) StoreBits 

func (r *RDCR) StoreBits(mask, b DCR)

type RDIER 

type RDIER struct{ mmio.U32 }

func (*RDIER) AtomicClearBits 

func (r *RDIER) AtomicClearBits(mask DIER)

func (*RDIER) AtomicSetBits 

func (r *RDIER) AtomicSetBits(mask DIER)

func (*RDIER) AtomicStoreBits 

func (r *RDIER) AtomicStoreBits(mask, b DIER)

func (*RDIER) Bits 

func (r *RDIER) Bits(mask DIER) DIER

func (*RDIER) ClearBits 

func (r *RDIER) ClearBits(mask DIER)

func (*RDIER) Load 

func (r *RDIER) Load() DIER

func (*RDIER) SetBits 

func (r *RDIER) SetBits(mask DIER)

func (*RDIER) Store 

func (r *RDIER) Store(b DIER)

func (*RDIER) StoreBits 

func (r *RDIER) StoreBits(mask, b DIER)

type RDMAR 

type RDMAR struct{ mmio.U32 }

func (*RDMAR) AtomicClearBits 

func (r *RDMAR) AtomicClearBits(mask DMAR)

func (*RDMAR) AtomicSetBits 

func (r *RDMAR) AtomicSetBits(mask DMAR)

func (*RDMAR) AtomicStoreBits 

func (r *RDMAR) AtomicStoreBits(mask, b DMAR)

func (*RDMAR) Bits 

func (r *RDMAR) Bits(mask DMAR) DMAR

func (*RDMAR) ClearBits 

func (r *RDMAR) ClearBits(mask DMAR)

func (*RDMAR) Load 

func (r *RDMAR) Load() DMAR

func (*RDMAR) SetBits 

func (r *RDMAR) SetBits(mask DMAR)

func (*RDMAR) Store 

func (r *RDMAR) Store(b DMAR)

func (*RDMAR) StoreBits 

func (r *RDMAR) StoreBits(mask, b DMAR)

type REGR 

type REGR struct{ mmio.U32 }

func (*REGR) AtomicClearBits 

func (r *REGR) AtomicClearBits(mask EGR)

func (*REGR) AtomicSetBits 

func (r *REGR) AtomicSetBits(mask EGR)

func (*REGR) AtomicStoreBits 

func (r *REGR) AtomicStoreBits(mask, b EGR)

func (*REGR) Bits 

func (r *REGR) Bits(mask EGR) EGR

func (*REGR) ClearBits 

func (r *REGR) ClearBits(mask EGR)

func (*REGR) Load 

func (r *REGR) Load() EGR

func (*REGR) SetBits 

func (r *REGR) SetBits(mask EGR)

func (*REGR) Store 

func (r *REGR) Store(b EGR)

func (*REGR) StoreBits 

func (r *REGR) StoreBits(mask, b EGR)

type RMARR 

type RMARR struct{ mmio.UM32 }

func (RMARR) Load 

func (rm RMARR) Load() ARR

func (RMARR) Store 

func (rm RMARR) Store(b ARR)

type RMBDTR 

type RMBDTR struct{ mmio.UM32 }

func (RMBDTR) Load 

func (rm RMBDTR) Load() BDTR

func (RMBDTR) Store 

func (rm RMBDTR) Store(b BDTR)

type RMCCER 

type RMCCER struct{ mmio.UM32 }

func (RMCCER) Load 

func (rm RMCCER) Load() CCER

func (RMCCER) Store 

func (rm RMCCER) Store(b CCER)

type RMCCMR1 

type RMCCMR1 struct{ mmio.UM32 }

func (RMCCMR1) Load 

func (rm RMCCMR1) Load() CCMR1

func (RMCCMR1) Store 

func (rm RMCCMR1) Store(b CCMR1)

type RMCCMR2 

type RMCCMR2 struct{ mmio.UM32 }

func (RMCCMR2) Load 

func (rm RMCCMR2) Load() CCMR2

func (RMCCMR2) Store 

func (rm RMCCMR2) Store(b CCMR2)

type RMCCR1 

type RMCCR1 struct{ mmio.UM32 }

func (RMCCR1) Load 

func (rm RMCCR1) Load() CCR1

func (RMCCR1) Store 

func (rm RMCCR1) Store(b CCR1)

type RMCCR2 

type RMCCR2 struct{ mmio.UM32 }

func (RMCCR2) Load 

func (rm RMCCR2) Load() CCR2

func (RMCCR2) Store 

func (rm RMCCR2) Store(b CCR2)

type RMCCR3 

type RMCCR3 struct{ mmio.UM32 }

func (RMCCR3) Load 

func (rm RMCCR3) Load() CCR3

func (RMCCR3) Store 

func (rm RMCCR3) Store(b CCR3)

type RMCCR4 

type RMCCR4 struct{ mmio.UM32 }

func (RMCCR4) Load 

func (rm RMCCR4) Load() CCR4

func (RMCCR4) Store 

func (rm RMCCR4) Store(b CCR4)

type RMCNT 

type RMCNT struct{ mmio.UM32 }

func (RMCNT) Load 

func (rm RMCNT) Load() CNT

func (RMCNT) Store 

func (rm RMCNT) Store(b CNT)

type RMCR1 

type RMCR1 struct{ mmio.UM32 }

func (RMCR1) Load 

func (rm RMCR1) Load() CR1

func (RMCR1) Store 

func (rm RMCR1) Store(b CR1)

type RMCR2 

type RMCR2 struct{ mmio.UM32 }

func (RMCR2) Load 

func (rm RMCR2) Load() CR2

func (RMCR2) Store 

func (rm RMCR2) Store(b CR2)

type RMDCR 

type RMDCR struct{ mmio.UM32 }

func (RMDCR) Load 

func (rm RMDCR) Load() DCR

func (RMDCR) Store 

func (rm RMDCR) Store(b DCR)

type RMDIER 

type RMDIER struct{ mmio.UM32 }

func (RMDIER) Load 

func (rm RMDIER) Load() DIER

func (RMDIER) Store 

func (rm RMDIER) Store(b DIER)

type RMDMAR 

type RMDMAR struct{ mmio.UM32 }

func (RMDMAR) Load 

func (rm RMDMAR) Load() DMAR

func (RMDMAR) Store 

func (rm RMDMAR) Store(b DMAR)

type RMEGR 

type RMEGR struct{ mmio.UM32 }

func (RMEGR) Load 

func (rm RMEGR) Load() EGR

func (RMEGR) Store 

func (rm RMEGR) Store(b EGR)

type RMOR 

type RMOR struct{ mmio.UM32 }

func (RMOR) Load 

func (rm RMOR) Load() OR

func (RMOR) Store 

func (rm RMOR) Store(b OR)

type RMPSC 

type RMPSC struct{ mmio.UM32 }

func (RMPSC) Load 

func (rm RMPSC) Load() PSC

func (RMPSC) Store 

func (rm RMPSC) Store(b PSC)

type RMRCR 

type RMRCR struct{ mmio.UM32 }

func (RMRCR) Load 

func (rm RMRCR) Load() RCR

func (RMRCR) Store 

func (rm RMRCR) Store(b RCR)

type RMSMCR 

type RMSMCR struct{ mmio.UM32 }

func (RMSMCR) Load 

func (rm RMSMCR) Load() SMCR

func (RMSMCR) Store 

func (rm RMSMCR) Store(b SMCR)

type RMSR 

type RMSR struct{ mmio.UM32 }

func (RMSR) Load 

func (rm RMSR) Load() SR

func (RMSR) Store 

func (rm RMSR) Store(b SR)

type ROR 

type ROR struct{ mmio.U32 }

func (*ROR) AtomicClearBits 

func (r *ROR) AtomicClearBits(mask OR)

func (*ROR) AtomicSetBits 

func (r *ROR) AtomicSetBits(mask OR)

func (*ROR) AtomicStoreBits 

func (r *ROR) AtomicStoreBits(mask, b OR)

func (*ROR) Bits 

func (r *ROR) Bits(mask OR) OR

func (*ROR) ClearBits 

func (r *ROR) ClearBits(mask OR)

func (*ROR) Load 

func (r *ROR) Load() OR

func (*ROR) SetBits 

func (r *ROR) SetBits(mask OR)

func (*ROR) Store 

func (r *ROR) Store(b OR)

func (*ROR) StoreBits 

func (r *ROR) StoreBits(mask, b OR)

type RPSC 

type RPSC struct{ mmio.U32 }

func (*RPSC) AtomicClearBits 

func (r *RPSC) AtomicClearBits(mask PSC)

func (*RPSC) AtomicSetBits 

func (r *RPSC) AtomicSetBits(mask PSC)

func (*RPSC) AtomicStoreBits 

func (r *RPSC) AtomicStoreBits(mask, b PSC)

func (*RPSC) Bits 

func (r *RPSC) Bits(mask PSC) PSC

func (*RPSC) ClearBits 

func (r *RPSC) ClearBits(mask PSC)

func (*RPSC) Load 

func (r *RPSC) Load() PSC

func (*RPSC) SetBits 

func (r *RPSC) SetBits(mask PSC)

func (*RPSC) Store 

func (r *RPSC) Store(b PSC)

func (*RPSC) StoreBits 

func (r *RPSC) StoreBits(mask, b PSC)

type RRCR 

type RRCR struct{ mmio.U32 }

func (*RRCR) AtomicClearBits 

func (r *RRCR) AtomicClearBits(mask RCR)

func (*RRCR) AtomicSetBits 

func (r *RRCR) AtomicSetBits(mask RCR)

func (*RRCR) AtomicStoreBits 

func (r *RRCR) AtomicStoreBits(mask, b RCR)

func (*RRCR) Bits 

func (r *RRCR) Bits(mask RCR) RCR

func (*RRCR) ClearBits 

func (r *RRCR) ClearBits(mask RCR)

func (*RRCR) Load 

func (r *RRCR) Load() RCR

func (*RRCR) SetBits 

func (r *RRCR) SetBits(mask RCR)

func (*RRCR) Store 

func (r *RRCR) Store(b RCR)

func (*RRCR) StoreBits 

func (r *RRCR) StoreBits(mask, b RCR)

type RSMCR 

type RSMCR struct{ mmio.U32 }

func (*RSMCR) AtomicClearBits 

func (r *RSMCR) AtomicClearBits(mask SMCR)

func (*RSMCR) AtomicSetBits 

func (r *RSMCR) AtomicSetBits(mask SMCR)

func (*RSMCR) AtomicStoreBits 

func (r *RSMCR) AtomicStoreBits(mask, b SMCR)

func (*RSMCR) Bits 

func (r *RSMCR) Bits(mask SMCR) SMCR

func (*RSMCR) ClearBits 

func (r *RSMCR) ClearBits(mask SMCR)

func (*RSMCR) Load 

func (r *RSMCR) Load() SMCR

func (*RSMCR) SetBits 

func (r *RSMCR) SetBits(mask SMCR)

func (*RSMCR) Store 

func (r *RSMCR) Store(b SMCR)

func (*RSMCR) StoreBits 

func (r *RSMCR) StoreBits(mask, b SMCR)

type RSR 

type RSR struct{ mmio.U32 }

func (*RSR) AtomicClearBits 

func (r *RSR) AtomicClearBits(mask SR)

func (*RSR) AtomicSetBits 

func (r *RSR) AtomicSetBits(mask SR)

func (*RSR) AtomicStoreBits 

func (r *RSR) AtomicStoreBits(mask, b SR)

func (*RSR) Bits 

func (r *RSR) Bits(mask SR) SR

func (*RSR) ClearBits 

func (r *RSR) ClearBits(mask SR)

func (*RSR) Load 

func (r *RSR) Load() SR

func (*RSR) SetBits 

func (r *RSR) SetBits(mask SR)

func (*RSR) Store 

func (r *RSR) Store(b SR)

func (*RSR) StoreBits 

func (r *RSR) StoreBits(mask, b SR)

type SMCR 

type SMCR uint32
const (
	SMS  SMCR = 0x07 << 0  //+ SMS[2:0] bits (Slave mode selection).
	OCCS SMCR = 0x01 << 3  //+ OCREF clear selection.
	TS   SMCR = 0x07 << 4  //+ TS[2:0] bits (Trigger selection).
	MSM  SMCR = 0x01 << 7  //+ Master/slave mode.
	ETF  SMCR = 0x0F << 8  //+ ETF[3:0] bits (External trigger filter).
	ETPS SMCR = 0x03 << 12 //+ ETPS[1:0] bits (External trigger prescaler).
	ECE  SMCR = 0x01 << 14 //+ External clock enable.
	ETP  SMCR = 0x01 << 15 //+ External trigger polarity.
)

func (SMCR) Field 

func (b SMCR) Field(mask SMCR) int

func (SMCR) J 

func (mask SMCR) J(v int) SMCR

type SR 

type SR uint32
const (
	UIF   SR = 0x01 << 0  //+ Update interrupt Flag.
	CC1IF SR = 0x01 << 1  //+ Capture/Compare 1 interrupt Flag.
	CC2IF SR = 0x01 << 2  //+ Capture/Compare 2 interrupt Flag.
	CC3IF SR = 0x01 << 3  //+ Capture/Compare 3 interrupt Flag.
	CC4IF SR = 0x01 << 4  //+ Capture/Compare 4 interrupt Flag.
	COMIF SR = 0x01 << 5  //+ COM interrupt Flag.
	TIF   SR = 0x01 << 6  //+ Trigger interrupt Flag.
	BIF   SR = 0x01 << 7  //+ Break interrupt Flag.
	CC1OF SR = 0x01 << 9  //+ Capture/Compare 1 Overcapture Flag.
	CC2OF SR = 0x01 << 10 //+ Capture/Compare 2 Overcapture Flag.
	CC3OF SR = 0x01 << 11 //+ Capture/Compare 3 Overcapture Flag.
	CC4OF SR = 0x01 << 12 //+ Capture/Compare 4 Overcapture Flag.
)

func (SR) Field 

func (b SR) Field(mask SR) int

func (SR) J 

func (mask SR) J(v int) SR

type TIM_Periph 

type TIM_Periph struct {
	CR1   RCR1
	CR2   RCR2
	SMCR  RSMCR
	DIER  RDIER
	SR    RSR
	EGR   REGR
	CCMR1 RCCMR1
	CCMR2 RCCMR2
	CCER  RCCER
	CNT   RCNT
	PSC   RPSC
	ARR   RARR
	RCR   RRCR
	CCR1  RCCR1
	CCR2  RCCR2
	CCR3  RCCR3
	CCR4  RCCR4
	BDTR  RBDTR
	DCR   RDCR
	DMAR  RDMAR
	OR    ROR
}

func (*TIM_Periph) AOE 

func (p *TIM_Periph) AOE() RMBDTR

func (*TIM_Periph) ARPE 

func (p *TIM_Periph) ARPE() RMCR1

func (*TIM_Periph) BG 

func (p *TIM_Periph) BG() RMEGR

func (*TIM_Periph) BIE 

func (p *TIM_Periph) BIE() RMDIER

func (*TIM_Periph) BIF 

func (p *TIM_Periph) BIF() RMSR

func (*TIM_Periph) BKE 

func (p *TIM_Periph) BKE() RMBDTR

func (*TIM_Periph) BKP 

func (p *TIM_Periph) BKP() RMBDTR

func (*TIM_Periph) BaseAddr 

func (p *TIM_Periph) BaseAddr() uintptr

func (*TIM_Periph) CC1DE 

func (p *TIM_Periph) CC1DE() RMDIER

func (*TIM_Periph) CC1E 

func (p *TIM_Periph) CC1E() RMCCER

func (*TIM_Periph) CC1G 

func (p *TIM_Periph) CC1G() RMEGR

func (*TIM_Periph) CC1IE 

func (p *TIM_Periph) CC1IE() RMDIER

func (*TIM_Periph) CC1IF 

func (p *TIM_Periph) CC1IF() RMSR

func (*TIM_Periph) CC1NE 

func (p *TIM_Periph) CC1NE() RMCCER

func (*TIM_Periph) CC1NP 

func (p *TIM_Periph) CC1NP() RMCCER

func (*TIM_Periph) CC1OF 

func (p *TIM_Periph) CC1OF() RMSR

func (*TIM_Periph) CC1P 

func (p *TIM_Periph) CC1P() RMCCER

func (*TIM_Periph) CC1S 

func (p *TIM_Periph) CC1S() RMCCMR1

func (*TIM_Periph) CC2DE 

func (p *TIM_Periph) CC2DE() RMDIER

func (*TIM_Periph) CC2E 

func (p *TIM_Periph) CC2E() RMCCER

func (*TIM_Periph) CC2G 

func (p *TIM_Periph) CC2G() RMEGR

func (*TIM_Periph) CC2IE 

func (p *TIM_Periph) CC2IE() RMDIER

func (*TIM_Periph) CC2IF 

func (p *TIM_Periph) CC2IF() RMSR

func (*TIM_Periph) CC2NE 

func (p *TIM_Periph) CC2NE() RMCCER

func (*TIM_Periph) CC2NP 

func (p *TIM_Periph) CC2NP() RMCCER

func (*TIM_Periph) CC2OF 

func (p *TIM_Periph) CC2OF() RMSR

func (*TIM_Periph) CC2P 

func (p *TIM_Periph) CC2P() RMCCER

func (*TIM_Periph) CC2S 

func (p *TIM_Periph) CC2S() RMCCMR1

func (*TIM_Periph) CC3DE 

func (p *TIM_Periph) CC3DE() RMDIER

func (*TIM_Periph) CC3E 

func (p *TIM_Periph) CC3E() RMCCER

func (*TIM_Periph) CC3G 

func (p *TIM_Periph) CC3G() RMEGR

func (*TIM_Periph) CC3IE 

func (p *TIM_Periph) CC3IE() RMDIER

func (*TIM_Periph) CC3IF 

func (p *TIM_Periph) CC3IF() RMSR

func (*TIM_Periph) CC3NE 

func (p *TIM_Periph) CC3NE() RMCCER

func (*TIM_Periph) CC3NP 

func (p *TIM_Periph) CC3NP() RMCCER

func (*TIM_Periph) CC3OF 

func (p *TIM_Periph) CC3OF() RMSR

func (*TIM_Periph) CC3P 

func (p *TIM_Periph) CC3P() RMCCER

func (*TIM_Periph) CC3S 

func (p *TIM_Periph) CC3S() RMCCMR2

func (*TIM_Periph) CC4DE 

func (p *TIM_Periph) CC4DE() RMDIER

func (*TIM_Periph) CC4E 

func (p *TIM_Periph) CC4E() RMCCER

func (*TIM_Periph) CC4G 

func (p *TIM_Periph) CC4G() RMEGR

func (*TIM_Periph) CC4IE 

func (p *TIM_Periph) CC4IE() RMDIER

func (*TIM_Periph) CC4IF 

func (p *TIM_Periph) CC4IF() RMSR

func (*TIM_Periph) CC4NP 

func (p *TIM_Periph) CC4NP() RMCCER

func (*TIM_Periph) CC4OF 

func (p *TIM_Periph) CC4OF() RMSR

func (*TIM_Periph) CC4P 

func (p *TIM_Periph) CC4P() RMCCER

func (*TIM_Periph) CC4S 

func (p *TIM_Periph) CC4S() RMCCMR2

func (*TIM_Periph) CCDS 

func (p *TIM_Periph) CCDS() RMCR2

func (*TIM_Periph) CCPC 

func (p *TIM_Periph) CCPC() RMCR2

func (*TIM_Periph) CCUS 

func (p *TIM_Periph) CCUS() RMCR2

func (*TIM_Periph) CEN 

func (p *TIM_Periph) CEN() RMCR1

func (*TIM_Periph) CKD 

func (p *TIM_Periph) CKD() RMCR1

func (*TIM_Periph) CMS 

func (p *TIM_Periph) CMS() RMCR1

func (*TIM_Periph) COMDE 

func (p *TIM_Periph) COMDE() RMDIER

func (*TIM_Periph) COMG 

func (p *TIM_Periph) COMG() RMEGR

func (*TIM_Periph) COMIE 

func (p *TIM_Periph) COMIE() RMDIER

func (*TIM_Periph) COMIF 

func (p *TIM_Periph) COMIF() RMSR

func (*TIM_Periph) DBA 

func (p *TIM_Periph) DBA() RMDCR

func (*TIM_Periph) DBL 

func (p *TIM_Periph) DBL() RMDCR

func (*TIM_Periph) DIR 

func (p *TIM_Periph) DIR() RMCR1

func (*TIM_Periph) DMAB 

func (p *TIM_Periph) DMAB() RMDMAR

func (*TIM_Periph) DTG 

func (p *TIM_Periph) DTG() RMBDTR

func (*TIM_Periph) ECE 

func (p *TIM_Periph) ECE() RMSMCR

func (*TIM_Periph) ETF 

func (p *TIM_Periph) ETF() RMSMCR

func (*TIM_Periph) ETP 

func (p *TIM_Periph) ETP() RMSMCR

func (*TIM_Periph) ETPS 

func (p *TIM_Periph) ETPS() RMSMCR

func (*TIM_Periph) IC1F 

func (p *TIM_Periph) IC1F() RMCCMR1

func (*TIM_Periph) IC1PSC 

func (p *TIM_Periph) IC1PSC() RMCCMR1

func (*TIM_Periph) IC2F 

func (p *TIM_Periph) IC2F() RMCCMR1

func (*TIM_Periph) IC2PSC 

func (p *TIM_Periph) IC2PSC() RMCCMR1

func (*TIM_Periph) IC3F 

func (p *TIM_Periph) IC3F() RMCCMR2

func (*TIM_Periph) IC3PSC 

func (p *TIM_Periph) IC3PSC() RMCCMR2

func (*TIM_Periph) IC4F 

func (p *TIM_Periph) IC4F() RMCCMR2

func (*TIM_Periph) IC4PSC 

func (p *TIM_Periph) IC4PSC() RMCCMR2

func (*TIM_Periph) LOCK 

func (p *TIM_Periph) LOCK() RMBDTR

func (*TIM_Periph) MMS 

func (p *TIM_Periph) MMS() RMCR2

func (*TIM_Periph) MOE 

func (p *TIM_Periph) MOE() RMBDTR

func (*TIM_Periph) MSM 

func (p *TIM_Periph) MSM() RMSMCR

func (*TIM_Periph) OC1CE 

func (p *TIM_Periph) OC1CE() RMCCMR1

func (*TIM_Periph) OC1FE 

func (p *TIM_Periph) OC1FE() RMCCMR1

func (*TIM_Periph) OC1M 

func (p *TIM_Periph) OC1M() RMCCMR1

func (*TIM_Periph) OC1PE 

func (p *TIM_Periph) OC1PE() RMCCMR1

func (*TIM_Periph) OC2CE 

func (p *TIM_Periph) OC2CE() RMCCMR1

func (*TIM_Periph) OC2FE 

func (p *TIM_Periph) OC2FE() RMCCMR1

func (*TIM_Periph) OC2M 

func (p *TIM_Periph) OC2M() RMCCMR1

func (*TIM_Periph) OC2PE 

func (p *TIM_Periph) OC2PE() RMCCMR1

func (*TIM_Periph) OC3CE 

func (p *TIM_Periph) OC3CE() RMCCMR2

func (*TIM_Periph) OC3FE 

func (p *TIM_Periph) OC3FE() RMCCMR2

func (*TIM_Periph) OC3M 

func (p *TIM_Periph) OC3M() RMCCMR2

func (*TIM_Periph) OC3PE 

func (p *TIM_Periph) OC3PE() RMCCMR2

func (*TIM_Periph) OC4CE 

func (p *TIM_Periph) OC4CE() RMCCMR2

func (*TIM_Periph) OC4FE 

func (p *TIM_Periph) OC4FE() RMCCMR2

func (*TIM_Periph) OC4M 

func (p *TIM_Periph) OC4M() RMCCMR2

func (*TIM_Periph) OC4PE 

func (p *TIM_Periph) OC4PE() RMCCMR2

func (*TIM_Periph) OCCS 

func (p *TIM_Periph) OCCS() RMSMCR

func (*TIM_Periph) OIS1 

func (p *TIM_Periph) OIS1() RMCR2

func (*TIM_Periph) OIS1N 

func (p *TIM_Periph) OIS1N() RMCR2

func (*TIM_Periph) OIS2 

func (p *TIM_Periph) OIS2() RMCR2

func (*TIM_Periph) OIS2N 

func (p *TIM_Periph) OIS2N() RMCR2

func (*TIM_Periph) OIS3 

func (p *TIM_Periph) OIS3() RMCR2

func (*TIM_Periph) OIS3N 

func (p *TIM_Periph) OIS3N() RMCR2

func (*TIM_Periph) OIS4 

func (p *TIM_Periph) OIS4() RMCR2

func (*TIM_Periph) OPM 

func (p *TIM_Periph) OPM() RMCR1

func (*TIM_Periph) OSSI 

func (p *TIM_Periph) OSSI() RMBDTR

func (*TIM_Periph) OSSR 

func (p *TIM_Periph) OSSR() RMBDTR

func (*TIM_Periph) REP 

func (p *TIM_Periph) REP() RMRCR

func (*TIM_Periph) SMS 

func (p *TIM_Periph) SMS() RMSMCR

func (*TIM_Periph) TDE 

func (p *TIM_Periph) TDE() RMDIER

func (*TIM_Periph) TG 

func (p *TIM_Periph) TG() RMEGR

func (*TIM_Periph) TI1S 

func (p *TIM_Periph) TI1S() RMCR2

func (*TIM_Periph) TIE 

func (p *TIM_Periph) TIE() RMDIER

func (*TIM_Periph) TIF 

func (p *TIM_Periph) TIF() RMSR

func (*TIM_Periph) TS 

func (p *TIM_Periph) TS() RMSMCR

func (*TIM_Periph) UDE 

func (p *TIM_Periph) UDE() RMDIER

func (*TIM_Periph) UDIS 

func (p *TIM_Periph) UDIS() RMCR1

func (*TIM_Periph) UG 

func (p *TIM_Periph) UG() RMEGR

func (*TIM_Periph) UIE 

func (p *TIM_Periph) UIE() RMDIER

func (*TIM_Periph) UIF 

func (p *TIM_Periph) UIF() RMSR

func (*TIM_Periph) URS 

func (p *TIM_Periph) URS() RMCR1

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