dma

package
v0.0.0-...-168ccc2 Latest Latest
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 Go to latest Published: Dec 5, 2021 License: BSD-3-Clause Imports: 4 Imported by: 0

Documentation

Overview

Package dma provides interface to DMA Controller.

Peripheral: DMA_Periph DMA Controller. Instances: 

DMA1  mmap.DMA1_BASE

Registers: 

0x00 32  ISR  Interrupt status register.
0x04 32  IFCR Interrupt flag clear register.

Import: 

stm32/o/f030x8/mmap

Peripheral: DMA_Channel_Periph DMA Controller. Instances: 

DMA1_Channel1  mmap.DMA1_Channel1_BASE
DMA1_Channel2  mmap.DMA1_Channel2_BASE
DMA1_Channel3  mmap.DMA1_Channel3_BASE
DMA1_Channel4  mmap.DMA1_Channel4_BASE
DMA1_Channel5  mmap.DMA1_Channel5_BASE

Registers: 

0x00 32  CCR   DMA channel x configuration register.
0x04 32  CNDTR DMA channel x number of data register.
0x08 32  CPAR  DMA channel x peripheral address register.
0x0C 32  CMAR  DMA channel x memory address register.

Import: 

stm32/o/f030x8/mmap

Index

Constants

View Source 
const (
	GIF1n  = 0
	TCIF1n = 1
	HTIF1n = 2
	TEIF1n = 3
	GIF2n  = 4
	TCIF2n = 5
	HTIF2n = 6
	TEIF2n = 7
	GIF3n  = 8
	TCIF3n = 9
	HTIF3n = 10
	TEIF3n = 11
	GIF4n  = 12
	TCIF4n = 13
	HTIF4n = 14
	TEIF4n = 15
	GIF5n  = 16
	TCIF5n = 17
	HTIF5n = 18
	TEIF5n = 19
)
View Source 
const (
	CGIF1n  = 0
	CTCIF1n = 1
	CHTIF1n = 2
	CTEIF1n = 3
	CGIF2n  = 4
	CTCIF2n = 5
	CHTIF2n = 6
	CTEIF2n = 7
	CGIF3n  = 8
	CTCIF3n = 9
	CHTIF3n = 10
	CTEIF3n = 11
	CGIF4n  = 12
	CTCIF4n = 13
	CHTIF4n = 14
	CTEIF4n = 15
	CGIF5n  = 16
	CTCIF5n = 17
	CHTIF5n = 18
	CTEIF5n = 19
)
View Source 
const (
	ENn      = 0
	TCIEn    = 1
	HTIEn    = 2
	TEIEn    = 3
	DIRn     = 4
	CIRCn    = 5
	PINCn    = 6
	MINCn    = 7
	PSIZEn   = 8
	MSIZEn   = 10
	PLn      = 12
	MEM2MEMn = 14
)
View Source 
const (
	MAn = 0
)
View Source 
const (
	NDTn = 0
)
View Source 
const (
	PAn = 0
)

Variables

View Source 
var DMA1 = (*DMA_Periph)(unsafe.Pointer(uintptr(mmap.DMA1_BASE)))
View Source 
var DMA1_Channel1 = (*DMA_Channel_Periph)(unsafe.Pointer(uintptr(mmap.DMA1_Channel1_BASE)))
View Source 
var DMA1_Channel2 = (*DMA_Channel_Periph)(unsafe.Pointer(uintptr(mmap.DMA1_Channel2_BASE)))
View Source 
var DMA1_Channel3 = (*DMA_Channel_Periph)(unsafe.Pointer(uintptr(mmap.DMA1_Channel3_BASE)))
View Source 
var DMA1_Channel4 = (*DMA_Channel_Periph)(unsafe.Pointer(uintptr(mmap.DMA1_Channel4_BASE)))
View Source 
var DMA1_Channel5 = (*DMA_Channel_Periph)(unsafe.Pointer(uintptr(mmap.DMA1_Channel5_BASE)))

Functions

This section is empty.

Types

type CCR 

type CCR uint32
const (
	EN      CCR = 0x01 << 0  //+ Channel enable.
	TCIE    CCR = 0x01 << 1  //+ Transfer complete interrupt enable.
	HTIE    CCR = 0x01 << 2  //+ Half Transfer interrupt enable.
	TEIE    CCR = 0x01 << 3  //+ Transfer error interrupt enable.
	DIR     CCR = 0x01 << 4  //+ Data transfer direction.
	CIRC    CCR = 0x01 << 5  //+ Circular mode.
	PINC    CCR = 0x01 << 6  //+ Peripheral increment mode.
	MINC    CCR = 0x01 << 7  //+ Memory increment mode.
	PSIZE   CCR = 0x03 << 8  //+ PSIZE[1:0] bits (Peripheral size).
	MSIZE   CCR = 0x03 << 10 //+ MSIZE[1:0] bits (Memory size).
	PL      CCR = 0x03 << 12 //+ PL[1:0] bits(Channel Priority level).
	MEM2MEM CCR = 0x01 << 14 //+ Memory to memory mode.
)

func (CCR) Field 

func (b CCR) Field(mask CCR) int

func (CCR) J 

func (mask CCR) J(v int) CCR

type CMAR 

type CMAR uint32
const (
	MA CMAR = 0xFFFFFFFF << 0 //+ Memory Address.
)

func (CMAR) Field 

func (b CMAR) Field(mask CMAR) int

func (CMAR) J 

func (mask CMAR) J(v int) CMAR

type CNDTR 

type CNDTR uint32
const (
	NDT CNDTR = 0xFFFF << 0 //+ Number of data to Transfer.
)

func (CNDTR) Field 

func (b CNDTR) Field(mask CNDTR) int

func (CNDTR) J 

func (mask CNDTR) J(v int) CNDTR

type CPAR 

type CPAR uint32
const (
	PA CPAR = 0xFFFFFFFF << 0 //+ Peripheral Address.
)

func (CPAR) Field 

func (b CPAR) Field(mask CPAR) int

func (CPAR) J 

func (mask CPAR) J(v int) CPAR

type DMA_Channel_Periph 

type DMA_Channel_Periph struct {
	CCR   RCCR
	CNDTR RCNDTR
	CPAR  RCPAR
	CMAR  RCMAR
}

func (*DMA_Channel_Periph) BaseAddr 

func (p *DMA_Channel_Periph) BaseAddr() uintptr

func (*DMA_Channel_Periph) CIRC 

func (p *DMA_Channel_Periph) CIRC() RMCCR

func (*DMA_Channel_Periph) DIR 

func (p *DMA_Channel_Periph) DIR() RMCCR

func (*DMA_Channel_Periph) EN 

func (p *DMA_Channel_Periph) EN() RMCCR

func (*DMA_Channel_Periph) HTIE 

func (p *DMA_Channel_Periph) HTIE() RMCCR

func (*DMA_Channel_Periph) MA 

func (p *DMA_Channel_Periph) MA() RMCMAR

func (*DMA_Channel_Periph) MEM2MEM 

func (p *DMA_Channel_Periph) MEM2MEM() RMCCR

func (*DMA_Channel_Periph) MINC 

func (p *DMA_Channel_Periph) MINC() RMCCR

func (*DMA_Channel_Periph) MSIZE 

func (p *DMA_Channel_Periph) MSIZE() RMCCR

func (*DMA_Channel_Periph) NDT 

func (p *DMA_Channel_Periph) NDT() RMCNDTR

func (*DMA_Channel_Periph) PA 

func (p *DMA_Channel_Periph) PA() RMCPAR

func (*DMA_Channel_Periph) PINC 

func (p *DMA_Channel_Periph) PINC() RMCCR

func (*DMA_Channel_Periph) PL 

func (p *DMA_Channel_Periph) PL() RMCCR

func (*DMA_Channel_Periph) PSIZE 

func (p *DMA_Channel_Periph) PSIZE() RMCCR

func (*DMA_Channel_Periph) TCIE 

func (p *DMA_Channel_Periph) TCIE() RMCCR

func (*DMA_Channel_Periph) TEIE 

func (p *DMA_Channel_Periph) TEIE() RMCCR

type DMA_Periph 

type DMA_Periph struct {
	ISR  RISR
	IFCR RIFCR
}

func (*DMA_Periph) BaseAddr 

func (p *DMA_Periph) BaseAddr() uintptr

func (*DMA_Periph) CGIF1 

func (p *DMA_Periph) CGIF1() RMIFCR

func (*DMA_Periph) CGIF2 

func (p *DMA_Periph) CGIF2() RMIFCR

func (*DMA_Periph) CGIF3 

func (p *DMA_Periph) CGIF3() RMIFCR

func (*DMA_Periph) CGIF4 

func (p *DMA_Periph) CGIF4() RMIFCR

func (*DMA_Periph) CGIF5 

func (p *DMA_Periph) CGIF5() RMIFCR

func (*DMA_Periph) CHTIF1 

func (p *DMA_Periph) CHTIF1() RMIFCR

func (*DMA_Periph) CHTIF2 

func (p *DMA_Periph) CHTIF2() RMIFCR

func (*DMA_Periph) CHTIF3 

func (p *DMA_Periph) CHTIF3() RMIFCR

func (*DMA_Periph) CHTIF4 

func (p *DMA_Periph) CHTIF4() RMIFCR

func (*DMA_Periph) CHTIF5 

func (p *DMA_Periph) CHTIF5() RMIFCR

func (*DMA_Periph) CTCIF1 

func (p *DMA_Periph) CTCIF1() RMIFCR

func (*DMA_Periph) CTCIF2 

func (p *DMA_Periph) CTCIF2() RMIFCR

func (*DMA_Periph) CTCIF3 

func (p *DMA_Periph) CTCIF3() RMIFCR

func (*DMA_Periph) CTCIF4 

func (p *DMA_Periph) CTCIF4() RMIFCR

func (*DMA_Periph) CTCIF5 

func (p *DMA_Periph) CTCIF5() RMIFCR

func (*DMA_Periph) CTEIF1 

func (p *DMA_Periph) CTEIF1() RMIFCR

func (*DMA_Periph) CTEIF2 

func (p *DMA_Periph) CTEIF2() RMIFCR

func (*DMA_Periph) CTEIF3 

func (p *DMA_Periph) CTEIF3() RMIFCR

func (*DMA_Periph) CTEIF4 

func (p *DMA_Periph) CTEIF4() RMIFCR

func (*DMA_Periph) CTEIF5 

func (p *DMA_Periph) CTEIF5() RMIFCR

func (*DMA_Periph) GIF1 

func (p *DMA_Periph) GIF1() RMISR

func (*DMA_Periph) GIF2 

func (p *DMA_Periph) GIF2() RMISR

func (*DMA_Periph) GIF3 

func (p *DMA_Periph) GIF3() RMISR

func (*DMA_Periph) GIF4 

func (p *DMA_Periph) GIF4() RMISR

func (*DMA_Periph) GIF5 

func (p *DMA_Periph) GIF5() RMISR

func (*DMA_Periph) HTIF1 

func (p *DMA_Periph) HTIF1() RMISR

func (*DMA_Periph) HTIF2 

func (p *DMA_Periph) HTIF2() RMISR

func (*DMA_Periph) HTIF3 

func (p *DMA_Periph) HTIF3() RMISR

func (*DMA_Periph) HTIF4 

func (p *DMA_Periph) HTIF4() RMISR

func (*DMA_Periph) HTIF5 

func (p *DMA_Periph) HTIF5() RMISR

func (*DMA_Periph) TCIF1 

func (p *DMA_Periph) TCIF1() RMISR

func (*DMA_Periph) TCIF2 

func (p *DMA_Periph) TCIF2() RMISR

func (*DMA_Periph) TCIF3 

func (p *DMA_Periph) TCIF3() RMISR

func (*DMA_Periph) TCIF4 

func (p *DMA_Periph) TCIF4() RMISR

func (*DMA_Periph) TCIF5 

func (p *DMA_Periph) TCIF5() RMISR

func (*DMA_Periph) TEIF1 

func (p *DMA_Periph) TEIF1() RMISR

func (*DMA_Periph) TEIF2 

func (p *DMA_Periph) TEIF2() RMISR

func (*DMA_Periph) TEIF3 

func (p *DMA_Periph) TEIF3() RMISR

func (*DMA_Periph) TEIF4 

func (p *DMA_Periph) TEIF4() RMISR

func (*DMA_Periph) TEIF5 

func (p *DMA_Periph) TEIF5() RMISR

type IFCR 

type IFCR uint32
const (
	CGIF1  IFCR = 0x01 << 0  //+ Channel 1 Global interrupt clear.
	CTCIF1 IFCR = 0x01 << 1  //+ Channel 1 Transfer Complete clear.
	CHTIF1 IFCR = 0x01 << 2  //+ Channel 1 Half Transfer clear.
	CTEIF1 IFCR = 0x01 << 3  //+ Channel 1 Transfer Error clear.
	CGIF2  IFCR = 0x01 << 4  //+ Channel 2 Global interrupt clear.
	CTCIF2 IFCR = 0x01 << 5  //+ Channel 2 Transfer Complete clear.
	CHTIF2 IFCR = 0x01 << 6  //+ Channel 2 Half Transfer clear.
	CTEIF2 IFCR = 0x01 << 7  //+ Channel 2 Transfer Error clear.
	CGIF3  IFCR = 0x01 << 8  //+ Channel 3 Global interrupt clear.
	CTCIF3 IFCR = 0x01 << 9  //+ Channel 3 Transfer Complete clear.
	CHTIF3 IFCR = 0x01 << 10 //+ Channel 3 Half Transfer clear.
	CTEIF3 IFCR = 0x01 << 11 //+ Channel 3 Transfer Error clear.
	CGIF4  IFCR = 0x01 << 12 //+ Channel 4 Global interrupt clear.
	CTCIF4 IFCR = 0x01 << 13 //+ Channel 4 Transfer Complete clear.
	CHTIF4 IFCR = 0x01 << 14 //+ Channel 4 Half Transfer clear.
	CTEIF4 IFCR = 0x01 << 15 //+ Channel 4 Transfer Error clear.
	CGIF5  IFCR = 0x01 << 16 //+ Channel 5 Global interrupt clear.
	CTCIF5 IFCR = 0x01 << 17 //+ Channel 5 Transfer Complete clear.
	CHTIF5 IFCR = 0x01 << 18 //+ Channel 5 Half Transfer clear.
	CTEIF5 IFCR = 0x01 << 19 //+ Channel 5 Transfer Error clear.
)

func (IFCR) Field 

func (b IFCR) Field(mask IFCR) int

func (IFCR) J 

func (mask IFCR) J(v int) IFCR

type ISR 

type ISR uint32
const (
	GIF1  ISR = 0x01 << 0  //+ Channel 1 Global interrupt flag.
	TCIF1 ISR = 0x01 << 1  //+ Channel 1 Transfer Complete flag.
	HTIF1 ISR = 0x01 << 2  //+ Channel 1 Half Transfer flag.
	TEIF1 ISR = 0x01 << 3  //+ Channel 1 Transfer Error flag.
	GIF2  ISR = 0x01 << 4  //+ Channel 2 Global interrupt flag.
	TCIF2 ISR = 0x01 << 5  //+ Channel 2 Transfer Complete flag.
	HTIF2 ISR = 0x01 << 6  //+ Channel 2 Half Transfer flag.
	TEIF2 ISR = 0x01 << 7  //+ Channel 2 Transfer Error flag.
	GIF3  ISR = 0x01 << 8  //+ Channel 3 Global interrupt flag.
	TCIF3 ISR = 0x01 << 9  //+ Channel 3 Transfer Complete flag.
	HTIF3 ISR = 0x01 << 10 //+ Channel 3 Half Transfer flag.
	TEIF3 ISR = 0x01 << 11 //+ Channel 3 Transfer Error flag.
	GIF4  ISR = 0x01 << 12 //+ Channel 4 Global interrupt flag.
	TCIF4 ISR = 0x01 << 13 //+ Channel 4 Transfer Complete flag.
	HTIF4 ISR = 0x01 << 14 //+ Channel 4 Half Transfer flag.
	TEIF4 ISR = 0x01 << 15 //+ Channel 4 Transfer Error flag.
	GIF5  ISR = 0x01 << 16 //+ Channel 5 Global interrupt flag.
	TCIF5 ISR = 0x01 << 17 //+ Channel 5 Transfer Complete flag.
	HTIF5 ISR = 0x01 << 18 //+ Channel 5 Half Transfer flag.
	TEIF5 ISR = 0x01 << 19 //+ Channel 5 Transfer Error flag.
)

func (ISR) Field 

func (b ISR) Field(mask ISR) int

func (ISR) J 

func (mask ISR) J(v int) ISR

type RCCR 

type RCCR struct{ mmio.U32 }

func (*RCCR) AtomicClearBits 

func (r *RCCR) AtomicClearBits(mask CCR)

func (*RCCR) AtomicSetBits 

func (r *RCCR) AtomicSetBits(mask CCR)

func (*RCCR) AtomicStoreBits 

func (r *RCCR) AtomicStoreBits(mask, b CCR)

func (*RCCR) Bits 

func (r *RCCR) Bits(mask CCR) CCR

func (*RCCR) ClearBits 

func (r *RCCR) ClearBits(mask CCR)

func (*RCCR) Load 

func (r *RCCR) Load() CCR

func (*RCCR) SetBits 

func (r *RCCR) SetBits(mask CCR)

func (*RCCR) Store 

func (r *RCCR) Store(b CCR)

func (*RCCR) StoreBits 

func (r *RCCR) StoreBits(mask, b CCR)

type RCMAR 

type RCMAR struct{ mmio.U32 }

func (*RCMAR) AtomicClearBits 

func (r *RCMAR) AtomicClearBits(mask CMAR)

func (*RCMAR) AtomicSetBits 

func (r *RCMAR) AtomicSetBits(mask CMAR)

func (*RCMAR) AtomicStoreBits 

func (r *RCMAR) AtomicStoreBits(mask, b CMAR)

func (*RCMAR) Bits 

func (r *RCMAR) Bits(mask CMAR) CMAR

func (*RCMAR) ClearBits 

func (r *RCMAR) ClearBits(mask CMAR)

func (*RCMAR) Load 

func (r *RCMAR) Load() CMAR

func (*RCMAR) SetBits 

func (r *RCMAR) SetBits(mask CMAR)

func (*RCMAR) Store 

func (r *RCMAR) Store(b CMAR)

func (*RCMAR) StoreBits 

func (r *RCMAR) StoreBits(mask, b CMAR)

type RCNDTR 

type RCNDTR struct{ mmio.U32 }

func (*RCNDTR) AtomicClearBits 

func (r *RCNDTR) AtomicClearBits(mask CNDTR)

func (*RCNDTR) AtomicSetBits 

func (r *RCNDTR) AtomicSetBits(mask CNDTR)

func (*RCNDTR) AtomicStoreBits 

func (r *RCNDTR) AtomicStoreBits(mask, b CNDTR)

func (*RCNDTR) Bits 

func (r *RCNDTR) Bits(mask CNDTR) CNDTR

func (*RCNDTR) ClearBits 

func (r *RCNDTR) ClearBits(mask CNDTR)

func (*RCNDTR) Load 

func (r *RCNDTR) Load() CNDTR

func (*RCNDTR) SetBits 

func (r *RCNDTR) SetBits(mask CNDTR)

func (*RCNDTR) Store 

func (r *RCNDTR) Store(b CNDTR)

func (*RCNDTR) StoreBits 

func (r *RCNDTR) StoreBits(mask, b CNDTR)

type RCPAR 

type RCPAR struct{ mmio.U32 }

func (*RCPAR) AtomicClearBits 

func (r *RCPAR) AtomicClearBits(mask CPAR)

func (*RCPAR) AtomicSetBits 

func (r *RCPAR) AtomicSetBits(mask CPAR)

func (*RCPAR) AtomicStoreBits 

func (r *RCPAR) AtomicStoreBits(mask, b CPAR)

func (*RCPAR) Bits 

func (r *RCPAR) Bits(mask CPAR) CPAR

func (*RCPAR) ClearBits 

func (r *RCPAR) ClearBits(mask CPAR)

func (*RCPAR) Load 

func (r *RCPAR) Load() CPAR

func (*RCPAR) SetBits 

func (r *RCPAR) SetBits(mask CPAR)

func (*RCPAR) Store 

func (r *RCPAR) Store(b CPAR)

func (*RCPAR) StoreBits 

func (r *RCPAR) StoreBits(mask, b CPAR)

type RIFCR 

type RIFCR struct{ mmio.U32 }

func (*RIFCR) AtomicClearBits 

func (r *RIFCR) AtomicClearBits(mask IFCR)

func (*RIFCR) AtomicSetBits 

func (r *RIFCR) AtomicSetBits(mask IFCR)

func (*RIFCR) AtomicStoreBits 

func (r *RIFCR) AtomicStoreBits(mask, b IFCR)

func (*RIFCR) Bits 

func (r *RIFCR) Bits(mask IFCR) IFCR

func (*RIFCR) ClearBits 

func (r *RIFCR) ClearBits(mask IFCR)

func (*RIFCR) Load 

func (r *RIFCR) Load() IFCR

func (*RIFCR) SetBits 

func (r *RIFCR) SetBits(mask IFCR)

func (*RIFCR) Store 

func (r *RIFCR) Store(b IFCR)

func (*RIFCR) StoreBits 

func (r *RIFCR) StoreBits(mask, b IFCR)

type RISR 

type RISR struct{ mmio.U32 }

func (*RISR) AtomicClearBits 

func (r *RISR) AtomicClearBits(mask ISR)

func (*RISR) AtomicSetBits 

func (r *RISR) AtomicSetBits(mask ISR)

func (*RISR) AtomicStoreBits 

func (r *RISR) AtomicStoreBits(mask, b ISR)

func (*RISR) Bits 

func (r *RISR) Bits(mask ISR) ISR

func (*RISR) ClearBits 

func (r *RISR) ClearBits(mask ISR)

func (*RISR) Load 

func (r *RISR) Load() ISR

func (*RISR) SetBits 

func (r *RISR) SetBits(mask ISR)

func (*RISR) Store 

func (r *RISR) Store(b ISR)

func (*RISR) StoreBits 

func (r *RISR) StoreBits(mask, b ISR)

type RMCCR 

type RMCCR struct{ mmio.UM32 }

func (RMCCR) Load 

func (rm RMCCR) Load() CCR

func (RMCCR) Store 

func (rm RMCCR) Store(b CCR)

type RMCMAR 

type RMCMAR struct{ mmio.UM32 }

func (RMCMAR) Load 

func (rm RMCMAR) Load() CMAR

func (RMCMAR) Store 

func (rm RMCMAR) Store(b CMAR)

type RMCNDTR 

type RMCNDTR struct{ mmio.UM32 }

func (RMCNDTR) Load 

func (rm RMCNDTR) Load() CNDTR

func (RMCNDTR) Store 

func (rm RMCNDTR) Store(b CNDTR)

type RMCPAR 

type RMCPAR struct{ mmio.UM32 }

func (RMCPAR) Load 

func (rm RMCPAR) Load() CPAR

func (RMCPAR) Store 

func (rm RMCPAR) Store(b CPAR)

type RMIFCR 

type RMIFCR struct{ mmio.UM32 }

func (RMIFCR) Load 

func (rm RMIFCR) Load() IFCR

func (RMIFCR) Store 

func (rm RMIFCR) Store(b IFCR)

type RMISR 

type RMISR struct{ mmio.UM32 }

func (RMISR) Load 

func (rm RMISR) Load() ISR

func (RMISR) Store 

func (rm RMISR) Store(b ISR)

Source Files

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