nvgpu

package
v1.0.1 Latest Latest
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 Go to latest Published: Apr 30, 2024 License: Apache-2.0, MIT Imports: 3 Imported by: 0

Documentation

Overview

Package nvgpu tracks the ABI of the Nvidia GPU Linux kernel driver: https://github.com/NVIDIA/open-gpu-kernel-modules

Index

Constants

View Source 
const (
	NV01_ROOT                        = 0x00000000
	NV01_ROOT_NON_PRIV               = 0x00000001
	NV01_MEMORY_SYSTEM               = 0x0000003e
	NV01_MEMORY_LOCAL_USER           = 0x00000040
	NV01_ROOT_CLIENT                 = 0x00000041
	NV01_MEMORY_SYSTEM_OS_DESCRIPTOR = 0x00000071
	NV01_EVENT_OS_EVENT              = 0x00000079
	NV01_DEVICE_0                    = 0x00000080
	NV_MEMORY_FABRIC                 = 0x000000f8
	NV20_SUBDEVICE_0                 = 0x00002080
	NV2081_BINAPI                    = 0x00002081
	NV50_P2P                         = 0x0000503b
	NV50_THIRD_PARTY_P2P             = 0x0000503c
	NV50_MEMORY_VIRTUAL              = 0x000050a0
	GT200_DEBUGGER                   = 0x000083de
	GF100_SUBDEVICE_MASTER           = 0x000090e6
	FERMI_CONTEXT_SHARE_A            = 0x00009067
	FERMI_VASPACE_A                  = 0x000090f1
	KEPLER_CHANNEL_GROUP_A           = 0x0000a06c
	TURING_USERMODE_A                = 0x0000c461
	TURING_CHANNEL_GPFIFO_A          = 0x0000c46f
	AMPERE_CHANNEL_GPFIFO_A          = 0x0000c56f
	TURING_DMA_COPY_A                = 0x0000c5b5
	TURING_COMPUTE_A                 = 0x0000c5c0
	HOPPER_USERMODE_A                = 0x0000c661
	AMPERE_DMA_COPY_A                = 0x0000c6b5
	AMPERE_COMPUTE_A                 = 0x0000c6c0
	AMPERE_DMA_COPY_B                = 0x0000c7b5
	AMPERE_COMPUTE_B                 = 0x0000c7c0
	HOPPER_CHANNEL_GPFIFO_A          = 0x0000c86f
	HOPPER_DMA_COPY_A                = 0x0000c8b5
	ADA_COMPUTE_A                    = 0x0000c9c0
	NV_CONFIDENTIAL_COMPUTE          = 0x0000cb33
	HOPPER_SEC2_WORK_LAUNCH_A        = 0x0000cba2
	HOPPER_COMPUTE_A                 = 0x0000cbc0
)

Class IDs, from src/nvidia/generated/g_allclasses.h.

View Source 
const (
	NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE        = 0xd01
	NV0000_CTRL_CMD_CLIENT_SET_INHERITED_SHARE_POLICY = 0xd04
)

From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000client.h:

View Source 
const (
	NV0000_CTRL_CMD_GPU_GET_ATTACHED_IDS  = 0x201
	NV0000_CTRL_CMD_GPU_GET_ID_INFO       = 0x202
	NV0000_CTRL_CMD_GPU_GET_ID_INFO_V2    = 0x205
	NV0000_CTRL_CMD_GPU_GET_PROBED_IDS    = 0x214
	NV0000_CTRL_CMD_GPU_ATTACH_IDS        = 0x215
	NV0000_CTRL_CMD_GPU_DETACH_IDS        = 0x216
	NV0000_CTRL_CMD_GPU_GET_PCI_INFO      = 0x21b
	NV0000_CTRL_CMD_GPU_QUERY_DRAIN_STATE = 0x279
	NV0000_CTRL_CMD_GPU_GET_MEMOP_ENABLE  = 0x27b
	NV0000_CTRL_CMD_GPU_ASYNC_ATTACH_ID   = 0x289
	NV0000_CTRL_CMD_GPU_WAIT_ATTACH_ID    = 0x290
)

From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000gpu.h:

View Source 
const (
	NV0000_CTRL_CMD_SYSTEM_GET_BUILD_VERSION   = 0x101
	NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS        = 0x127
	NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_V2     = 0x12b
	NV0000_CTRL_CMD_SYSTEM_GET_FABRIC_STATUS   = 0x136
	NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_MATRIX = 0x13a
	NV0000_CTRL_CMD_SYSTEM_GET_FEATURES        = 0x1f0
)

From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h:

View Source 
const (
	NV0080_CTRL_CMD_GPU_GET_CLASSLIST              = 0x800201
	NV0080_CTRL_CMD_GPU_GET_NUM_SUBDEVICES         = 0x800280
	NV0080_CTRL_CMD_GPU_QUERY_SW_STATE_PERSISTENCE = 0x800288
	NV0080_CTRL_CMD_GPU_GET_VIRTUALIZATION_MODE    = 0x800289
	NV0080_CTRL_CMD_GPU_GET_CLASSLIST_V2           = 0x800292
)

From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h:

View Source 
const (
	NV2080_CTRL_CMD_BUS_GET_PCI_INFO                   = 0x20801801
	NV2080_CTRL_CMD_BUS_GET_PCI_BAR_INFO               = 0x20801803
	NV2080_CTRL_CMD_BUS_GET_INFO_V2                    = 0x20801823
	NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS = 0x2080182a
	NV2080_CTRL_CMD_BUS_GET_C2C_INFO                   = 0x2080182b
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bus.h:

View Source 
const (
	NV2080_CTRL_CMD_FIFO_DISABLE_CHANNELS = 0x2080110b

	NV2080_CTRL_FIFO_DISABLE_CHANNELS_MAX_ENTRIES = 64
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fifo.h:

View Source 
const (
	NV2080_CTRL_CMD_GPU_GET_INFO_V2                      = 0x20800102
	NV2080_CTRL_CMD_GPU_GET_NAME_STRING                  = 0x20800110
	NV2080_CTRL_CMD_GPU_GET_SHORT_NAME_STRING            = 0x20800111
	NV2080_CTRL_CMD_GPU_GET_SIMULATION_INFO              = 0x20800119
	NV2080_CTRL_CMD_GPU_QUERY_ECC_STATUS                 = 0x2080012f
	NV2080_CTRL_CMD_GPU_QUERY_COMPUTE_MODE_RULES         = 0x20800131
	NV2080_CTRL_CMD_GPU_ACQUIRE_COMPUTE_MODE_RESERVATION = 0x20800145 // undocumented; paramSize == 0
	NV2080_CTRL_CMD_GPU_RELEASE_COMPUTE_MODE_RESERVATION = 0x20800146 // undocumented; paramSize == 0
	NV2080_CTRL_CMD_GPU_GET_GID_INFO                     = 0x2080014a
	NV2080_CTRL_CMD_GPU_GET_ENGINES_V2                   = 0x20800170
	NV2080_CTRL_CMD_GPU_GET_ACTIVE_PARTITION_IDS         = 0x2080018b
	NV2080_CTRL_CMD_GPU_GET_PIDS                         = 0x2080018d
	NV2080_CTRL_CMD_GPU_GET_PID_INFO                     = 0x2080018e
	NV2080_CTRL_CMD_GPU_GET_COMPUTE_POLICY_CONFIG        = 0x20800195
	NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO            = 0x208001a3
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h:

View Source 
const (
	NV2080_CTRL_CMD_GR_GET_INFO                   = 0x20801201
	NV2080_CTRL_CMD_GR_SET_CTXSW_PREEMPTION_MODE  = 0x20801210
	NV2080_CTRL_CMD_GR_GET_CTX_BUFFER_SIZE        = 0x20801218
	NV2080_CTRL_CMD_GR_GET_GLOBAL_SM_ORDER        = 0x2080121b
	NV2080_CTRL_CMD_GR_GET_CAPS_V2                = 0x20801227
	NV2080_CTRL_CMD_GR_GET_GPC_MASK               = 0x2080122a
	NV2080_CTRL_CMD_GR_GET_TPC_MASK               = 0x2080122b
	NV2080_CTRL_CMD_GR_GET_SM_ISSUE_RATE_MODIFIER = 0x20801230
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gr.h:

View Source 
const (
	NV2080_CTRL_CMD_MC_GET_ARCH_INFO      = 0x20801701
	NV2080_CTRL_CMD_MC_SERVICE_INTERRUPTS = 0x20801702
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080mc.h:

View Source 
const (
	NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS   = 0x20803001
	NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS = 0x20803002
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvlink.h:

View Source 
const (
	NV2080_CTRL_CMD_RC_GET_WATCHDOG_INFO         = 0x20802209
	NV2080_CTRL_CMD_RC_RELEASE_WATCHDOG_REQUESTS = 0x2080220c
	NV2080_CTRL_CMD_RC_SOFT_DISABLE_WATCHDOG     = 0x20802210
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080rc.h:

View Source 
const (
	NV503C_CTRL_CMD_REGISTER_VA_SPACE = 0x503c0102
	NV503C_CTRL_CMD_REGISTER_VIDMEM   = 0x503c0104
	NV503C_CTRL_CMD_UNREGISTER_VIDMEM = 0x503c0105
)

From src/common/sdk/nvidia/inc/ctrl/ctrl503c.h:

View Source 
const (
	NV83DE_CTRL_CMD_DEBUG_SET_EXCEPTION_MASK        = 0x83de0309
	NV83DE_CTRL_CMD_DEBUG_READ_ALL_SM_ERROR_STATES  = 0x83de030c
	NV83DE_CTRL_CMD_DEBUG_CLEAR_ALL_SM_ERROR_STATES = 0x83de0310
)

From src/common/sdk/nvidia/inc/ctrl/ctrl83de/ctrl83dedebug.h:

View Source 
const (
	NVC36F_CTRL_GET_CLASS_ENGINEID               = 0xc36f0101
	NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN = 0xc36f0108
)

From src/common/sdk/nvidia/inc/ctrl/ctrlc36f.h:

View Source 
const (
	NVA06C_CTRL_CMD_GPFIFO_SCHEDULE = 0xa06c0101
	NVA06C_CTRL_CMD_SET_TIMESLICE   = 0xa06c0103
	NVA06C_CTRL_CMD_PREEMPT         = 0xa06c0105
)

From src/common/sdk/nvidia/inc/ctrl/ctrla06c.h:

View Source 
const (
	NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES     = 0xcb330101
	NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE       = 0xcb330104
	NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS = 0xcb33010b
)

From src/common/sdk/nvidia/inc/ctrl/ctrlcb33.h:

View Source 
const (
	// From kernel-open/common/inc/nv-ioctl-numbers.h:
	NV_IOCTL_BASE             = 200
	NV_ESC_CARD_INFO          = NV_IOCTL_BASE + 0
	NV_ESC_REGISTER_FD        = NV_IOCTL_BASE + 1
	NV_ESC_ALLOC_OS_EVENT     = NV_IOCTL_BASE + 6
	NV_ESC_FREE_OS_EVENT      = NV_IOCTL_BASE + 7
	NV_ESC_CHECK_VERSION_STR  = NV_IOCTL_BASE + 10
	NV_ESC_ATTACH_GPUS_TO_FD  = NV_IOCTL_BASE + 12
	NV_ESC_SYS_PARAMS         = NV_IOCTL_BASE + 14
	NV_ESC_WAIT_OPEN_COMPLETE = NV_IOCTL_BASE + 18

	// From kernel-open/common/inc/nv-ioctl-numa.h:
	NV_ESC_NUMA_INFO = NV_IOCTL_BASE + 15

	// From src/nvidia/arch/nvalloc/unix/include/nv_escape.h:
	NV_ESC_RM_ALLOC_MEMORY               = 0x27
	NV_ESC_RM_FREE                       = 0x29
	NV_ESC_RM_CONTROL                    = 0x2a
	NV_ESC_RM_ALLOC                      = 0x2b
	NV_ESC_RM_DUP_OBJECT                 = 0x34
	NV_ESC_RM_SHARE                      = 0x35
	NV_ESC_RM_VID_HEAP_CONTROL           = 0x4a
	NV_ESC_RM_MAP_MEMORY                 = 0x4e
	NV_ESC_RM_UNMAP_MEMORY               = 0x4f
	NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO = 0x5e
)

Frontend ioctl numbers. Note that these are only the IOC_NR part of the ioctl command.

View Source 
const (
	NV_MAJOR_DEVICE_NUMBER          = 195 // from kernel-open/common/inc/nv.h
	NV_CONTROL_DEVICE_MINOR         = 255 // from kernel-open/common/inc/nv-linux.h
	NVIDIA_UVM_PRIMARY_MINOR_NUMBER = 0   // from kernel-open/nvidia-uvm/uvm_common.h
)

Device numbers.

View Source 
const (
	NV_MAX_DEVICES    = 32
	NV_MAX_SUBDEVICES = 8
)

From src/common/sdk/nvidia/inc/nvlimits.h:

View Source 
const (
	CC_CHAN_ALLOC_IV_SIZE_DWORD    = 3
	CC_CHAN_ALLOC_NONCE_SIZE_DWORD = 8
)

From src/common/sdk/nvidia/inc/alloc/alloc_channel.h.

View Source 
const (
	NV_OK                   = 0x00000000
	NV_ERR_INVALID_ADDRESS  = 0x0000001e
	NV_ERR_INVALID_ARGUMENT = 0x0000001f
	NV_ERR_INVALID_CLASS    = 0x00000022
	NV_ERR_INVALID_LIMIT    = 0x0000002e
	NV_ERR_NOT_SUPPORTED    = 0x00000056
)

Status codes, from src/common/sdk/nvidia/inc/nvstatuscodes.h.

View Source 
const (
	// From kernel-open/nvidia-uvm/uvm_linux_ioctl.h:
	UVM_INITIALIZE   = 0x30000001
	UVM_DEINITIALIZE = 0x30000002

	// From kernel-open/nvidia-uvm/uvm_ioctl.h:
	UVM_CREATE_RANGE_GROUP             = 23
	UVM_DESTROY_RANGE_GROUP            = 24
	UVM_REGISTER_GPU_VASPACE           = 25
	UVM_UNREGISTER_GPU_VASPACE         = 26
	UVM_REGISTER_CHANNEL               = 27
	UVM_UNREGISTER_CHANNEL             = 28
	UVM_MAP_EXTERNAL_ALLOCATION        = 33
	UVM_FREE                           = 34
	UVM_REGISTER_GPU                   = 37
	UVM_UNREGISTER_GPU                 = 38
	UVM_PAGEABLE_MEM_ACCESS            = 39
	UVM_SET_PREFERRED_LOCATION         = 42
	UVM_DISABLE_READ_DUPLICATION       = 45
	UVM_MAP_DYNAMIC_PARALLELISM_REGION = 65
	UVM_ALLOC_SEMAPHORE_POOL           = 68
	UVM_VALIDATE_VA_RANGE              = 72
	UVM_CREATE_EXTERNAL_RANGE          = 73
	UVM_MM_INITIALIZE                  = 75
)

UVM ioctl commands.

View Source 
const (
	UVM_MAX_GPUS    = NV_MAX_DEVICES
	UVM_MAX_GPUS_V2 = NV_MAX_DEVICES * NV_MAX_SUBDEVICES
)
View Source 
const (
	NV0000_CTRL_CMD_SYNC_GPU_BOOST_GROUP_INFO = 0xa04
)

From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000syncgpuboost.h:

View Source 
const (
	NV0080_CTRL_CMD_FB_GET_CAPS_V2 = 0x801307
)

From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fb.h:

View Source 
const (
	NV0080_CTRL_CMD_FIFO_GET_CHANNELLIST = 0x80170d
)

From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fifo.h:

View Source 
const (
	NV0080_CTRL_CMD_HOST_GET_CAPS_V2 = 0x801402
)

From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080host.h:

View Source 
const (
	NV0080_CTRL_CMD_PERF_CUDA_LIMIT_SET_CONTROL = 0x801909
)

From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080perf.h:

View Source 
const (
	NV2080_CTRL_CMD_CE_GET_ALL_CAPS = 0x20802a0a
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ce.h:

View Source 
const (
	NV2080_CTRL_CMD_FB_GET_INFO_V2 = 0x20801303
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h:

View Source 
const (
	NV2080_CTRL_CMD_FLCN_GET_CTX_BUFFER_SIZE = 0x20803125
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080flcn.h:

View Source 
const (
	NV2080_CTRL_CMD_GSP_GET_FEATURES = 0x20803601
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gsp.h:

View Source 
const (
	NV2080_CTRL_CMD_PERF_BOOST = 0x2080200a
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080perf.h:

View Source 
const (
	NV2080_CTRL_CMD_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO = 0x20800406
)

From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080tmr.h:

View Source 
const (
	NV906F_CTRL_CMD_RESET_CHANNEL = 0x906f0102
)

From src/common/sdk/nvidia/inc/ctrl/ctrl906f.h:

View Source 
const (
	NV90E6_CTRL_CMD_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK = 0x90e60102
)

From src/common/sdk/nvidia/inc/ctrl/ctrl90e6.h:

View Source 
const (
	NVA06F_CTRL_CMD_GPFIFO_SCHEDULE = 0xa06f0103
)

From src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06fgpfifo.h:

View Source 
const (
	NVC56F_CTRL_CMD_GET_KMB = 0xc56f010b
)

From src/common/sdk/nvidia/inc/ctrl/ctrlc56f.h:

View Source 
const (
	NVOS32_FUNCTION_ALLOC_SIZE = 2
)

Possible values for NVOS32Parameters.Function:

View Source 
const NV_IOCTL_MAGIC = uint32('F')

NV_IOCTL_MAGIC is the "canonical" IOC_TYPE for frontend ioctls. The driver ignores IOC_TYPE, allowing any value to be passed.

View Source 
const (
	// RMAPI_PARAM_COPY_MAX_PARAMS_SIZE is the size limit imposed while copying
	// "embedded pointers" in rmapi parameter structs.
	// See src/nvidia/src/kernel/rmapi/param_copy.c:rmapiParamsAcquire().
	RMAPI_PARAM_COPY_MAX_PARAMS_SIZE = 1 * 1024 * 1024
)

From src/nvidia/inc/kernel/rmapi/param_copy.h:

View Source 
const (
	RM_GSS_LEGACY_MASK = 0x00008000
)

From src/nvidia/interface/deprecated/rmapi_deprecated.h:

View Source 
const SDK_RS_ACCESS_MAX_LIMBS = 1
View Source 
const (
	UVM_INIT_FLAGS_MULTI_PROCESS_SHARING_MODE = 0x2
)

UVM_INITIALIZE_PARAMS flags, from kernel-open/nvidia-uvm/uvm_types.h.

Variables

View Source 
var (
	SizeofIoctlRegisterFD             = uint32((*IoctlRegisterFD)(nil).SizeBytes())
	SizeofIoctlAllocOSEvent           = uint32((*IoctlAllocOSEvent)(nil).SizeBytes())
	SizeofIoctlFreeOSEvent            = uint32((*IoctlFreeOSEvent)(nil).SizeBytes())
	SizeofRMAPIVersion                = uint32((*RMAPIVersion)(nil).SizeBytes())
	SizeofIoctlSysParams              = uint32((*IoctlSysParams)(nil).SizeBytes())
	SizeofIoctlWaitOpenComplete       = uint32((*IoctlWaitOpenComplete)(nil).SizeBytes())
	SizeofIoctlNVOS02ParametersWithFD = uint32((*IoctlNVOS02ParametersWithFD)(nil).SizeBytes())
	SizeofNVOS00Parameters            = uint32((*NVOS00Parameters)(nil).SizeBytes())
	SizeofNVOS21Parameters            = uint32((*NVOS21Parameters)(nil).SizeBytes())
	SizeofIoctlNVOS33ParametersWithFD = uint32((*IoctlNVOS33ParametersWithFD)(nil).SizeBytes())
	SizeofNVOS55Parameters            = uint32((*NVOS55Parameters)(nil).SizeBytes())
	SizeofNVOS57Parameters            = uint32((*NVOS57Parameters)(nil).SizeBytes())
	SizeofNVOS32Parameters            = uint32((*NVOS32Parameters)(nil).SizeBytes())
	SizeofNVOS34Parameters            = uint32((*NVOS34Parameters)(nil).SizeBytes())
	SizeofNVOS54Parameters            = uint32((*NVOS54Parameters)(nil).SizeBytes())
	SizeofNVOS56Parameters            = uint32((*NVOS56Parameters)(nil).SizeBytes())
	SizeofNVOS64Parameters            = uint32((*NVOS64Parameters)(nil).SizeBytes())
)

Frontend ioctl parameter struct sizes.

Functions

This section is empty.

Types

type ClassID 

type ClassID uint32

ClassID is a client class ID, in the sense of src/nvidia/src/kernel/rmapi/resource_desc.h:RS_RESOURCE_DESC::externalClassID.

+marshal

func (ClassID) String 

func (id ClassID) String() string

String implements fmt.Stringer.String.

type Handle 

type Handle struct {
	Val uint32
}

Handle is NvHandle, from src/common/sdk/nvidia/inc/nvtypes.h.

+marshal

func (Handle) String 

func (h Handle) String() string

String implements fmt.Stringer.String.

type HasRMCtrlFD 

type HasRMCtrlFD interface {
	GetRMCtrlFD() int32
	SetRMCtrlFD(int32)
}

HasRMCtrlFD is a type constraint for UVM parameter structs containing a RMCtrlFD field. This is necessary because, as of this writing (Go 1.20), there is no way to enable field access using a Go type constraint.

type IoctlAllocOSEvent 

type IoctlAllocOSEvent struct {
	HClient Handle
	HDevice Handle
	FD      uint32
	Status  uint32
}

IoctlAllocOSEvent is nv_ioctl_alloc_os_event_t, the parameter type for NV_ESC_ALLOC_OS_EVENT.

+marshal

type IoctlFreeOSEvent 

type IoctlFreeOSEvent struct {
	HClient Handle
	HDevice Handle
	FD      uint32
	Status  uint32
}

IoctlFreeOSEvent is nv_ioctl_free_os_event_t, the parameter type for NV_ESC_FREE_OS_EVENT.

+marshal

type IoctlNVOS02ParametersWithFD 

type IoctlNVOS02ParametersWithFD struct {
	Params NVOS02Parameters
	FD     int32
	Pad0   [4]byte
}

IoctlNVOS02ParametersWithFD is nv_ioctl_nvos2_parameters_with_fd, the parameter type for NV_ESC_RM_ALLOC_MEMORY.

+marshal

type IoctlNVOS33ParametersWithFD 

type IoctlNVOS33ParametersWithFD struct {
	Params NVOS33Parameters
	FD     int32
	Pad0   [4]byte
}

IoctlNVOS33ParametersWithFD is nv_ioctl_nvos33_parameters_with_fd, the parameter type for NV_ESC_RM_MAP_MEMORY, from src/nvidia/arch/nvalloc/unix/include/nv-unix-nvos-params-wrappers.h.

+marshal

type IoctlRegisterFD 

type IoctlRegisterFD struct {
	CtlFD int32
}

IoctlRegisterFD is nv_ioctl_register_fd_t, the parameter type for NV_ESC_REGISTER_FD.

+marshal

type IoctlSysParams 

type IoctlSysParams struct {
	MemblockSize uint64
}

IoctlSysParams is nv_ioctl_sys_params_t, the parameter type for NV_ESC_SYS_PARAMS.

+marshal

type IoctlWaitOpenComplete 

type IoctlWaitOpenComplete struct {
	Rc            int32
	AdapterStatus uint32
}

IoctlWaitOpenComplete is nv_ioctl_wait_open_complete_t, the parameter type for NV_ESC_WAIT_OPEN_COMPLETE.

+marshal

type NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS 

type NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS struct {
	SizeOfStrings            uint32
	Pad                      [4]byte
	PDriverVersionBuffer     P64
	PVersionBuffer           P64
	PTitleBuffer             P64
	ChangelistNumber         uint32
	OfficialChangelistNumber uint32
}

+marshal

type NV0005_ALLOC_PARAMETERS 

type NV0005_ALLOC_PARAMETERS struct {
	HParentClient Handle
	HSrcResource  Handle
	HClass        uint32
	NotifyIndex   uint32
	Data          P64 // actually FD for NV01_EVENT_OS_EVENT, see src/nvidia/src/kernel/rmapi/event.c:eventConstruct_IMPL() => src/nvidia/arch/nvalloc/unix/src/os.c:osUserHandleToKernelPtr()
}

NV0005_ALLOC_PARAMETERS is the alloc params type for NV01_EVENT_OS_EVENT, from src/common/sdk/nvidia/inc/class/cl0005.h.

+marshal

type NV0080_ALLOC_PARAMETERS 

type NV0080_ALLOC_PARAMETERS struct {
	DeviceID        uint32
	HClientShare    Handle
	HTargetClient   Handle
	HTargetDevice   Handle
	Flags           uint32
	Pad0            [4]byte
	VASpaceSize     uint64
	VAStartInternal uint64
	VALimitInternal uint64
	VAMode          uint32
	Pad1            [4]byte
}

NV0080_ALLOC_PARAMETERS is the alloc params type for NV01_DEVICE_0, from src/common/sdk/nvidia/inc/class/cl0080.h.

+marshal

type NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS 

type NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS struct {
	NumChannels        uint32
	Pad                [4]byte
	PChannelHandleList P64
	PChannelList       P64
}

+marshal

type NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS 

type NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS struct {
	NumClasses uint32
	Pad        [4]byte
	ClassList  P64
}

+marshal

type NV0080_CTRL_GR_ROUTE_INFO 

type NV0080_CTRL_GR_ROUTE_INFO struct {
	Flags uint32
	Pad   [4]byte
	Route uint64
}

+marshal

type NV00F8_ALLOCATION_PARAMETERS 

type NV00F8_ALLOCATION_PARAMETERS struct {
	Alignment  uint64
	AllocSize  uint64
	PageSize   uint64
	AllocFlags uint32

	Map nv00f8Map
	// contains filtered or unexported fields
}

NV00F8_ALLOCATION_PARAMETERS is the alloc param type for NV_MEMORY_FABRIC, from src/common/sdk/nvidia/inc/class/cl00f8.h.

+marshal

type NV2080_ALLOC_PARAMETERS 

type NV2080_ALLOC_PARAMETERS struct {
	SubDeviceID uint32
}

NV2080_ALLOC_PARAMETERS is the alloc params type for NV20_SUBDEVICE_0, from src/common/sdk/nvidia/inc/class/cl2080.h.

+marshal

type NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS 

type NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS struct {
	BDisable               uint8
	Pad1                   [3]byte
	NumChannels            uint32
	BOnlyDisableScheduling uint8
	BRewindGpPut           uint8
	Pad2                   [6]byte
	PRunlistPreemptEvent   P64
	HClientList            [NV2080_CTRL_FIFO_DISABLE_CHANNELS_MAX_ENTRIES]Handle
	HChannelList           [NV2080_CTRL_FIFO_DISABLE_CHANNELS_MAX_ENTRIES]Handle
}

+marshal

type NV2080_CTRL_GR_GET_INFO_PARAMS 

type NV2080_CTRL_GR_GET_INFO_PARAMS struct {
	GRInfoListSize uint32 // in elements
	Pad            [4]byte
	GRInfoList     P64
	GRRouteInfo    NV0080_CTRL_GR_ROUTE_INFO
}

+marshal

type NV2081_ALLOC_PARAMETERS 

type NV2081_ALLOC_PARAMETERS struct {
	Reserved uint32
}

NV2081_ALLOC_PARAMETERS is the alloc params type for NV2081_BINAPI, from src/common/sdk/nvidia/inc/class/cl2081.h.

+marshal

type NV503B_ALLOC_PARAMETERS 

type NV503B_ALLOC_PARAMETERS struct {
	HSubDevice                 Handle
	HPeerSubDevice             Handle
	SubDevicePeerIDMask        uint32
	PeerSubDevicePeerIDMask    uint32
	MailboxBar1Addr            uint64
	MailboxTotalSize           uint32
	Flags                      uint32
	SubDeviceEgmPeerIDMask     uint32
	PeerSubDeviceEgmPeerIDMask uint32
	L2pBar1P2PDmaInfo          NV503B_BAR1_P2P_DMA_INFO
	P2lBar1P2PDmaInfo          NV503B_BAR1_P2P_DMA_INFO
}

NV503B_ALLOC_PARAMETERS is the alloc params type for NV50_P2P, from src/common/sdk/nvidia/inc/class/cl503b.h.

+marshal

type NV503B_BAR1_P2P_DMA_INFO 

type NV503B_BAR1_P2P_DMA_INFO struct {
	DmaAddress uint64
	DmaSize    uint64
}

NV503B_BAR1_P2P_DMA_INFO from src/common/sdk/nvidia/inc/class/cl503b.h.

+marshal

type NV503C_ALLOC_PARAMETERS 

type NV503C_ALLOC_PARAMETERS struct {
	Flags uint32
}

NV503C_ALLOC_PARAMETERS is the alloc params type for NV50_THIRD_PARTY_P2P, from src/common/sdk/nvidia/inc/class/cl503c.h.

+marshal

type NV503C_CTRL_REGISTER_VA_SPACE_PARAMS 

type NV503C_CTRL_REGISTER_VA_SPACE_PARAMS struct {
	HVASpace     Handle
	Pad          [4]byte
	VASpaceToken uint64
}

+marshal

type NV83DE_ALLOC_PARAMETERS 

type NV83DE_ALLOC_PARAMETERS struct {
	HDebuggerClient_Obsolete Handle
	HAppClient               Handle
	HClass3DObject           Handle
}

NV83DE_ALLOC_PARAMETERS is the alloc params type for GT200_DEBUGGER, from src/common/sdk/nvidia/inc/class/cl83de.h.

+marshal

type NVB0B5_ALLOCATION_PARAMETERS 

type NVB0B5_ALLOCATION_PARAMETERS struct {
	Version    uint32
	EngineType uint32
}

NVB0B5_ALLOCATION_PARAMETERS is the alloc param type for TURING_DMA_COPY_A, AMPERE_DMA_COPY_A, and AMPERE_DMA_COPY_B from src/common/sdk/nvidia/inc/class/clb0b5sw.h.

+marshal

type NVOS00Parameters 

type NVOS00Parameters struct {
	HRoot         Handle
	HObjectParent Handle
	HObjectOld    Handle
	Status        uint32
}

NVOS00Parameters is NVOS00_PARAMETERS, the parameter type for NV_ESC_RM_FREE.

+marshal

type NVOS02Parameters 

type NVOS02Parameters struct {
	HRoot         Handle
	HObjectParent Handle
	HObjectNew    Handle
	HClass        ClassID
	Flags         uint32
	Pad0          [4]byte
	PMemory       P64 // address of application mapping, without indirection
	Limit         uint64
	Status        uint32
	Pad1          [4]byte
}

+marshal

type NVOS21Parameters 

type NVOS21Parameters struct {
	HRoot         Handle
	HObjectParent Handle
	HObjectNew    Handle
	HClass        ClassID
	PAllocParms   P64
	ParamsSize    uint32
	Status        uint32
}

NVOS21Parameters is NVOS21_PARAMETERS, one possible parameter type for NV_ESC_RM_ALLOC.

+marshal

func (*NVOS21Parameters) FromOS64 

func (n *NVOS21Parameters) FromOS64(other NVOS64Parameters)

FromOS64 implements RmAllocParamType.FromOS64.

func (*NVOS21Parameters) GetPAllocParms 

func (n *NVOS21Parameters) GetPAllocParms() P64

GetPAllocParms implements RmAllocParamType.GetPAllocParms.

func (*NVOS21Parameters) GetPRightsRequested 

func (n *NVOS21Parameters) GetPRightsRequested() P64

GetPRightsRequested implements RmAllocParamType.GetPRightsRequested.

func (*NVOS21Parameters) GetPointer 

func (n *NVOS21Parameters) GetPointer() uintptr

GetPointer implements RmAllocParamType.GetPointer.

func (*NVOS21Parameters) SetPAllocParms 

func (n *NVOS21Parameters) SetPAllocParms(p P64)

SetPAllocParms implements RmAllocParamType.SetPAllocParms.

func (*NVOS21Parameters) SetPRightsRequested 

func (n *NVOS21Parameters) SetPRightsRequested(p P64)

SetPRightsRequested implements RmAllocParamType.SetPRightsRequested.

func (*NVOS21Parameters) ToOS64 

func (n *NVOS21Parameters) ToOS64() NVOS64Parameters

ToOS64 implements RmAllocParamType.ToOS64.

type NVOS32AllocSize 

type NVOS32AllocSize struct {
	Owner           uint32
	HMemory         Handle
	Type            uint32
	Flags           uint32
	Attr            uint32
	Format          uint32
	ComprCovg       uint32
	ZcullCovg       uint32
	PartitionStride uint32
	Width           uint32
	Height          uint32
	Pad0            [4]byte
	Size            uint64
	Alignment       uint64
	Offset          uint64
	Limit           uint64
	Address         P64
	RangeBegin      uint64
	RangeEnd        uint64
	Attr2           uint32
	CtagOffset      uint32
}

NVOS32AllocSize is the type of NVOS32Parameters.Data for NVOS32_FUNCTION_ALLOC_SIZE.

type NVOS32Parameters 

type NVOS32Parameters struct {
	HRoot         Handle
	HObjectParent Handle
	Function      uint32
	HVASpace      Handle
	IVCHeapNumber int16
	Pad           [2]byte
	Status        uint32
	Total         uint64
	Free          uint64
	Data          [144]byte // union
}

NVOS32Parameters is NVOS32_PARAMETERS, the parameter type for NV_ESC_RM_VID_HEAP_CONTROL.

+marshal

type NVOS33Parameters 

type NVOS33Parameters struct {
	HClient        Handle
	HDevice        Handle
	HMemory        Handle
	Pad0           [4]byte
	Offset         uint64
	Length         uint64
	PLinearAddress P64 // address of application mapping, without indirection
	Status         uint32
	Flags          uint32
}

+marshal

type NVOS34Parameters 

type NVOS34Parameters struct {
	HClient        Handle
	HDevice        Handle
	HMemory        Handle
	Pad0           [4]byte
	PLinearAddress P64 // address of application mapping, without indirection
	Status         uint32
	Flags          uint32
}

NVOS34Parameters is NVOS34_PARAMETERS, the parameter type for NV_ESC_RM_UNMAP_MEMORY.

+marshal

type NVOS54Parameters 

type NVOS54Parameters struct {
	HClient    Handle
	HObject    Handle
	Cmd        uint32
	Flags      uint32
	Params     P64
	ParamsSize uint32
	Status     uint32
}

NVOS54Parameters is NVOS54_PARAMETERS, the parameter type for NV_ESC_RM_CONTROL.

+marshal

type NVOS55Parameters 

type NVOS55Parameters struct {
	HClient    Handle
	HParent    Handle
	HObject    Handle
	HClientSrc Handle
	HObjectSrc Handle
	Flags      uint32
	Status     uint32
}

NVOS55Parameters is NVOS55_PARAMETERS, the parameter type for NV_ESC_RM_DUP_OBJECT.

+marshal

type NVOS56Parameters 

type NVOS56Parameters struct {
	HClient        Handle
	HDevice        Handle
	HMemory        Handle
	Pad0           [4]byte
	POldCPUAddress P64
	PNewCPUAddress P64
	Status         uint32
	Pad1           [4]byte
}

NVOS56Parameters is NVOS56_PARAMETERS, the parameter type for NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO.

+marshal

type NVOS57Parameters 

type NVOS57Parameters struct {
	HClient     Handle
	HObject     Handle
	SharePolicy RS_SHARE_POLICY
	Status      uint32
}

NVOS57Parameters is NVOS57_PARAMETERS, the parameter type for NV_ESC_RM_SHARE.

+marshal

type NVOS64Parameters 

type NVOS64Parameters struct {
	HRoot            Handle
	HObjectParent    Handle
	HObjectNew       Handle
	HClass           ClassID
	PAllocParms      P64
	PRightsRequested P64
	ParamsSize       uint32
	Flags            uint32
	Status           uint32
	// contains filtered or unexported fields
}

NVOS64Parameters is NVOS64_PARAMETERS, one possible parameter type for NV_ESC_RM_ALLOC.

+marshal

func (*NVOS64Parameters) FromOS64 

func (n *NVOS64Parameters) FromOS64(other NVOS64Parameters)

FromOS64 implements RmAllocParamType.FromOS64.

func (*NVOS64Parameters) GetPAllocParms 

func (n *NVOS64Parameters) GetPAllocParms() P64

GetPAllocParms implements RmAllocParamType.GetPAllocParms.

func (*NVOS64Parameters) GetPRightsRequested 

func (n *NVOS64Parameters) GetPRightsRequested() P64

GetPRightsRequested implements RmAllocParamType.GetPRightsRequested.

func (*NVOS64Parameters) GetPointer 

func (n *NVOS64Parameters) GetPointer() uintptr

GetPointer implements RmAllocParamType.GetPointer.

func (*NVOS64Parameters) SetPAllocParms 

func (n *NVOS64Parameters) SetPAllocParms(p P64)

SetPAllocParms implements RmAllocParamType.SetPAllocParms.

func (*NVOS64Parameters) SetPRightsRequested 

func (n *NVOS64Parameters) SetPRightsRequested(p P64)

SetPRightsRequested implements RmAllocParamType.SetPRightsRequested.

func (*NVOS64Parameters) ToOS64 

func (n *NVOS64Parameters) ToOS64() NVOS64Parameters

ToOS64 implements RmAllocParamType.ToOS64.

type NVXXXX_CTRL_XXX_INFO 

type NVXXXX_CTRL_XXX_INFO struct {
	Index uint32
	Data  uint32
}

+marshal

type NV_CHANNEL_ALLOC_PARAMS 

type NV_CHANNEL_ALLOC_PARAMS struct {
	HObjectError        Handle
	HObjectBuffer       Handle
	GPFIFOOffset        uint64
	GPFIFOEntries       uint32
	Flags               uint32
	HContextShare       Handle
	HVASpace            Handle
	HUserdMemory        [NV_MAX_SUBDEVICES]Handle
	UserdOffset         [NV_MAX_SUBDEVICES]uint64
	EngineType          uint32
	CID                 uint32
	SubDeviceID         uint32
	HObjectECCError     Handle
	InstanceMem         NV_MEMORY_DESC_PARAMS
	UserdMem            NV_MEMORY_DESC_PARAMS
	RamfcMem            NV_MEMORY_DESC_PARAMS
	MthdbufMem          NV_MEMORY_DESC_PARAMS
	HPhysChannelGroup   Handle
	InternalFlags       uint32
	ErrorNotifierMem    NV_MEMORY_DESC_PARAMS
	ECCErrorNotifierMem NV_MEMORY_DESC_PARAMS
	ProcessID           uint32
	SubProcessID        uint32
	EncryptIv           [CC_CHAN_ALLOC_IV_SIZE_DWORD]uint32
	DecryptIv           [CC_CHAN_ALLOC_IV_SIZE_DWORD]uint32
	HmacNonce           [CC_CHAN_ALLOC_NONCE_SIZE_DWORD]uint32
}

NV_CHANNEL_ALLOC_PARAMS is the alloc params type for TURING_CHANNEL_GPFIFO_A and AMPERE_CHANNEL_GPFIFO_A, from src/common/sdk/nvidia/inc/alloc/alloc_channel.h.

+marshal

type NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS 

type NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS struct {
	HObjectError                Handle
	HObjectECCError             Handle
	HVASpace                    Handle
	EngineType                  uint32
	BIsCallingContextVgpuPlugin uint8
	Pad0                        [3]byte
}

NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS is the alloc params type for KEPLER_CHANNEL_GROUP_A, from src/common/sdk/nvidia/inc/nvos.h.

+marshal

type NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS 

type NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS struct {
	Handle Handle
	// contains filtered or unexported fields
}

NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS is the alloc param type for NV_CONFIDENTIAL_COMPUTE, from src/common/sdk/nvidia/inc/class/clcb33.h.

+marshal

type NV_CTXSHARE_ALLOCATION_PARAMETERS 

type NV_CTXSHARE_ALLOCATION_PARAMETERS struct {
	HVASpace Handle
	Flags    uint32
	SubctxID uint32
}

NV_CTXSHARE_ALLOCATION_PARAMETERS is the alloc params type for FERMI_CONTEXT_SHARE_A, from src/common/sdk/nvidia/inc/nvos.h.

+marshal

type NV_GR_ALLOCATION_PARAMETERS 

type NV_GR_ALLOCATION_PARAMETERS struct {
	Version uint32
	Flags   uint32
	Size    uint32
	Caps    uint32
}

NV_GR_ALLOCATION_PARAMETERS is the alloc param type for TURING_COMPUTE_A, AMPERE_COMPUTE_A, and ADA_COMPUTE_A, from src/common/sdk/nvidia/inc/nvos.h.

+marshal

type NV_HOPPER_USERMODE_A_PARAMS 

type NV_HOPPER_USERMODE_A_PARAMS struct {
	Bar1Mapping uint8
	Priv        uint8
}

NV_HOPPER_USERMODE_A_PARAMS is the alloc param type for HOPPER_USERMODE_A, from src/common/sdk/nvidia/inc/nvos.h.

+marshal

type NV_MEMORY_ALLOCATION_PARAMS 

type NV_MEMORY_ALLOCATION_PARAMS struct {
	Owner     uint32
	Type      uint32
	Flags     uint32
	Width     uint32
	Height    uint32
	Pitch     int32
	Attr      uint32
	Attr2     uint32
	Format    uint32
	ComprCovg uint32
	ZcullCovg uint32

	RangeLo       uint64
	RangeHi       uint64
	Size          uint64
	Alignment     uint64
	Offset        uint64
	Limit         uint64
	Address       P64
	CtagOffset    uint32
	HVASpace      Handle
	InternalFlags uint32
	Tag           uint32
	// contains filtered or unexported fields
}

NV_MEMORY_ALLOCATION_PARAMS is the alloc params type for various NV*_MEMORY* allocation classes, from src/common/sdk/nvidia/inc/nvos.h.

+marshal

type NV_MEMORY_ALLOCATION_PARAMS_V545 

type NV_MEMORY_ALLOCATION_PARAMS_V545 struct {
	NV_MEMORY_ALLOCATION_PARAMS
	NumaNode int32
	// contains filtered or unexported fields
}

NV_MEMORY_ALLOCATION_PARAMS_V545 is the updated version of NV_MEMORY_ALLOCATION_PARAMS since 545.23.06.

+marshal

type NV_MEMORY_DESC_PARAMS 

type NV_MEMORY_DESC_PARAMS struct {
	Base         uint64
	Size         uint64
	AddressSpace uint32
	CacheAttrib  uint32
}

NV_MEMORY_DESC_PARAMS is from src/common/sdk/nvidia/inc/alloc/alloc_channel.h.

+marshal

type NV_VASPACE_ALLOCATION_PARAMETERS 

type NV_VASPACE_ALLOCATION_PARAMETERS struct {
	Index           uint32
	Flags           uint32
	VASize          uint64
	VAStartInternal uint64
	VALimitInternal uint64
	BigPageSize     uint32
	Pad0            [4]byte
	VABase          uint64
}

NV_VASPACE_ALLOCATION_PARAMETERS is the alloc params type for FERMI_VASPACE_A, from src/common/sdk/nvidia/inc/nvos.h.

+marshal

type NvUUID 

type NvUUID [16]uint8

NvUUID is defined in src/common/inc/nvCpuUuid.h.

+marshal

type P64 

type P64 uint64

P64 is NvP64, from src/common/sdk/nvidia/inc/nvtypes.h.

+marshal

type RMAPIVersion 

type RMAPIVersion struct {
	Cmd           uint32
	Reply         uint32
	VersionString [64]byte
}

RMAPIVersion is nv_rm_api_version_t, the parameter type for NV_ESC_CHECK_VERSION_STR.

+marshal

type RS_ACCESS_MASK 

type RS_ACCESS_MASK struct {
	Limbs [SDK_RS_ACCESS_MAX_LIMBS]uint32 // RsAccessLimb
}

RS_ACCESS_MASK is RS_ACCESS_MASK, from src/common/sdk/nvidia/inc/rs_access.h.

+marshal

type RS_SHARE_POLICY 

type RS_SHARE_POLICY struct {
	Target     uint32
	AccessMask RS_ACCESS_MASK
	Type       uint16
	Action     uint8
	Pad        [1]byte
}

RS_SHARE_POLICY is RS_SHARE_POLICY, from src/common/sdk/nvidia/inc/rs_access.h.

+marshal

type RmAllocParamType 

type RmAllocParamType interface {
	GetPAllocParms() P64
	GetPRightsRequested() P64
	SetPAllocParms(p P64)
	SetPRightsRequested(p P64)
	FromOS64(other NVOS64Parameters)
	ToOS64() NVOS64Parameters
	GetPointer() uintptr
	marshal.Marshallable
}

RmAllocParamType should be implemented by all possible parameter types for NV_ESC_RM_ALLOC.

func GetRmAllocParamObj 

func GetRmAllocParamObj(isNVOS64 bool) RmAllocParamType

GetRmAllocParamObj returns the appropriate implementation of RmAllocParamType based on passed parameters.

type UVM_ALLOC_SEMAPHORE_POOL_PARAMS 

type UVM_ALLOC_SEMAPHORE_POOL_PARAMS struct {
	Base               uint64
	Length             uint64
	PerGPUAttributes   [UVM_MAX_GPUS]UvmGpuMappingAttributes
	GPUAttributesCount uint64
	RMStatus           uint32
	Pad0               [4]byte
}

+marshal

type UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550 

type UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550 struct {
	Base               uint64
	Length             uint64
	PerGPUAttributes   [UVM_MAX_GPUS_V2]UvmGpuMappingAttributes
	GPUAttributesCount uint64
	RMStatus           uint32
	Pad0               [4]byte
}

+marshal

type UVM_CREATE_EXTERNAL_RANGE_PARAMS 

type UVM_CREATE_EXTERNAL_RANGE_PARAMS struct {
	Base     uint64
	Length   uint64
	RMStatus uint32
	Pad0     [4]byte
}

+marshal

type UVM_CREATE_RANGE_GROUP_PARAMS 

type UVM_CREATE_RANGE_GROUP_PARAMS struct {
	RangeGroupID uint64
	RMStatus     uint32
	Pad0         [4]byte
}

+marshal

type UVM_DESTROY_RANGE_GROUP_PARAMS 

type UVM_DESTROY_RANGE_GROUP_PARAMS struct {
	RangeGroupID uint64
	RMStatus     uint32
	Pad0         [4]byte
}

+marshal

type UVM_DISABLE_READ_DUPLICATION_PARAMS 

type UVM_DISABLE_READ_DUPLICATION_PARAMS struct {
	RequestedBase uint64
	Length        uint64
	RMStatus      uint32
	Pad0          [4]byte
}

+marshal

type UVM_FREE_PARAMS 

type UVM_FREE_PARAMS struct {
	Base     uint64
	Length   uint64
	RMStatus uint32
	Pad0     [4]byte
}

+marshal

type UVM_INITIALIZE_PARAMS 

type UVM_INITIALIZE_PARAMS struct {
	Flags    uint64
	RMStatus uint32
	Pad0     [4]byte
}

+marshal

type UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS 

type UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS struct {
	Base     uint64
	Length   uint64
	GPUUUID  NvUUID
	RMStatus uint32
	Pad0     [4]byte
}

+marshal

type UVM_MAP_EXTERNAL_ALLOCATION_PARAMS 

type UVM_MAP_EXTERNAL_ALLOCATION_PARAMS struct {
	Base               uint64
	Length             uint64
	Offset             uint64
	PerGPUAttributes   [UVM_MAX_GPUS]UvmGpuMappingAttributes
	GPUAttributesCount uint64
	RMCtrlFD           int32
	HClient            Handle
	HMemory            Handle
	RMStatus           uint32
}

+marshal

func (*UVM_MAP_EXTERNAL_ALLOCATION_PARAMS) GetRMCtrlFD 

func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS) GetRMCtrlFD() int32

func (*UVM_MAP_EXTERNAL_ALLOCATION_PARAMS) SetRMCtrlFD 

func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS) SetRMCtrlFD(fd int32)

type UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550 

type UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550 struct {
	Base               uint64
	Length             uint64
	Offset             uint64
	PerGPUAttributes   [UVM_MAX_GPUS_V2]UvmGpuMappingAttributes
	GPUAttributesCount uint64
	RMCtrlFD           int32
	HClient            Handle
	HMemory            Handle
	RMStatus           uint32
}

+marshal

func (*UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550) GetRMCtrlFD 

func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550) GetRMCtrlFD() int32

func (*UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550) SetRMCtrlFD 

func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550) SetRMCtrlFD(fd int32)

type UVM_MM_INITIALIZE_PARAMS 

type UVM_MM_INITIALIZE_PARAMS struct {
	UvmFD  int32
	Status uint32
}

+marshal

type UVM_PAGEABLE_MEM_ACCESS_PARAMS 

type UVM_PAGEABLE_MEM_ACCESS_PARAMS struct {
	PageableMemAccess uint8
	Pad               [3]byte
	RMStatus          uint32
}

+marshal

type UVM_REGISTER_CHANNEL_PARAMS 

type UVM_REGISTER_CHANNEL_PARAMS struct {
	GPUUUID  NvUUID
	RMCtrlFD int32
	HClient  Handle
	HChannel Handle
	Pad      [4]byte
	Base     uint64
	Length   uint64
	RMStatus uint32
	Pad0     [4]byte
}

+marshal

func (*UVM_REGISTER_CHANNEL_PARAMS) GetRMCtrlFD 

func (p *UVM_REGISTER_CHANNEL_PARAMS) GetRMCtrlFD() int32

func (*UVM_REGISTER_CHANNEL_PARAMS) SetRMCtrlFD 

func (p *UVM_REGISTER_CHANNEL_PARAMS) SetRMCtrlFD(fd int32)

type UVM_REGISTER_GPU_PARAMS 

type UVM_REGISTER_GPU_PARAMS struct {
	GPUUUID     NvUUID
	NumaEnabled uint8
	Pad         [3]byte
	NumaNodeID  int32
	RMCtrlFD    int32
	HClient     Handle
	HSMCPartRef Handle
	RMStatus    uint32
}

+marshal

func (*UVM_REGISTER_GPU_PARAMS) GetRMCtrlFD 

func (p *UVM_REGISTER_GPU_PARAMS) GetRMCtrlFD() int32

func (*UVM_REGISTER_GPU_PARAMS) SetRMCtrlFD 

func (p *UVM_REGISTER_GPU_PARAMS) SetRMCtrlFD(fd int32)

type UVM_REGISTER_GPU_VASPACE_PARAMS 

type UVM_REGISTER_GPU_VASPACE_PARAMS struct {
	GPUUUID  NvUUID
	RMCtrlFD int32
	HClient  Handle
	HVASpace Handle
	RMStatus uint32
}

+marshal

func (*UVM_REGISTER_GPU_VASPACE_PARAMS) GetRMCtrlFD 

func (p *UVM_REGISTER_GPU_VASPACE_PARAMS) GetRMCtrlFD() int32

func (*UVM_REGISTER_GPU_VASPACE_PARAMS) SetRMCtrlFD 

func (p *UVM_REGISTER_GPU_VASPACE_PARAMS) SetRMCtrlFD(fd int32)

type UVM_SET_PREFERRED_LOCATION_PARAMS 

type UVM_SET_PREFERRED_LOCATION_PARAMS struct {
	RequestedBase     uint64
	Length            uint64
	PreferredLocation NvUUID
	RMStatus          uint32
	Pad0              [4]byte
}

+marshal

type UVM_SET_PREFERRED_LOCATION_PARAMS_V550 

type UVM_SET_PREFERRED_LOCATION_PARAMS_V550 struct {
	RequestedBase        uint64
	Length               uint64
	PreferredLocation    NvUUID
	PreferredCPUNumaNode int32
	RMStatus             uint32
}

+marshal

type UVM_UNREGISTER_CHANNEL_PARAMS 

type UVM_UNREGISTER_CHANNEL_PARAMS struct {
	GPUUUID  NvUUID
	HClient  Handle
	HChannel Handle
	RMStatus uint32
}

+marshal

type UVM_UNREGISTER_GPU_PARAMS 

type UVM_UNREGISTER_GPU_PARAMS struct {
	GPUUUID  NvUUID
	RMStatus uint32
}

+marshal

type UVM_UNREGISTER_GPU_VASPACE_PARAMS 

type UVM_UNREGISTER_GPU_VASPACE_PARAMS struct {
	GPUUUID  NvUUID
	RMStatus uint32
}

+marshal

type UVM_VALIDATE_VA_RANGE_PARAMS 

type UVM_VALIDATE_VA_RANGE_PARAMS struct {
	Base     uint64
	Length   uint64
	RMStatus uint32
	Pad0     [4]byte
}

+marshal

type UvmGpuMappingAttributes 

type UvmGpuMappingAttributes struct {
	GPUUUID            NvUUID
	GPUMappingType     uint32
	GPUCachingType     uint32
	GPUFormatType      uint32
	GPUElementBits     uint32
	GPUCompressionType uint32
}

+marshal

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