fe1

package
v1.2.0-rc.1.0...-65ced95 Latest Latest
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Published: May 20, 2019 License: GPL-2.0, GPL-2.0-or-later Imports: 2 Imported by: 1

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Constants

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const (
	SingleTaggedInjectNextCpu = iota
	SingleTaggedInjectNextFirstIxge
)

Inject ports for fe1: allow both cpu (pcie) & 10g ixge ports for injects.

Variables

This section is empty.

Functions

This section is empty.

Types

type Platform

type Platform struct {
	Version             uint
	BaseEthernetAddress ethernet.Address
	NEthernetAddress    uint
	Init                func()
	QsfpModules         map[SwitchPort]*sfp.QsfpModule
	PlatformConfig
}

Platform configuration for FE1 based systems.

type PlatformConfig

type PlatformConfig struct {
	KernelIxgbe   bool
	KernelIxgbevf bool
	// Reset switch via gpio hard reset pin.
	DisableGpioSwitchReset bool
	// Reset switch via cpu soft reset.
	EnableCpuSwitchReset bool
	// Enable using PCI MSI interrupt for fe1 switch.
	EnableMsiInterrupt     bool
	UseCpuForPuntAndInject bool

	PortConfig PortProvisionConfig
}

type PortProvision

type PortProvision struct {
	Name         string
	Lanes        uint
	Speed        string
	Count        uint
	Portindex    int16
	Subportindex int8
	PuntIndex    uint8
	PortVid      ethernet.VlanTag
}

type PortProvisionConfig

type PortProvisionConfig struct {
	Ports []PortProvision
}

type SwitchPort

type SwitchPort struct {
	Switch, Port uint8
}

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