memory

package
v0.2.0 Latest Latest
Warning

This package is not in the latest version of its module.

Go to latest
Published: Apr 22, 2020 License: GPL-3.0, GPL-3.0 Imports: 7 Imported by: 0

Documentation

Overview

Package memory implements the Atari VCS memory model. The addresses and memory sub-packages help with this.

It is important to understand that memory is viewed differently by different parts of the VCS system. To help with this, the emulation uses what we call memory buses. These buses have nothing to do with the real hardware; they are purely conceptual and are implemented through Go interfaces.

The following ASCII diagram tries to show how the different components of the VCS are connected to the memory. What may not be clear from this diagram is that the peripheral bus only ever writes to memory. The other buses are bidirectional.

                    PERIPHERALS

                         |
                         |
                         \/

                     periph bus

                         |
                         |
                         \/

CPU ---- cpu bus ---- MEMORY ---- chip bus ---- TIA
                                            \
                         |                   \
                         |                    \---- RIOT

                    debugger bus

                         |
                         |

                      DEBUGGER

The memory itself is divided into areas, defined in the memorymap package. Removing the periph bus and debugger bus from the picture, the above diagram with memory areas added is as follows:

                       ==== TIA ---- chip bus ---- TIA
                      |
                      |==== RIOT ---- chip bus ---- RIOT
CPU ---- cpu bus ---- *
                      |==== PIA RAM
                      |
                       ==== Cartridge

The asterisk indicates that addresses used by the CPU are mapped to the primary address. The memorymap package contains more detail on this.

Note that the RIOT registers and PIA RAM are all part of the same hardware package, the PIA 6532. However, for our purposes the two memory areas are considered to be entirely separate.

Index

Constants

This section is empty.

Variables

This section is empty.

Functions

This section is empty.

Types

type ChipMemory

type ChipMemory struct {
	bus.DebuggerBus
	bus.ChipBus
	bus.CPUBus
	bus.InputDeviceBus
	// contains filtered or unexported fields
}

ChipMemory defines the information for and operations allowed for those memory areas accessed by the VCS chips as well as the CPU

func (*ChipMemory) ChipRead

func (area *ChipMemory) ChipRead() (bool, bus.ChipData)

ChipRead is an implementation of memory.ChipBus

func (*ChipMemory) ChipWrite

func (area *ChipMemory) ChipWrite(reg addresses.ChipRegister, data uint8)

ChipWrite is an implementation of memory.ChipBus

func (*ChipMemory) InputDeviceWrite

func (area *ChipMemory) InputDeviceWrite(reg addresses.ChipRegister, data uint8, preserveBits uint8)

InputDeviceWrite implements memory.InputDeviceBus

func (*ChipMemory) LastReadRegister

func (area *ChipMemory) LastReadRegister() string

LastReadRegister is an implementation of memory.ChipBus

func (ChipMemory) Peek

func (area ChipMemory) Peek(address uint16) (uint8, error)

Peek is an implementation of memory.DebuggerBus. Address must be normalised.

func (ChipMemory) Poke

func (area ChipMemory) Poke(address uint16, value uint8) error

Poke is an implementation of memory.DebuggerBus. Address must be normalised.

func (*ChipMemory) Read

func (area *ChipMemory) Read(address uint16) (uint8, error)

Read is an implementation of memory.CPUBus. Address must be normalised.

func (*ChipMemory) Write

func (area *ChipMemory) Write(address uint16, data uint8) error

Write is an implementation of memory.CPUBus. Address must be normalised.

type RAM

type RAM struct {
	bus.DebuggerBus
	bus.CPUBus
	// contains filtered or unexported fields
}

RAM represents the 128bytes of RAM in the PIA 6532 chip, found in the Atari VCS.

func (RAM) Peek

func (ram RAM) Peek(address uint16) (uint8, error)

Peek is the implementation of memory.DebuggerBus. Address must be normalised.

func (RAM) Poke

func (ram RAM) Poke(address uint16, value uint8) error

Poke is the implementation of memory.DebuggerBus. Address must be normalised.

func (RAM) Read

func (ram RAM) Read(address uint16) (uint8, error)

Read is an implementatio of memory.ChipBus. Address must be normalised.

func (RAM) String

func (ram RAM) String() string

func (*RAM) Write

func (ram *RAM) Write(address uint16, data uint8) error

Write is an implementatio of memory.ChipBus. Address must be normalised.

type VCSMemory

type VCSMemory struct {
	bus.CPUBus

	// memmap is a hash for every address in the VCS address space, returning
	// one of the four memory areas
	Memmap []bus.DebuggerBus

	// the four memory areas
	RIOT *ChipMemory
	TIA  *ChipMemory
	RAM  *RAM
	Cart *cartridge.Cartridge

	// the following are only used by the debugging interface. it would be
	// lovely to remove these for non-debugging emulation but there's not much
	// impact on performance so they can stay for now:
	//
	//  . a note of the last (mapped) memory address to be accessed
	//  . the value that was written/read from the last address accessed
	//  . whether the last addres accessed was written or read
	//  . the ID of the last memory access (currently a timestamp)
	LastAccessAddress uint16
	LastAccessValue   uint8
	LastAccessWrite   bool
	LastAccessID      int
	// contains filtered or unexported fields
}

VCSMemory is the monolithic representation of the memory in 2600.

func NewVCSMemory

func NewVCSMemory() (*VCSMemory, error)

NewVCSMemory is the preferred method of initialisation for VCSMemory

func (*VCSMemory) GetArea

func (mem *VCSMemory) GetArea(area memorymap.Area) (bus.DebuggerBus, error)

GetArea returns the actual memory of the specified area type

func (*VCSMemory) Read

func (mem *VCSMemory) Read(address uint16) (uint8, error)

Read is an implementation of CPUBus. Address will be normalised and processed by the correct memory area.

func (*VCSMemory) ReadZeroPage

func (mem *VCSMemory) ReadZeroPage(address uint8) (uint8, error)

ReadZeroPage is an implementation of CPUBus. Address will be normalised and processed by the correct memory areas.

func (*VCSMemory) Write

func (mem *VCSMemory) Write(address uint16, data uint8) error

Write is an implementation of CPUBus Address will be normalised and processed by the correct memory areas.

Directories

Path Synopsis
Package addresses countains all information about VCS addresses and registers, including canonical symbols for read and write addresses and registers.
Package addresses countains all information about VCS addresses and registers, including canonical symbols for read and write addresses and registers.
Package bus defines the memory bus concept.
Package bus defines the memory bus concept.
Package cartridge fully implements loading of mapping of cartridge memory.
Package cartridge fully implements loading of mapping of cartridge memory.
Package memorymap facilitates the translation of addresses to primary address equivalents.
Package memorymap facilitates the translation of addresses to primary address equivalents.

Jump to

Keyboard shortcuts

? : This menu
/ : Search site
f or F : Jump to
y or Y : Canonical URL