cpu

package
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 Go to latest Published: Nov 8, 2023 License: Apache-2.0 Imports: 6 Imported by: 0

Documentation

Index

Constants

View Source 
const (
	// https://www.c64-wiki.com/wiki/Processor_Status_Register
	// N	V	–	B	D	I	Z	C
	// Each flag has a letter symbol for easier reference. Here are the flags and what they mean:
	// Flag				Sym	Bit	Description
	// Negative			N	b7	Set when an operation results in a negative number
	// Overflow			V	b6	Set when a signed addition or subtraction results in an overflow
	// Unused			—	b5	This bit of the processor status register is not used
	// Break			B	b4	Set when a BRK instruction is executed
	// Decimal Mode		D	b3	When set, certain instructions operate in decimal rather than binary mode
	// Interrupt Mask	I	b2	When set, interrupt requests are ignored
	// Zero				Z	b1	Set when an operation results in a zero
	// Carry			C	b0	Set when an unsigned addition or subtraction results in an overflow
	FlagC uint8 = 1 << iota
	FlagZ
	FlagI
	FlagD
	FlagB
	FlagConstant // unused, always set 1
	FlagV
	FlagN

	StackHigh uint16 = 0x01ff // stack works top down
	StackLow  uint16 = 0x0100

	ResetVector uint16 = 0xfffc
	IRQVector   uint16 = 0xfffe
	NMIVector   uint16 = 0xfffa
)

Variables

View Source 
var CPU_DEBUG_PRINT = 0
View Source 
var Instructions = map[byte]Instruction{}/* 151 elements not displayed */

Functions

func ADC 

func ADC(cpu *CPU, mode AddressingMode)

ADC Add memory to accumulator with carry Operation: A + M + C -> A, C N Z C I D V * * * _ _ *

func AND 

func AND(cpu *CPU, mode AddressingMode)

AND "AND" memory with accumulator Operation: A /\ M -> A N Z C I D V * * _ _ _

func ASL 

func ASL(cpu *CPU, mode AddressingMode)

ASL Shift Left One Bit (Memory or Accumulator) 

+-+-+-+-+-+-+-+-+

Operation: C <- |7|6|5|4|3|2|1|0| <- 0 

+-+-+-+-+-+-+-+-+

N Z C I D V * * * _ _ _

func BCC 

func BCC(cpu *CPU, mode AddressingMode)

BCC Branch on Carry Clear Operation: Branch on C = 0 N Z C I D V _ _ _ _ _ _

func BCS 

func BCS(cpu *CPU, mode AddressingMode)

BCS Branch on carry set Operation: Branch on C = 1 N Z C I D V _ _ _ _ _ _

func BEQ 

func BEQ(cpu *CPU, mode AddressingMode)

BEQ Branch on result zero Operation: Branch on Z = 1 N Z C I D V _ _ _ _ _ _

func BIT 

func BIT(cpu *CPU, mode AddressingMode)

BIT Test bits in memory with accumulator Operation: A /\ M, M7 -> N, M6 -> V Bit 6 and 7 are transferred to the status register. If the result of A /\ M is zero then Z = 1, otherwise Z = 0 N Z C I D V M7 * _ _ _ M6

func BMI 

func BMI(cpu *CPU, mode AddressingMode)

BMI Branch on result minus Operation: Branch on N = 1 N Z C I D V _ _ _ _ _ _

func BNE 

func BNE(cpu *CPU, mode AddressingMode)

BNE Branch on result not zero Operation: Branch on Z = 0 N Z C I D V _ _ _ _ _ _

func BPL 

func BPL(cpu *CPU, mode AddressingMode)

BPL Branch on result plus Operation: Branch on N = 0 N Z C I D V _ _ _ _ _ _

func BRK 

func BRK(cpu *CPU, mode AddressingMode)

BRK Force Break Operation: Forced Interrupt N Z C I D V _ _ _ 1 _ _

func BVC 

func BVC(cpu *CPU, mode AddressingMode)

BVC Branch on overflow clear Operation: Branch on V = 0 N Z C I D V _ _ _ _ _ _

func BVS 

func BVS(cpu *CPU, mode AddressingMode)

BVS Branch on overflow set Operation: Branch on V = 1 N Z C I D V _ _ _ _ _ _

func CLC 

func CLC(cpu *CPU, mode AddressingMode)

CLC Clear carry flag Operation: 0 -> C N Z C I D V _ _ 0 _ _ _

func CLD 

func CLD(cpu *CPU, mode AddressingMode)

CLD Clear decimal mode Operation: 0 -> D N A C I D V _ _ _ _ 0 _

func CLI 

func CLI(cpu *CPU, mode AddressingMode)

CLI Clear interrupt disable bit Operation: 0 -> I N Z C I D V _ _ _ 0 _ _

func CLV 

func CLV(cpu *CPU, mode AddressingMode)

CLV Clear overflow flag Operation: 0 -> V N Z C I D V _ _ _ _ _ 0

func CMP 

func CMP(cpu *CPU, mode AddressingMode)

CMP Compare memory and accumulator Operation: A - M N Z C I D V * * * _ _ _

func CPX 

func CPX(cpu *CPU, mode AddressingMode)

CPX Compare Memory and Index X Operation: X - M N Z C I D V * * * _ _ _

func CPY 

func CPY(cpu *CPU, mode AddressingMode)

CPY Compare memory and index Y Operation: Y - M N Z C I D V * * * _ _ _

func DEC 

func DEC(cpu *CPU, mode AddressingMode)

DEC Decrement Memory by one Operation: M - 1 -> M N Z C I D V * * _ _ _ _

func DEX 

func DEX(cpu *CPU, mode AddressingMode)

DEX Decrement index X by one Operation: X - 1 -> X N Z C I D V * * _ _ _ _

func DEY 

func DEY(cpu *CPU, mode AddressingMode)

DEY Decrement index Y by one Operation: Y - 1 -> Y N Z C I D V * * _ _ _ _

func EOR 

func EOR(cpu *CPU, mode AddressingMode)

EOR "Exclusive-Or" memory with accumulator Operation: A EOR M -> A N Z C I D V * * _ _ _ _

func INC 

func INC(cpu *CPU, mode AddressingMode)

INC Increment memory by one Operation: M + 1 -> M N Z C I D V * * _ _ _ _

func INX 

func INX(cpu *CPU, mode AddressingMode)

INX Increment Index X by one Operation: X + 1 -> X N Z C I D V * * _ _ _ _

func INY 

func INY(cpu *CPU, mode AddressingMode)

INY Increment Index Y by one Operation: Y + 1 -> Y N Z C I D V * * _ _ _ _

func JMP 

func JMP(cpu *CPU, mode AddressingMode)

JMP Jump to new location Operation: (PC + 1) -> PCL 

(PC + 2) -> PCH

N Z C I D V _ _ _ _ _ _

func JSR 

func JSR(cpu *CPU, mode AddressingMode)

JSR Jump to new location saving return address Operation: PC + 2 toS, (PC + 1) -> PCL 

(PC + 2) -> PCH

N Z C I D V _ _ _ _ _ _

func LDA 

func LDA(cpu *CPU, mode AddressingMode)

LDA Load accumulator with memory Operation: M -> A N Z C I D V * * _ _ _ _

func LDX 

func LDX(cpu *CPU, mode AddressingMode)

LDX Load Index X with memory Operation: M -> X N Z C I D V * * _ _ _ _

func LDY 

func LDY(cpu *CPU, mode AddressingMode)

LDY Load Index Y with memory Operation: M -> Y N Z C I D V * * _ _ _ _

func LSR 

func LSR(cpu *CPU, mode AddressingMode)

LSR Shift right one bit (memory or accumulator) 

                 +-+-+-+-+-+-+-+-+
Operation:  0 -> |7|6|5|4|3|2|1|0| -> C
                 +-+-+-+-+-+-+-+-+
N Z C I D V
0 * * _ _ _

func NOP 

func NOP(cpu *CPU, mode AddressingMode)

NOP No operation Operation: No Operation (2 cycles) N Z C I D V _ _ _ _ _ _

func ORA 

func ORA(cpu *CPU, mode AddressingMode)

ORA "OR" memory with accumulator Operation: A V M -> A N Z C I D V * * _ _ _ _

func PHA 

func PHA(cpu *CPU, mode AddressingMode)

PHA Push accumulator on stack Operation: A toS N Z C I D V _ _ _ _ _ _

func PHP 

func PHP(cpu *CPU, mode AddressingMode)

PHP Push processor status on stack Operation: P toS N Z C I D V _ _ _ _ _ _

func PLA 

func PLA(cpu *CPU, mode AddressingMode)

PLA Pull accumulator from stack Operation: A fromS N Z C I D V * * _ _ _ _

func PLP 

func PLP(cpu *CPU, mode AddressingMode)

PLP Pull processor status from stack Operation: P fromS From Stack _ _ _ _ _ _

func ROL 

func ROL(cpu *CPU, mode AddressingMode)

ROL Rotate one bit left (memory or accumulator) 

+------------------------------+
|         M or A               |
|   +-+-+-+-+-+-+-+-+    +-+   |

Operation: +-< |7|6|5|4|3|2|1|0| <- |C| <-+ 

+-+-+-+-+-+-+-+-+    +-+

N Z C I D V * * * _ _ _

func ROR 

func ROR(cpu *CPU, mode AddressingMode)

ROR Rotate one bit right (memory or accumulator) 

             +------------------------------+
             |                              |
             |   +-+    +-+-+-+-+-+-+-+-+   |
Operation:   +-> |C| -> |7|6|5|4|3|2|1|0| >-+
                 +-+    +-+-+-+-+-+-+-+-+

N Z C I D V * * * _ _ _

func RTI 

func RTI(cpu *CPU, mode AddressingMode)

RTI Return from interrupt Operation: P fromS PC fromS N Z C I D V * * * * * *

func RTS 

func RTS(cpu *CPU, mode AddressingMode)

RTS Return from Subroutine Operation: PC fromS, PC + 1 -> PC 

N Z C I D V
_ _ _ _ _ _

func SBC 

func SBC(cpu *CPU, mode AddressingMode)

SBC Subtract memory from accumulator with borrow Operation: A - M - C -> A N Z C I D V * * * _ _ * Note:C = Borrow

func SEC 

func SEC(cpu *CPU, mode AddressingMode)

SEC Set carry flag Operation: 1 -> C N Z C I D V _ _ 1 _ _ _

func SED 

func SED(cpu *CPU, mode AddressingMode)

SED Set decimal mode Operation: 1 -> D N Z C I D V _ _ _ _ 1 _

func SEI 

func SEI(cpu *CPU, mode AddressingMode)

SEI Set interrupt disable status Operation: 1 -> I N Z C I D V _ _ _ 1 _ _

func STA 

func STA(cpu *CPU, mode AddressingMode)

STA Store accumulator in memory Operation: A -> M N Z C I D V _ _ _ _ _ _

func STX 

func STX(cpu *CPU, mode AddressingMode)

STX Store Index X in memory Operation: X -> M N Z C I D V _ _ _ _ _ _

func STY 

func STY(cpu *CPU, mode AddressingMode)

STY Store Index Y in memory Operation: Y -> M N Z C I D V _ _ _ _ _ _

func TAX 

func TAX(cpu *CPU, mode AddressingMode)

TAX Transfer accumulator to index X Operation: A -> X N Z C I D V * * _ _ _ _

func TAY 

func TAY(cpu *CPU, mode AddressingMode)

TAY Transfer accumulator to index Y Operation: A -> Y N Z C I D V * * _ _ _ _

func TSX 

func TSX(cpu *CPU, mode AddressingMode)

TSX Transfer stack pointer to index X Operation: S -> X N Z C I D V * * _ _ _ _

func TXA 

func TXA(cpu *CPU, mode AddressingMode)

TXA Transfer index X to accumulator Operation: X -> A N Z C I D V * * _ _ _ _

func TXS 

func TXS(cpu *CPU, mode AddressingMode)

TXS Transfer index X to stack pointer Operation: X -> S N Z C I D V _ _ _ _ _ _

func TYA 

func TYA(cpu *CPU, mode AddressingMode)

TYA Transfer index Y to accumulator Operation: Y -> A N Z C I D V * * _ _ _ _

Types

type AddressingMode 

type AddressingMode uint8
const (
	// https://www.c64-wiki.com/wiki/Addressing_mode
	Implied AddressingMode = iota
	Accumulator
	Immidiate
	Absolute
	IndexedAbsoluteX
	IndexedAbsoluteY
	Zeropage
	IndexedZeropageX
	IndexedZeropageY
	Relative
	AbsoluteIndirect
	IndexedIndirectX
	IndirectIndexedY
)

type CPU 

type CPU struct {
	// contains filtered or unexported fields
}

func NewCPU 

func NewCPU(logger slog.Logger, clock *clock.Clock, m c64.MemoryBus, irq <-chan bool) *CPU

func (*CPU) IRQ 

func (cpu *CPU) IRQ()

func (*CPU) NMI 

func (cpu *CPU) NMI()

func (*CPU) Reset 

func (cpu *CPU) Reset()

func (*CPU) Run 

func (cpu *CPU) Run()

type InstraFunc 

type InstraFunc func(cpu *CPU, mode AddressingMode)

type Instruction 

type Instruction struct {
	// contains filtered or unexported fields
}

Source Files

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