Documentation ¶
Index ¶
Constants ¶
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Variables ¶
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Functions ¶
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Types ¶
type Architecture ¶
type Architecture int
Architecture describes the overall hardware architecture. It can be either Symmetric Multi-Processor (SMP) or Non-Uniform Memory Access (NUMA)
const ( // SMP is a Symmetric Multi-Processor system ARCHITECTURE_SMP Architecture = iota // NUMA is a Non-Uniform Memory Access system ARCHITECTURE_NUMA )
func (Architecture) MarshalJSON ¶
func (a Architecture) MarshalJSON() ([]byte, error)
NOTE(jaypipes): since serialized output is as "official" as we're going to get, let's lowercase the string output when serializing, in order to "normalize" the expected serialized output
func (Architecture) String ¶
func (a Architecture) String() string
func (*Architecture) UnmarshalJSON ¶ added in v0.9.0
func (a *Architecture) UnmarshalJSON(b []byte) error
type Info ¶
type Info struct { Architecture Architecture `json:"architecture"` Nodes []*Node `json:"nodes"` // contains filtered or unexported fields }
Info describes the system topology for the host hardware
func New ¶
New returns a pointer to an Info struct that contains information about the NUMA topology on the host system
func (*Info) JSONString ¶
JSONString returns a string with the topology information formatted as JSON under a top-level "topology:" key
func (*Info) YAMLString ¶
YAMLString returns a string with the topology information formatted as YAML under a top-level "topology:" key
type Node ¶
type Node struct { ID int `json:"id"` Cores []*cpu.ProcessorCore `json:"cores"` Caches []*memory.Cache `json:"caches"` Distances []int `json:"distances"` Memory *memory.Area `json:"memory"` }
Node is an abstract construct representing a collection of processors and various levels of memory cache that those processors share. In a NUMA architecture, there are multiple NUMA nodes, abstracted here as multiple Node structs. In an SMP architecture, a single Node will be available in the Info struct and this single struct can be used to describe the levels of memory caching available to the single physical processor package's physical processor cores