Documentation ¶
Overview ¶
Package cpu provides an emulator for the unnamed time travel control computer/wearable from AoC 2018.
Index ¶
Constants ¶
This section is empty.
Variables ¶
This section is empty.
Functions ¶
This section is empty.
Types ¶
type Op ¶
type Op int
Op represents one of the device's 16 opcodes.
const ( // AddR (add register), rC = rA + rB. AddR Op = iota // AddI (add immediate), rC = rA + #B. AddI // MulR (multiply register), rC = rA * rB. MulR // MulI (multiply immediate), rC = rA * #B. MulI // BanR (bitwise AND register), rC = rA & rB. BanR // BanI (bitwise AND immediate), rC = rA & #B. BanI // BorR (bitwise OR register), rC = rA | rB. BorR // BorI (bitwise OR immediate), rC = rA | #B. BorI // SetR (set register), rC = rA, B ignored. SetR // SetI (set immediate), rC = #A, B ignored. SetI // GtIR (greater-than immediate/register), rC = #A > rB. GtIR // GtRI (greater-than register/immediate), rC = rA > #B. GtRI // GtRR (greater-than register/register), rC = rA > rB. GtRR // EqIR (equal immediate/register), rC = #A == rB. EqIR // EqRI (equal register/immediate), rC = rA == #B. EqRI // EqRR (equal register/register), rC = rA == rB. EqRR // FirstOp is the numerically first opcode; you can iterate from it to LastOp. FirstOp = AddR // LastOp is the numerically last opcode; you can iterate to it from FirstOp. LastOp = EqRR )
type Prog ¶
Prog represents an entire program: a sequence of instructions, together with IP binding instructions.
type State ¶
State holds the entire CPU state: 6 registers and the instruction pointer, as well as the current IP/register binding state.
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