lpuart

package
v0.0.7 Latest Latest
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 Go to latest Published: Mar 28, 2024 License: BSD-3-Clause Imports: 13 Imported by: 0

Documentation

Index

Constants

View Source 
const (
	FEATURE   uint32 = 0xFFFF << 0 //+ Feature Identification Number
	FEATURE_1 uint32 = 0x01 << 0   //  Standard feature set.
	FEATURE_3 uint32 = 0x03 << 0   //  Standard feature set with MODEM/IrDA support.
	MINOR     uint32 = 0xFF << 16  //+ Minor Version Number
	MAJOR     uint32 = 0xFF << 24  //+ Major Version Number

	FEATUREn = 0
	MINORn   = 16
	MAJORn   = 24
)

VERID

View Source 
const (
	TXFIFO uint32 = 0xFF << 0 //+ Transmit FIFO Size
	RXFIFO uint32 = 0xFF << 8 //+ Receive FIFO Size

	TXFIFOn = 0
	RXFIFOn = 8
)

PARAM

View Source 
const (
	MA2F    STAT = 0x01 << 14 //+ Match 2 Flag
	MA1F    STAT = 0x01 << 15 //+ Match 1 Flag
	PF      STAT = 0x01 << 16 //+ Parity Error Flag
	FE      STAT = 0x01 << 17 //+ Framing Error Flag
	NF      STAT = 0x01 << 18 //+ Noise Flag
	OR      STAT = 0x01 << 19 //+ Receiver Overrun Flag
	IDLE    STAT = 0x01 << 20 //+ Idle Line Flag
	RDRF    STAT = 0x01 << 21 //+ Receive Data Register Full Flag
	TC      STAT = 0x01 << 22 //+ Transmission Complete Flag
	TDRE    STAT = 0x01 << 23 //+ Transmit Data Register Empty Flag
	RAF     STAT = 0x01 << 24 //+ Receiver Active Flag
	LBKDE   STAT = 0x01 << 25 //+ LIN Break Detection Enable
	BRK13   STAT = 0x01 << 26 //+ Break Character Generation Length
	RWUID   STAT = 0x01 << 27 //+ Receive Wake Up Idle Detect
	RXINV   STAT = 0x01 << 28 //+ Receive Data Inversion
	MSBF    STAT = 0x01 << 29 //+ MSB First
	RXEDGIF STAT = 0x01 << 30 //+ RXD Pin Active Edge Interrupt Flag
	LBKDIF  STAT = 0x01 << 31 //+ LIN Break Detect Interrupt Flag

	MA2Fn    = 14
	MA1Fn    = 15
	PFn      = 16
	FEn      = 17
	NFn      = 18
	ORn      = 19
	IDLEn    = 20
	RDRFn    = 21
	TCn      = 22
	TDREn    = 23
	RAFn     = 24
	LBKDEn   = 25
	BRK13n   = 26
	RWUIDn   = 27
	RXINVn   = 28
	MSBFn    = 29
	RXEDGIFn = 30
	LBKDIFn  = 31
)
View Source 
const (
	PT        CTRL = 0x01 << 0  //+ Parity Type
	PE        CTRL = 0x01 << 1  //+ Parity Enable
	ILT       CTRL = 0x01 << 2  //+ Idle Line Type Select
	WAKE      CTRL = 0x01 << 3  //+ Receiver Wakeup Method Select
	M         CTRL = 0x01 << 4  //+ 9-Bit or 8-Bit Mode Select
	RSRC      CTRL = 0x01 << 5  //+ Receiver Source Select
	DOZEEN    CTRL = 0x01 << 6  //+ Doze Enable
	LOOPS     CTRL = 0x01 << 7  //+ Loop Mode Select
	IDLECFG   CTRL = 0x07 << 8  //+ Idle Configuration
	IDLECFG_0 CTRL = 0x00 << 8  //  1 idle character
	IDLECFG_1 CTRL = 0x01 << 8  //  2 idle characters
	IDLECFG_2 CTRL = 0x02 << 8  //  4 idle characters
	IDLECFG_3 CTRL = 0x03 << 8  //  8 idle characters
	IDLECFG_4 CTRL = 0x04 << 8  //  16 idle characters
	IDLECFG_5 CTRL = 0x05 << 8  //  32 idle characters
	IDLECFG_6 CTRL = 0x06 << 8  //  64 idle characters
	IDLECFG_7 CTRL = 0x07 << 8  //  128 idle characters
	M7        CTRL = 0x01 << 11 //+ 7-Bit Mode Select
	MA2IE     CTRL = 0x01 << 14 //+ Match 2 Interrupt Enable
	MA1IE     CTRL = 0x01 << 15 //+ Match 1 Interrupt Enable
	SBK       CTRL = 0x01 << 16 //+ Send Break
	RWU       CTRL = 0x01 << 17 //+ Receiver Wakeup Control
	RE        CTRL = 0x01 << 18 //+ Receiver Enable
	TE        CTRL = 0x01 << 19 //+ Transmitter Enable
	ILIE      CTRL = 0x01 << 20 //+ Idle Line Interrupt Enable
	RIE       CTRL = 0x01 << 21 //+ Receiver Interrupt Enable
	TCIE      CTRL = 0x01 << 22 //+ Transmission Complete Interrupt Enable for
	TIE       CTRL = 0x01 << 23 //+ Transmit Interrupt Enable
	PEIE      CTRL = 0x01 << 24 //+ Parity Error Interrupt Enable
	FEIE      CTRL = 0x01 << 25 //+ Framing Error Interrupt Enable
	NEIE      CTRL = 0x01 << 26 //+ Noise Error Interrupt Enable
	ORIE      CTRL = 0x01 << 27 //+ Overrun Interrupt Enable
	TXINV     CTRL = 0x01 << 28 //+ Transmit Data Inversion
	TXDIR     CTRL = 0x01 << 29 //+ TXD Pin Direction in Single-Wire Mode
	R9T8      CTRL = 0x01 << 30 //+ Receive Bit 9 / Transmit Bit 8
	R8T9      CTRL = 0x01 << 31 //+ Receive Bit 8 / Transmit Bit 9

	PTn      = 0
	PEn      = 1
	ILTn     = 2
	WAKEn    = 3
	Mn       = 4
	RSRCn    = 5
	DOZEENn  = 6
	LOOPSn   = 7
	IDLECFGn = 8
	M7n      = 11
	MA2IEn   = 14
	MA1IEn   = 15
	SBKn     = 16
	RWUn     = 17
	REn      = 18
	TEn      = 19
	ILIEn    = 20
	RIEn     = 21
	TCIEn    = 22
	TIEn     = 23
	PEIEn    = 24
	FEIEn    = 25
	NEIEn    = 26
	ORIEn    = 27
	TXINVn   = 28
	TXDIRn   = 29
	R9T8n    = 30
	R8T9n    = 31
)
View Source 
const (
	DATA    uint16 = 0x3ff << 0 //+ Data bits
	IDLINE  uint16 = 0x01 << 11 //+ Idle Line
	RXEMPT  uint16 = 0x01 << 12 //+ Receive Buffer Empty
	FRETSC  uint16 = 0x01 << 13 //+ Frame Error / Transmit Special Character
	PARITYE uint16 = 0x01 << 14 //+ PARITYE
	NOISY   uint16 = 0x01 << 15 //+ NOISY

	DATAn    = 0
	IDLINEn  = 11
	RXEMPTn  = 12
	FRETSCn  = 13
	PARITYEn = 14
	NOISYn   = 15
)

DATA

View Source 
const (
	MA1 uint32 = 0x3FF << 0  //+ Match Address 1
	MA2 uint32 = 0x3FF << 16 //+ Match Address 2

	MA1n = 0
	MA2n = 16
)

MATCH

View Source 
const (
	TXCTSE   MODIR = 0x01 << 0  //+ Transmitter clear-to-send enable
	TXRTSE   MODIR = 0x01 << 1  //+ Transmitter request-to-send enable
	TXRTSPOL MODIR = 0x01 << 2  //+ Transmitter request-to-send polarity
	RXRTSE   MODIR = 0x01 << 3  //+ Receiver request-to-send enable
	TXCTSC   MODIR = 0x01 << 4  //+ Transmit CTS Configuration
	TXCTSSRC MODIR = 0x01 << 5  //+ Transmit CTS Source
	RTSWATER MODIR = 0x03 << 8  //+ Receive RTS Configuration
	TNP      MODIR = 0x03 << 16 //+ Transmitter narrow pulse
	TNP_0    MODIR = 0x00 << 16 //  1/OSR.
	TNP_1    MODIR = 0x01 << 16 //  2/OSR.
	TNP_2    MODIR = 0x02 << 16 //  3/OSR.
	TNP_3    MODIR = 0x03 << 16 //  4/OSR.
	IREN     MODIR = 0x01 << 18 //+ Infrared enable

	TXCTSEn   = 0
	TXRTSEn   = 1
	TXRTSPOLn = 2
	RXRTSEn   = 3
	TXCTSCn   = 4
	TXCTSSRCn = 5
	RTSWATERn = 8
	TNPn      = 16
	IRENn     = 18
)
View Source 
const (
	TXWATER uint32 = 0x03 << 0  //+ Transmit Watermark
	TXCOUNT uint32 = 0x07 << 8  //+ Transmit Counter
	RXWATER uint32 = 0x03 << 16 //+ Receive Watermark
	RXCOUNT uint32 = 0x07 << 24 //+ Receive Counter

	TXWATERn = 0
	TXCOUNTn = 8
	RXWATERn = 16
	RXCOUNTn = 24
)

WATER

View Source 
const (
	EPARITY  = Error(PF)
	EFRAMING = Error(FE)
	ENOISE   = Error(NF)
	EOVERRUN = Error(OR)
)
View Source 
const (
	Word7b  = Config(M7)
	Word8b  = Config(0)
	Word9b  = Config(M)
	Word10b = Config(M10)
	ParEven = Config(PE)
	ParOdd  = Config(PE | PT)

	Stop2b = Config(SBNS)
)

Variables

This section is empty.

Functions

This section is empty.

Types

type BAUD 

type BAUD uint32
const (
	SBR       BAUD = 0x1FFF << 0 //+ Baud Rate Modulo Divisor.
	SBNS      BAUD = 0x01 << 13  //+ Stop Bit Number Select
	RXEDGIE   BAUD = 0x01 << 14  //+ RX Input Active Edge Interrupt Enable
	LBKDIE    BAUD = 0x01 << 15  //+ LIN Break Detect Interrupt Enable
	RESYNCDIS BAUD = 0x01 << 16  //+ Resynchronization Disable
	BOTHEDGE  BAUD = 0x01 << 17  //+ Both Edge Sampling
	MATCFG    BAUD = 0x03 << 18  //+ Match Configuration
	MATCFG_0  BAUD = 0x00 << 18  //  Address Match Wakeup
	MATCFG_1  BAUD = 0x01 << 18  //  Idle Match Wakeup
	MATCFG_2  BAUD = 0x02 << 18  //  Match On and Match Off
	MATCFG_3  BAUD = 0x03 << 18  //  Enables RWU on Data Match and Match On/Off for transmitter CTS input
	RIDMAE    BAUD = 0x01 << 20  //+ Receiver Idle DMA Enable
	RDMAE     BAUD = 0x01 << 21  //+ Receiver Full DMA Enable
	TDMAE     BAUD = 0x01 << 23  //+ Transmitter DMA Enable
	OSR       BAUD = 0x1F << 24  //+ Oversampling Ratio
	OSR_0     BAUD = 0x00 << 24  //  Writing 0 to this field will result in an oversampling ratio of 16
	OSR_3     BAUD = 0x03 << 24  //  Oversampling ratio of 4, requires BOTHEDGE to be set.
	OSR_4     BAUD = 0x04 << 24  //  Oversampling ratio of 5, requires BOTHEDGE to be set.
	OSR_5     BAUD = 0x05 << 24  //  Oversampling ratio of 6, requires BOTHEDGE to be set.
	OSR_6     BAUD = 0x06 << 24  //  Oversampling ratio of 7, requires BOTHEDGE to be set.
	OSR_7     BAUD = 0x07 << 24  //  Oversampling ratio of 8.
	OSR_8     BAUD = 0x08 << 24  //  Oversampling ratio of 9.
	OSR_9     BAUD = 0x09 << 24  //  Oversampling ratio of 10.
	OSR_10    BAUD = 0x0A << 24  //  Oversampling ratio of 11.
	OSR_11    BAUD = 0x0B << 24  //  Oversampling ratio of 12.
	OSR_12    BAUD = 0x0C << 24  //  Oversampling ratio of 13.
	OSR_13    BAUD = 0x0D << 24  //  Oversampling ratio of 14.
	OSR_14    BAUD = 0x0E << 24  //  Oversampling ratio of 15.
	OSR_15    BAUD = 0x0F << 24  //  Oversampling ratio of 16.
	OSR_16    BAUD = 0x10 << 24  //  Oversampling ratio of 17.
	OSR_17    BAUD = 0x11 << 24  //  Oversampling ratio of 18.
	OSR_18    BAUD = 0x12 << 24  //  Oversampling ratio of 19.
	OSR_19    BAUD = 0x13 << 24  //  Oversampling ratio of 20.
	OSR_20    BAUD = 0x14 << 24  //  Oversampling ratio of 21.
	OSR_21    BAUD = 0x15 << 24  //  Oversampling ratio of 22.
	OSR_22    BAUD = 0x16 << 24  //  Oversampling ratio of 23.
	OSR_23    BAUD = 0x17 << 24  //  Oversampling ratio of 24.
	OSR_24    BAUD = 0x18 << 24  //  Oversampling ratio of 25.
	OSR_25    BAUD = 0x19 << 24  //  Oversampling ratio of 26.
	OSR_26    BAUD = 0x1A << 24  //  Oversampling ratio of 27.
	OSR_27    BAUD = 0x1B << 24  //  Oversampling ratio of 28.
	OSR_28    BAUD = 0x1C << 24  //  Oversampling ratio of 29.
	OSR_29    BAUD = 0x1D << 24  //  Oversampling ratio of 30.
	OSR_30    BAUD = 0x1E << 24  //  Oversampling ratio of 31.
	OSR_31    BAUD = 0x1F << 24  //  Oversampling ratio of 32.
	M10       BAUD = 0x01 << 29  //+ 10-bit Mode select
	MAEN2     BAUD = 0x01 << 30  //+ Match Address Mode Enable 2
	MAEN1     BAUD = 0x01 << 31  //+ Match Address Mode Enable 1

	SBRn       = 0
	SBNSn      = 13
	RXEDGIEn   = 14
	LBKDIEn    = 15
	RESYNCDISn = 16
	BOTHEDGEn  = 17
	MATCFGn    = 18
	RIDMAEn    = 20
	RDMAEn     = 21
	TDMAEn     = 23
	OSRn       = 24
	M10n       = 29
	MAEN2n     = 30
	MAEN1n     = 31
)

type CTRL 

type CTRL uint32

type Config 

type Config uint32

type Driver 

type Driver struct {
	// contains filtered or unexported fields
}

A Driver is a driver to the LPUART peripheral. It provides standard io.Reader and io.Writer interface that can be used to read/write stream of 8-bit characters. It also provides couple of methods to configure and manage the underlying LPURAR peripheral for typical applications and to handle stream of 9 and 10 bit characters. For more complex scenarios you can directly access all LPUART registers.

The receiver, if enabled, continuously writes received data to the internal ring buffer which minimizes the risk of data loss. All provided reading methods read from this buffer. The detection of a buffer overflow is based on a best-effort strategy. You cannot rely on it, nor can you rely on error detection provided by hardware. Both provide qualitative, not quantitative, information.

The sending and receiving subsystems of the driver are completly independent. Each of them can be independently turned on, off, and used by different goroutines. Each one can be also configured in DMA or no-DMA mode.

func NewDriver 

func NewDriver(p *Periph, rxdma, txdma dma.Channel) *Driver

NewDriver returns a new driver for p.

func (*Driver) DisableRx 

func (d *Driver) DisableRx()

DisableRx disables receiver and discards all data in Rx buffer. Disabled driver cannot be used to read data.

func (*Driver) DisableTx 

func (d *Driver) DisableTx()

DisableTx disables Tx part of the LPUART peripheral.

func (*Driver) DiscardRx added in v0.0.5 

func (d *Driver) DiscardRx()

DiscardRx discards all rceived data.

func (*Driver) EnableRx 

func (d *Driver) EnableRx(bufLen int)

EnableRx enables receiving data into internal ring buffer of size bufLen characters. The minimum size of the buffer is 2 characters. The buffer size is limited to 16M characters in no-DMA mode and 32767 characters in DMA mode.

func (*Driver) EnableTx 

func (d *Driver) EnableTx()

EnableTx enables Tx part of the LPUART peripheral.

func (*Driver) ISR 

func (d *Driver) ISR()

func (*Driver) Len 

func (d *Driver) Len() int

Len returns the number of buffered characters in the Rx ring buffre or -1 if it detected the overflow condition.

func (*Driver) Periph 

func (d *Driver) Periph() *Periph

func (*Driver) Read 

func (d *Driver) Read(buf []byte) (n int, err error)

Read implements the io.Reader interface.

func (*Driver) Read16 added in v0.0.5 

func (d *Driver) Read16(buf []uint16) (n int, err error)

Read16 works like Read but transfers 16-bit words that contain all bits read from DATA register (up to 10 data bits and 4 status/error flags per word). Because of this Read16 does not stop on the detected error flag like Read does and these flags are not returned in err.

func (*Driver) ReadByte 

func (d *Driver) ReadByte() (byte, error)

ReadByte implements the io.ByteReader interface.

func (*Driver) ReadWord16 added in v0.0.5 

func (d *Driver) ReadWord16() (uint16, error)

ReadWord16 works like ReadByte but returns all bits that can be read from DATA register (up to 10 data bits and 4 status/error flags). Because of this the error flags are not returned in error.

func (*Driver) RxDMAISR added in v0.0.5 

func (d *Driver) RxDMAISR()

func (*Driver) SetConfig 

func (d *Driver) SetConfig(conf Config)

SetConfig configures LPUART.

func (*Driver) SetReadTimeout added in v0.0.5 

func (d *Driver) SetReadTimeout(timeout time.Duration)

SetReadTimeout sets the read timeout used by Read* functions.

func (*Driver) SetWriteTimeout added in v0.0.5 

func (d *Driver) SetWriteTimeout(timeout time.Duration)

SetWriteTimeout sets the write timeout used by Write* functions.

func (*Driver) Setup 

func (d *Driver) Setup(conf Config, baudrate int)

Setup enables clock source, resets, and configures the LPUART peripheral. You still have to enable Tx and/or Rx before use it.

func (*Driver) TxDMAISR added in v0.0.5 

func (d *Driver) TxDMAISR()

func (*Driver) UsePin 

func (d *Driver) UsePin(pin iomux.Pin, sig Signal) bool

UsePin is a helper function that can be used to configure IO pins as required by LPUART peripheral. Only certain pins can be used (see datasheet). UsePin returns true on succes or false if it isn't possible to use a pin as a sig. See also Periph.Pins.

func (*Driver) Write 

func (d *Driver) Write(p []byte) (int, error)

Write implements the io.Writer interface.

func (*Driver) Write16 added in v0.0.5 

func (d *Driver) Write16(s []uint16) (n int, err error)

Write16 works like Write but writes 16-bit words to the DATA register.

func (*Driver) WriteByte 

func (d *Driver) WriteByte(b byte) error

WriteByte implements the io.ByteWriter interface.

func (*Driver) WriteString 

func (d *Driver) WriteString(s string) (n int, err error)

WriteString implements the io.StringWriter interface.

func (*Driver) WriteWord16 added in v0.0.5 

func (d *Driver) WriteWord16(w uint16) error

WriteWord16 works like WriteByte but writes 16-bit word to the DATA register.

type DriverError 

type DriverError uint8
const (
	// ErrBufOverflow is returned if one or more received bytes has been dropped
	// because of the lack of free space in the driver's receive buffer.
	ErrBufOverflow DriverError = iota + 1

	// ErrTimeout is returned if timeout occured. It means that the read/write
	// operation has been interrupted. In case of write you can not determine
	// the exact number of bytes sent to the remote party.
	ErrTimeout
)

func (DriverError) Error 

func (e DriverError) Error() string

Error implements error interface.

type Error 

type Error uint32

func (Error) Error 

func (e Error) Error() string

type FIFO 

type FIFO uint32
const (
	RXFIFOSIZE   FIFO = 0x07 << 0  //+ Receive FIFO Buffer Depth
	RXFIFOSIZE_0 FIFO = 0x00 << 0  //  Receive FIFO/Buffer depth = 1 dataword.
	RXFIFOSIZE_1 FIFO = 0x01 << 0  //  Receive FIFO/Buffer depth = 4 datawords.
	RXFIFOSIZE_2 FIFO = 0x02 << 0  //  Receive FIFO/Buffer depth = 8 datawords.
	RXFIFOSIZE_3 FIFO = 0x03 << 0  //  Receive FIFO/Buffer depth = 16 datawords.
	RXFIFOSIZE_4 FIFO = 0x04 << 0  //  Receive FIFO/Buffer depth = 32 datawords.
	RXFIFOSIZE_5 FIFO = 0x05 << 0  //  Receive FIFO/Buffer depth = 64 datawords.
	RXFIFOSIZE_6 FIFO = 0x06 << 0  //  Receive FIFO/Buffer depth = 128 datawords.
	RXFIFOSIZE_7 FIFO = 0x07 << 0  //  Receive FIFO/Buffer depth = 256 datawords.
	RXFE         FIFO = 0x01 << 3  //+ Receive FIFO Enable
	TXFIFOSIZE   FIFO = 0x07 << 4  //+ Transmit FIFO Buffer Depth
	TXFIFOSIZE_0 FIFO = 0x00 << 4  //  Transmit FIFO/Buffer depth = 1 dataword.
	TXFIFOSIZE_1 FIFO = 0x01 << 4  //  Transmit FIFO/Buffer depth = 4 datawords.
	TXFIFOSIZE_2 FIFO = 0x02 << 4  //  Transmit FIFO/Buffer depth = 8 datawords.
	TXFIFOSIZE_3 FIFO = 0x03 << 4  //  Transmit FIFO/Buffer depth = 16 datawords.
	TXFIFOSIZE_4 FIFO = 0x04 << 4  //  Transmit FIFO/Buffer depth = 32 datawords.
	TXFIFOSIZE_5 FIFO = 0x05 << 4  //  Transmit FIFO/Buffer depth = 64 datawords.
	TXFIFOSIZE_6 FIFO = 0x06 << 4  //  Transmit FIFO/Buffer depth = 128 datawords.
	TXFIFOSIZE_7 FIFO = 0x07 << 4  //  Transmit FIFO/Buffer depth = 256 datawords
	TXFE         FIFO = 0x01 << 7  //+ Transmit FIFO Enable
	RXUFE        FIFO = 0x01 << 8  //+ Receive FIFO Underflow Interrupt Enable
	TXOFE        FIFO = 0x01 << 9  //+ Transmit FIFO Overflow Interrupt Enable
	RXIDEN       FIFO = 0x07 << 10 //+ Receiver Idle Empty Enable
	RXIDEN_0     FIFO = 0x00 << 10 //  Disable RDRF assertion due to partially filled FIFO when receiver is idle.
	RXIDEN_1     FIFO = 0x01 << 10 //  Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character.
	RXIDEN_2     FIFO = 0x02 << 10 //  Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters.
	RXIDEN_3     FIFO = 0x03 << 10 //  Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters.
	RXIDEN_4     FIFO = 0x04 << 10 //  Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters.
	RXIDEN_5     FIFO = 0x05 << 10 //  Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters.
	RXIDEN_6     FIFO = 0x06 << 10 //  Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters.
	RXIDEN_7     FIFO = 0x07 << 10 //  Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters.
	RXFLUSH      FIFO = 0x01 << 14 //+ Receive FIFO/Buffer Flush
	TXFLUSH      FIFO = 0x01 << 15 //+ Transmit FIFO/Buffer Flush
	RXUF         FIFO = 0x01 << 16 //+ Receiver Buffer Underflow Flag
	TXOF         FIFO = 0x01 << 17 //+ Transmitter Buffer Overflow Flag
	RXFEMPT      FIFO = 0x01 << 22 //+ Receive Buffer/FIFO Empty
	TXFEMPT      FIFO = 0x01 << 23 //+ Transmit Buffer/FIFO Empty

	RXFIFOSIZEn = 0
	RXFEn       = 3
	TXFIFOSIZEn = 4
	TXFEn       = 7
	RXUFEn      = 8
	TXOFEn      = 9
	RXIDENn     = 10
	RXFLUSHn    = 14
	TXFLUSHn    = 15
	RXUFn       = 16
	TXOFn       = 17
	RXFEMPTn    = 22
	TXFEMPTn    = 23
)

type GLOBAL 

type GLOBAL uint32
const (
	RST GLOBAL = 0x01 << 1 //+ Software Reset

	RSTn = 1
)

type MODIR 

type MODIR uint32

type PINCFG 

type PINCFG uint32
const (
	TRGSEL   PINCFG = 0x03 << 0 //+ Trigger Select
	TRGSEL_0 PINCFG = 0x00 << 0 //  Input trigger is disabled.
	TRGSEL_1 PINCFG = 0x01 << 0 //  Input trigger is used instead of RXD pin input.
	TRGSEL_2 PINCFG = 0x02 << 0 //  Input trigger is used instead of CTS_B pin input.
	TRGSEL_3 PINCFG = 0x03 << 0 //  Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger.

	TRGSELn = 0
)

type Periph 

type Periph struct {
	VERID  mmio.R32[uint32]
	PARAM  mmio.R32[uint32]
	GLOBAL mmio.R32[GLOBAL]
	PINCFG mmio.R32[PINCFG]
	BAUD   mmio.R32[BAUD]
	STAT   mmio.R32[STAT]
	CTRL   mmio.R32[CTRL]
	DATA   mmio.R16[uint16]
	MATCH  mmio.R32[uint32]
	MODIR  mmio.R32[MODIR]
	FIFO   mmio.R32[FIFO]
	WATER  mmio.R32[uint32]
}

func LPUART 

func LPUART(n int) *Periph

func (*Periph) DisableClock 

func (p *Periph) DisableClock()

DisableClock disables the clock for the LPUART peripheral.

func (*Periph) EnableClock 

func (p *Periph) EnableClock(lp bool)

EnableClock enables the clock for the LPUART peripheral. lp determines whether the clock remains on in low power WAIT mode.

func (*Periph) Pins 

func (p *Periph) Pins(sig Signal) []iomux.Pin

Pins return IO pins that can be used for singal sig.

func (*Periph) SetBaudrate 

func (p *Periph) SetBaudrate(baud int)

SetBaudrate sets the UART speed sym/s.

type STAT 

type STAT uint32

type Signal 

type Signal int8
const (
	CTS Signal = iota
	RXD
	TXD
	RTS
)

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