devices

Documentation

Index

• type BusSplit
  • func NewBusSplit[TIN sim.IntPortType, BUS_IN_T sim.IPort[TIN], TOUT sim.IntPortType, ...](in BUS_IN_T, out BUS_OUT_T) *BusSplit[TIN, BUS_IN_T, TOUT, BUS_OUT_T]
  • func (d *BusSplit[TIN, BUS_IN_T, TOUT, BUS_OUT_T]) OnNewStep()
  • func (d *BusSplit[TIN, BUS_IN_T, TOUT, BUS_OUT_T]) OnStepFinished()
  • func (d *BusSplit[TIN, BUS_IN_T, TOUT, BUS_OUT_T]) UpdateSubStep()
• type ClockDevice
  • func NewClockDevice() *ClockDevice
  • func (d *ClockDevice) OnNewStep()
  • func (d *ClockDevice) OnStepFinished()
  • func (d *ClockDevice) UpdateSubStep()
• type MemoryDevice
  • func NewMemoryDevice[T sim.IntPortType, ADDR_BUS_T sim.IPort[T]](port ADDR_BUS_T, bits int) *MemoryDevice[T, ADDR_BUS_T]
  • func (d *MemoryDevice[T, ADDR_BUS_T]) OnNewStep()
  • func (d *MemoryDevice[T, ADDR_BUS_T]) OnStepFinished()
  • func (d *MemoryDevice[T, ADDR_BUS_T]) UpdateSubStep()

Types

type BusSplit

type BusSplit[
	TIN sim.IntPortType,
	BUS_IN_T sim.IPort[TIN],
	TOUT sim.IntPortType,
	BUS_OUT_T sim.IPort[TIN],
] struct {
	IN  BUS_IN_T
	OUT BUS_OUT_T
}

func NewBusSplit

func NewBusSplit[
	TIN sim.IntPortType,
	BUS_IN_T sim.IPort[TIN],
	TOUT sim.IntPortType,
	BUS_OUT_T sim.IPort[TIN],
](
	in BUS_IN_T,
	out BUS_OUT_T,
) *BusSplit[TIN, BUS_IN_T, TOUT, BUS_OUT_T]

func (*BusSplit[TIN, BUS_IN_T, TOUT, BUS_OUT_T]) OnNewStep

func (d *BusSplit[TIN, BUS_IN_T, TOUT, BUS_OUT_T]) OnNewStep()

func (*BusSplit[TIN, BUS_IN_T, TOUT, BUS_OUT_T]) OnStepFinished

func (d *BusSplit[TIN, BUS_IN_T, TOUT, BUS_OUT_T]) OnStepFinished()

func (*BusSplit[TIN, BUS_IN_T, TOUT, BUS_OUT_T]) UpdateSubStep

func (d *BusSplit[TIN, BUS_IN_T, TOUT, BUS_OUT_T]) UpdateSubStep()

type ClockDevice

type ClockDevice struct {
	CLK_OUT *sim.SignalPort
	// contains filtered or unexported fields
}

func NewClockDevice

func NewClockDevice() *ClockDevice

func (*ClockDevice) OnNewStep

func (d *ClockDevice) OnNewStep()

func (*ClockDevice) OnStepFinished

func (d *ClockDevice) OnStepFinished()

func (*ClockDevice) UpdateSubStep

func (d *ClockDevice) UpdateSubStep()

type MemoryDevice

type MemoryDevice[T sim.IntPortType, ADDR_BUS_T sim.IPort[T]] struct {
	ADDR_IN ADDR_BUS_T
	DATA_BI *sim.Bus8Port

	CE_B_IN *sim.SignalPort
	WE_B_IN *sim.SignalPort
	OE_B_IN *sim.SignalPort

	Data []uint8
	// contains filtered or unexported fields
}

func NewMemoryDevice

func NewMemoryDevice[T sim.IntPortType, ADDR_BUS_T sim.IPort[T]](port ADDR_BUS_T, bits int) *MemoryDevice[T, ADDR_BUS_T]

func (*MemoryDevice[T, ADDR_BUS_T]) OnNewStep

func (d *MemoryDevice[T, ADDR_BUS_T]) OnNewStep()

func (*MemoryDevice[T, ADDR_BUS_T]) OnStepFinished

func (d *MemoryDevice[T, ADDR_BUS_T]) OnStepFinished()

func (*MemoryDevice[T, ADDR_BUS_T]) UpdateSubStep

func (d *MemoryDevice[T, ADDR_BUS_T]) UpdateSubStep()