Documentation
¶
Index ¶
- Constants
- Variables
- func Ascii2Hex(in string) string
- func GV_config(element uint8) string
- func Get_input_name(i int) string
- func Get_output_name(i int) string
- func ImportNumber(c *Config, input string) (uint64, error)
- func LocateCommand(fc []FirmwareCommand, ps string, ss string) int
- func Needed_bits(num int) int
- type AXIsTemplateData
- type Abs_assembly
- type B37s
- func (sl *B37s) Check(bmach *Bondmachine) error
- func (sl *B37s) Export() string
- func (sl *B37s) ExtraFiles() ([]string, []string)
- func (sl *B37s) Get_Name() string
- func (sl *B37s) Get_Params() *ExtraParams
- func (sl *B37s) Import(inp string) error
- func (sl *B37s) StaticVerilog() string
- func (sl *B37s) Verilog_headers() string
- type BMAPIExtra
- func (sl *BMAPIExtra) Check(bmach *Bondmachine) error
- func (sl *BMAPIExtra) Export() string
- func (sl *BMAPIExtra) ExtraFiles() ([]string, []string)
- func (sl *BMAPIExtra) Get_Name() string
- func (sl *BMAPIExtra) Get_Params() *ExtraParams
- func (sl *BMAPIExtra) Import(inp string) error
- func (sl *BMAPIExtra) StaticVerilog() string
- func (sl *BMAPIExtra) Verilog_headers() string
- type Barrier
- type Barrier_instance
- func (sm Barrier_instance) GetCPSharedPortsHeader(bmach *Bondmachine, so_id int, flavor string) string
- func (sm Barrier_instance) GetCPSharedPortsWires(bmach *Bondmachine, so_id int, flavor string) string
- func (sm Barrier_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Barrier_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Barrier_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Barrier_instance) GetPerProcPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Barrier_instance) String() string
- func (sm Barrier_instance) Write_verilog(bmach *Bondmachine, so_index int, barrier_name string, flavor string) string
- type Bond
- type Bondirect_extra
- func (sl *Bondirect_extra) Check(bmach *Bondmachine) error
- func (sl *Bondirect_extra) Export() string
- func (sl *Bondirect_extra) ExtraFiles() ([]string, []string)
- func (sl *Bondirect_extra) Get_Name() string
- func (sl *Bondirect_extra) Get_Params() *ExtraParams
- func (sl *Bondirect_extra) Import(inp string) error
- func (sl *Bondirect_extra) StaticVerilog() string
- func (sl *Bondirect_extra) Verilog_headers() string
- type Bondmachine
- func (bmach *Bondmachine) Add_bond(endpoints []string)
- func (bmach *Bondmachine) Add_input() (string, error)
- func (bmach *Bondmachine) Add_output() (string, error)
- func (bmach *Bondmachine) Add_processor(dom_id int) (string, error)
- func (bmach *Bondmachine) Add_shared_objects(sos []string)
- func (bmach *Bondmachine) Attach_benchmark_core(endpoints []string) error
- func (bmach *Bondmachine) Connect_processor_shared_object(endpoints []string)
- func (bmach *Bondmachine) Del_bond(bid int) error
- func (bmach *Bondmachine) Del_input(iid int) error
- func (bmach *Bondmachine) Del_output(oid int) error
- func (bmach *Bondmachine) Dot(conf *Config, prefix string, vm *VM, oldvmstate *VM) string
- func (bmach *Bondmachine) EnumBonds() int
- func (bmach *Bondmachine) EnumProcessors() int
- func (bmach *Bondmachine) Fitness_default(in *simbox.Simbox, exp *simbox.Simbox, sim_interactions uint64) (float32, error)
- func (bmach *Bondmachine) GetMultiAssembly() (*Abs_assembly, error)
- func (bmach *Bondmachine) GetProgramsAlias() ([]string, error)
- func (bmach *Bondmachine) Get_so_name(id int) (string, bool)
- func (bmach *Bondmachine) Init()
- func (bmach *Bondmachine) Jsoner() *Bondmachine_json
- func (bmach *Bondmachine) List_bonds() map[int]string
- func (bmach *Bondmachine) List_domains() string
- func (bmach *Bondmachine) List_inputs() []string
- func (bmach *Bondmachine) List_internal_inputs() []string
- func (bmach *Bondmachine) List_internal_outputs() []string
- func (bmach *Bondmachine) List_outputs() []string
- func (bmach *Bondmachine) List_processor_shared_object_links() string
- func (bmach *Bondmachine) List_processors() string
- func (bmach *Bondmachine) List_shared_objects() string
- func (mach *Bondmachine) MelCopy() mel.Me3li
- func (mach *Bondmachine) MelInit(c *mel.MelConfig, ep *mel.EvolutionParameters)
- func (b *Bondmachine) Specs() string
- func (bmach *Bondmachine) WriteBMAPI(conf *Config, flavor string, iomaps *IOmap, extramods []ExtraModule, ...) error
- func (bmach *Bondmachine) WriteVerilogBMAPI(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
- func (bmach *Bondmachine) WriteVerilogPs2Keyboard(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
- func (bmach *Bondmachine) WriteVerilogVgaText800x600(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
- func (bmach *Bondmachine) Write_verilog(conf *Config, flavor string, iomaps *IOmap, extramods []ExtraModule, ...) error
- func (bmach *Bondmachine) Write_verilog_basys3_7segment(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
- func (bmach *Bondmachine) Write_verilog_board(conf *Config, module_name string, flavor string, iomaps *IOmap, ...) string
- func (bmach *Bondmachine) Write_verilog_etherbond(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
- func (bmach *Bondmachine) Write_verilog_main(conf *Config, module_name string, flavor string) string
- func (bmach *Bondmachine) Write_verilog_testbench(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule, ...) string
- func (bmach *Bondmachine) Write_verilog_udpbond(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
- type Bondmachine_json
- type Channel
- type Channel_instance
- func (sm Channel_instance) GetCPSharedPortsHeader(bmach *Bondmachine, so_id int, flavor string) string
- func (sm Channel_instance) GetCPSharedPortsWires(bmach *Bondmachine, so_id int, flavor string) string
- func (sm Channel_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Channel_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Channel_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Channel_instance) GetPerProcPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Channel_instance) String() string
- func (sm Channel_instance) Write_verilog(bmach *Bondmachine, so_index int, channel_name string, flavor string) string
- type Config
- type EmuDriver
- type Etherbond_extra
- func (sl *Etherbond_extra) Check(bmach *Bondmachine) error
- func (sl *Etherbond_extra) Export() string
- func (sl *Etherbond_extra) ExtraFiles() ([]string, []string)
- func (sl *Etherbond_extra) Get_Name() string
- func (sl *Etherbond_extra) Get_Params() *ExtraParams
- func (sl *Etherbond_extra) Import(inp string) error
- func (sl *Etherbond_extra) StaticVerilog() string
- func (sl *Etherbond_extra) Verilog_headers() string
- type ExtraModule
- type ExtraParams
- type FirmwareCommand
- type GraphBox
- type IOmap
- type Ice40Lp1kLeds
- func (sl *Ice40Lp1kLeds) Check(bmach *Bondmachine) error
- func (sl *Ice40Lp1kLeds) Export() string
- func (sl *Ice40Lp1kLeds) ExtraFiles() ([]string, []string)
- func (sl *Ice40Lp1kLeds) Get_Name() string
- func (sl *Ice40Lp1kLeds) Get_Params() *ExtraParams
- func (sl *Ice40Lp1kLeds) Import(inp string) error
- func (sl *Ice40Lp1kLeds) StaticVerilog() string
- func (sl *Ice40Lp1kLeds) Verilog_headers() string
- type IceFunLeds
- func (sl *IceFunLeds) Check(bmach *Bondmachine) error
- func (sl *IceFunLeds) Export() string
- func (sl *IceFunLeds) ExtraFiles() ([]string, []string)
- func (sl *IceFunLeds) Get_Name() string
- func (sl *IceFunLeds) Get_Params() *ExtraParams
- func (sl *IceFunLeds) Import(inp string) error
- func (sl *IceFunLeds) StaticVerilog() string
- func (sl *IceFunLeds) Verilog_headers() string
- type IcebreakerLeds
- func (sl *IcebreakerLeds) Check(bmach *Bondmachine) error
- func (sl *IcebreakerLeds) Export() string
- func (sl *IcebreakerLeds) ExtraFiles() ([]string, []string)
- func (sl *IcebreakerLeds) Get_Name() string
- func (sl *IcebreakerLeds) Get_Params() *ExtraParams
- func (sl *IcebreakerLeds) Import(inp string) error
- func (sl *IcebreakerLeds) StaticVerilog() string
- func (sl *IcebreakerLeds) Verilog_headers() string
- type Kbd
- type Kbd_instance
- func (sm Kbd_instance) GetCPSharedPortsHeader(bmach *Bondmachine, soId int, flavor string) string
- func (sm Kbd_instance) GetCPSharedPortsWires(bmach *Bondmachine, soId int, flavor string) string
- func (sm Kbd_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Kbd_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Kbd_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Kbd_instance) GetPerProcPortsWires(bmach *Bondmachine, procId int, soId int, flavor string) string
- func (sm Kbd_instance) String() string
- func (sm Kbd_instance) Write_verilog(bmach *Bondmachine, soIndex int, kbdName string, flavor string) string
- type Lfsr8
- type Lfsr8_instance
- func (sm Lfsr8_instance) GetCPSharedPortsHeader(bmach *Bondmachine, so_id int, flavor string) string
- func (sm Lfsr8_instance) GetCPSharedPortsWires(bmach *Bondmachine, so_id int, flavor string) string
- func (sm Lfsr8_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Lfsr8_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Lfsr8_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Lfsr8_instance) GetPerProcPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Lfsr8_instance) String() string
- func (sm Lfsr8_instance) Write_verilog(bmach *Bondmachine, so_index int, lfsr8_name string, flavor string) string
- type NetParameters
- type Prerror
- type Ps2KeyboardIoExtra
- func (sl *Ps2KeyboardIoExtra) Check(bmach *Bondmachine) error
- func (sl *Ps2KeyboardIoExtra) Export() string
- func (sl *Ps2KeyboardIoExtra) ExtraFiles() ([]string, []string)
- func (sl *Ps2KeyboardIoExtra) Get_Name() string
- func (sl *Ps2KeyboardIoExtra) Get_Params() *ExtraParams
- func (sl *Ps2KeyboardIoExtra) Import(inp string) error
- func (sl *Ps2KeyboardIoExtra) StaticVerilog() string
- func (sl *Ps2KeyboardIoExtra) Verilog_headers() string
- type Queue
- type Queue_instance
- func (sm Queue_instance) GetCPSharedPortsHeader(bmach *Bondmachine, soId int, flavor string) string
- func (sm Queue_instance) GetCPSharedPortsWires(bmach *Bondmachine, soId int, flavor string) string
- func (sm Queue_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Queue_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Queue_instance) GetPerProcPortsHeader(bmach *Bondmachine, procId int, soId int, flavor string) string
- func (sm Queue_instance) GetPerProcPortsWires(bmach *Bondmachine, procId int, soId int, flavor string) string
- func (sm Queue_instance) String() string
- func (sm Queue_instance) Write_verilog(bmach *Bondmachine, soIndex int, queueName string, flavor string) string
- type Redeployer
- type Residual
- type Shared_element
- type Shared_instance
- type Shared_instance_list
- type Sharedmem
- type Sharedmem_instance
- func (sm Sharedmem_instance) GetCPSharedPortsHeader(bmach *Bondmachine, so_id int, flavor string) string
- func (sm Sharedmem_instance) GetCPSharedPortsWires(bmach *Bondmachine, so_id int, flavor string) string
- func (sm Sharedmem_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Sharedmem_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Sharedmem_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Sharedmem_instance) GetPerProcPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Sharedmem_instance) String() string
- func (sm Sharedmem_instance) Write_verilog(bmach *Bondmachine, so_index int, sharedmem_name string, flavor string) string
- type Sim_config
- type Sim_drive
- type Sim_report
- type Sim_tick_get
- type Sim_tick_set
- type Sim_tick_show
- type Slow_extra
- func (sl *Slow_extra) Check(bmach *Bondmachine) error
- func (sl *Slow_extra) Export() string
- func (sl *Slow_extra) ExtraFiles() ([]string, []string)
- func (sl *Slow_extra) Get_Name() string
- func (sl *Slow_extra) Get_Params() *ExtraParams
- func (sl *Slow_extra) Import(inp string) error
- func (sl *Slow_extra) StaticVerilog() string
- func (sl *Slow_extra) Verilog_headers() string
- type Stack
- type Stack_instance
- func (sm Stack_instance) GetCPSharedPortsHeader(bmach *Bondmachine, soId int, flavor string) string
- func (sm Stack_instance) GetCPSharedPortsWires(bmach *Bondmachine, soId int, flavor string) string
- func (sm Stack_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Stack_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Stack_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Stack_instance) GetPerProcPortsWires(bmach *Bondmachine, procId int, soId int, flavor string) string
- func (sm Stack_instance) String() string
- func (sm Stack_instance) Write_verilog(bmach *Bondmachine, soIndex int, stackName string, flavor string) string
- type Uart
- type UartExtra
- func (sl *UartExtra) Check(bmach *Bondmachine) error
- func (sl *UartExtra) Export() string
- func (sl *UartExtra) ExtraFiles() ([]string, []string)
- func (sl *UartExtra) Get_Name() string
- func (sl *UartExtra) Get_Params() *ExtraParams
- func (sl *UartExtra) Import(inp string) error
- func (sl *UartExtra) StaticVerilog() string
- func (sl *UartExtra) Verilog_headers() string
- type UartTemplate
- type Uart_instance
- func (sm Uart_instance) GetCPSharedPortsHeader(bmach *Bondmachine, soId int, flavor string) string
- func (sm Uart_instance) GetCPSharedPortsWires(bmach *Bondmachine, soId int, flavor string) string
- func (sm Uart_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Uart_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Uart_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Uart_instance) GetPerProcPortsWires(bmach *Bondmachine, procId int, soId int, flavor string) string
- func (sm Uart_instance) String() string
- func (sm Uart_instance) Write_verilog(bmach *Bondmachine, soIndex int, uartName string, flavor string) string
- type Udpbond_extra
- func (sl *Udpbond_extra) Check(bmach *Bondmachine) error
- func (sl *Udpbond_extra) Export() string
- func (sl *Udpbond_extra) ExtraFiles() ([]string, []string)
- func (sl *Udpbond_extra) Get_Name() string
- func (sl *Udpbond_extra) Get_Params() *ExtraParams
- func (sl *Udpbond_extra) Import(inp string) error
- func (sl *Udpbond_extra) StaticVerilog() string
- func (sl *Udpbond_extra) Verilog_headers() string
- type VM
- func (vm *VM) CopyState(vmsource *VM)
- func (vm *VM) DumpIO() string
- func (vm *VM) EmuDriverDispatcher()
- func (vm *VM) GetElementLocation(mnemonic string) (*interface{}, error)
- func (vm *VM) Init() error
- func (vm *VM) Launch_processors(s *simbox.Simbox) error
- func (vm *VM) Processor_execute(psc *procbuilder.Sim_config, instruct <-chan int, resp chan<- int, ...)
- func (vm *VM) Step(sc *Sim_config) (string, error)
- type Vga800x600Emu
- type Vga800x600Extra
- func (sl *Vga800x600Extra) Check(bmach *Bondmachine) error
- func (sl *Vga800x600Extra) Export() string
- func (sl *Vga800x600Extra) ExtraFiles() ([]string, []string)
- func (sl *Vga800x600Extra) Get_Name() string
- func (sl *Vga800x600Extra) Get_Params() *ExtraParams
- func (sl *Vga800x600Extra) Import(inp string) error
- func (sl *Vga800x600Extra) StaticVerilog() string
- func (sl *Vga800x600Extra) Verilog_headers() string
- type Vtextmem
- type Vtextmem_instance
- func (sm Vtextmem_instance) GetCPSharedPortsHeader(bmach *Bondmachine, so_id int, flavor string) string
- func (sm Vtextmem_instance) GetCPSharedPortsWires(bmach *Bondmachine, so_id int, flavor string) string
- func (sm Vtextmem_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Vtextmem_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Vtextmem_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Vtextmem_instance) GetPerProcPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
- func (sm Vtextmem_instance) String() string
- func (sm Vtextmem_instance) Write_verilog(bmach *Bondmachine, so_index int, vtextmem_name string, flavor string) string
Constants ¶
View Source
const ( BMINPUT = uint8(0) BMOUTPUT = uint8(1) CPINPUT = uint8(2) CPOUTPUT = uint8(3) )
View Source
const ( GVNODE = uint8(0) + iota GVCLUS GVCLUSPROC GVCLUSIN GVCLUSOUT GVNODEIN GVNODEOUT GVNODEINPROC GVCLUSINPROC GVNODEININPROC GVNODEOUTINPROC GVCLUSININPROC GVCLUSOUTINPROC GVEDGE GVPEER GVNODEININPEER GVNODEOUTINPEER GVNODECHINPEER GVCLUSININPEER GVCLUSOUTINPEER GVCLUSCHINPEER GVINFOPROCREGS GVINFOPROCOPCODES GVINFOPROCPROG GVINFOPROCPC // Processor Program Counter style GVINFOPROCPROGLINE GVINFOPROCPROGLINESEL )
Variables ¶
Functions ¶
func Get_input_name ¶
func Get_output_name ¶
func LocateCommand ¶
func LocateCommand(fc []FirmwareCommand, ps string, ss string) int
func Needed_bits ¶
Types ¶
type AXIsTemplateData ¶
type Abs_assembly ¶
type B37s ¶
type B37s struct {
Mapped_output string
}
func (*B37s) Check ¶
func (sl *B37s) Check(bmach *Bondmachine) error
func (*B37s) ExtraFiles ¶
func (*B37s) Get_Params ¶
func (sl *B37s) Get_Params() *ExtraParams
func (*B37s) StaticVerilog ¶
func (*B37s) Verilog_headers ¶
type BMAPIExtra ¶
type BMAPIExtra struct { Maps *IOmap Language string Flavor string // "uartusb" or "aximm" or "axist" FlavorVersion string Framework string // "pynq" or "" LibOutDir string ModOutDir string AuxOutDir string PackageName string ModuleName string GenerateExample string DataType string Rsize uint8 }
func (*BMAPIExtra) Check ¶
func (sl *BMAPIExtra) Check(bmach *Bondmachine) error
func (*BMAPIExtra) Export ¶
func (sl *BMAPIExtra) Export() string
func (*BMAPIExtra) ExtraFiles ¶
func (sl *BMAPIExtra) ExtraFiles() ([]string, []string)
func (*BMAPIExtra) Get_Name ¶
func (sl *BMAPIExtra) Get_Name() string
func (*BMAPIExtra) Get_Params ¶
func (sl *BMAPIExtra) Get_Params() *ExtraParams
func (*BMAPIExtra) Import ¶
func (sl *BMAPIExtra) Import(inp string) error
func (*BMAPIExtra) StaticVerilog ¶
func (sl *BMAPIExtra) StaticVerilog() string
func (*BMAPIExtra) Verilog_headers ¶
func (sl *BMAPIExtra) Verilog_headers() string
type Barrier ¶
type Barrier struct{}
func (Barrier) Instantiate ¶
func (op Barrier) Instantiate(s string) (Shared_instance, bool)
func (Barrier) Shr_get_desc ¶
func (Barrier) Shr_get_name ¶
type Barrier_instance ¶
type Barrier_instance struct { Timeout int }
func (Barrier_instance) GetCPSharedPortsHeader ¶
func (sm Barrier_instance) GetCPSharedPortsHeader(bmach *Bondmachine, so_id int, flavor string) string
func (Barrier_instance) GetCPSharedPortsWires ¶
func (sm Barrier_instance) GetCPSharedPortsWires(bmach *Bondmachine, so_id int, flavor string) string
func (Barrier_instance) GetExternalPortsHeader ¶
func (sm Barrier_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Barrier_instance) GetExternalPortsWires ¶
func (sm Barrier_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Barrier_instance) GetPerProcPortsHeader ¶
func (sm Barrier_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Barrier_instance) GetPerProcPortsWires ¶
func (sm Barrier_instance) GetPerProcPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Barrier_instance) String ¶
func (sm Barrier_instance) String() string
func (Barrier_instance) Write_verilog ¶
func (sm Barrier_instance) Write_verilog(bmach *Bondmachine, so_index int, barrier_name string, flavor string) string
type Bond ¶
type Bondirect_extra ¶
type Bondirect_extra struct { Config *bondirect.Config Cluster *bondirect.Cluster Mesh *bondirect.Mesh PeerID uint32 Maps *IOmap Flavor string }
func (*Bondirect_extra) Check ¶
func (sl *Bondirect_extra) Check(bmach *Bondmachine) error
func (*Bondirect_extra) Export ¶
func (sl *Bondirect_extra) Export() string
func (*Bondirect_extra) ExtraFiles ¶
func (sl *Bondirect_extra) ExtraFiles() ([]string, []string)
func (*Bondirect_extra) Get_Name ¶
func (sl *Bondirect_extra) Get_Name() string
func (*Bondirect_extra) Get_Params ¶
func (sl *Bondirect_extra) Get_Params() *ExtraParams
func (*Bondirect_extra) Import ¶
func (sl *Bondirect_extra) Import(inp string) error
func (*Bondirect_extra) StaticVerilog ¶
func (sl *Bondirect_extra) StaticVerilog() string
func (*Bondirect_extra) Verilog_headers ¶
func (sl *Bondirect_extra) Verilog_headers() string
type Bondmachine ¶
type Bondmachine struct { Rsize uint8 Domains []*procbuilder.Machine Processors []int Inputs int Outputs int Internal_inputs []Bond // These are what internally in considered and input, i.e. Processors inputs and Shell outputs, lets say they are N Internal_outputs []Bond // These are what internally in considered and output, i.e. Processors outputs and Shell inputs, lets say they are M Links []int // Is the link matrix for Internal_inputs that may be connected only to one Internal_output (they are N!). A value of -1 means the input is unconnected, otherwise it points to the Internal_output id }
func (*Bondmachine) Add_bond ¶
func (bmach *Bondmachine) Add_bond(endpoints []string)
func (*Bondmachine) Add_input ¶
func (bmach *Bondmachine) Add_input() (string, error)
func (*Bondmachine) Add_output ¶
func (bmach *Bondmachine) Add_output() (string, error)
func (*Bondmachine) Add_processor ¶
func (bmach *Bondmachine) Add_processor(dom_id int) (string, error)
func (*Bondmachine) Add_shared_objects ¶
func (bmach *Bondmachine) Add_shared_objects(sos []string)
func (*Bondmachine) Attach_benchmark_core ¶
func (bmach *Bondmachine) Attach_benchmark_core(endpoints []string) error
func (*Bondmachine) Connect_processor_shared_object ¶
func (bmach *Bondmachine) Connect_processor_shared_object(endpoints []string)
func (*Bondmachine) Del_bond ¶
func (bmach *Bondmachine) Del_bond(bid int) error
func (*Bondmachine) Del_input ¶
func (bmach *Bondmachine) Del_input(iid int) error
func (*Bondmachine) Del_output ¶
func (bmach *Bondmachine) Del_output(oid int) error
func (*Bondmachine) EnumBonds ¶
func (bmach *Bondmachine) EnumBonds() int
func (*Bondmachine) EnumProcessors ¶
func (bmach *Bondmachine) EnumProcessors() int
func (*Bondmachine) Fitness_default ¶
func (*Bondmachine) GetMultiAssembly ¶
func (bmach *Bondmachine) GetMultiAssembly() (*Abs_assembly, error)
func (*Bondmachine) GetProgramsAlias ¶
func (bmach *Bondmachine) GetProgramsAlias() ([]string, error)
func (*Bondmachine) Get_so_name ¶
func (bmach *Bondmachine) Get_so_name(id int) (string, bool)
func (*Bondmachine) Init ¶
func (bmach *Bondmachine) Init()
func (*Bondmachine) Jsoner ¶
func (bmach *Bondmachine) Jsoner() *Bondmachine_json
func (*Bondmachine) List_bonds ¶
func (bmach *Bondmachine) List_bonds() map[int]string
func (*Bondmachine) List_domains ¶
func (bmach *Bondmachine) List_domains() string
func (*Bondmachine) List_inputs ¶
func (bmach *Bondmachine) List_inputs() []string
func (*Bondmachine) List_internal_inputs ¶
func (bmach *Bondmachine) List_internal_inputs() []string
func (*Bondmachine) List_internal_outputs ¶
func (bmach *Bondmachine) List_internal_outputs() []string
func (*Bondmachine) List_outputs ¶
func (bmach *Bondmachine) List_outputs() []string
func (*Bondmachine) List_processor_shared_object_links ¶
func (bmach *Bondmachine) List_processor_shared_object_links() string
func (*Bondmachine) List_processors ¶
func (bmach *Bondmachine) List_processors() string
func (*Bondmachine) List_shared_objects ¶
func (bmach *Bondmachine) List_shared_objects() string
func (*Bondmachine) MelCopy ¶
func (mach *Bondmachine) MelCopy() mel.Me3li
func (*Bondmachine) MelInit ¶
func (mach *Bondmachine) MelInit(c *mel.MelConfig, ep *mel.EvolutionParameters)
func (*Bondmachine) Specs ¶
func (b *Bondmachine) Specs() string
func (*Bondmachine) WriteBMAPI ¶
func (bmach *Bondmachine) WriteBMAPI(conf *Config, flavor string, iomaps *IOmap, extramods []ExtraModule, sbox *simbox.Simbox) error
func (*Bondmachine) WriteVerilogBMAPI ¶
func (bmach *Bondmachine) WriteVerilogBMAPI(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
func (*Bondmachine) WriteVerilogPs2Keyboard ¶
func (bmach *Bondmachine) WriteVerilogPs2Keyboard(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
func (*Bondmachine) WriteVerilogVgaText800x600 ¶
func (bmach *Bondmachine) WriteVerilogVgaText800x600(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
func (*Bondmachine) Write_verilog ¶
func (bmach *Bondmachine) Write_verilog(conf *Config, flavor string, iomaps *IOmap, extramods []ExtraModule, sbox *simbox.Simbox) error
func (*Bondmachine) Write_verilog_basys3_7segment ¶
func (bmach *Bondmachine) Write_verilog_basys3_7segment(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
func (*Bondmachine) Write_verilog_board ¶
func (bmach *Bondmachine) Write_verilog_board(conf *Config, module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) string
func (*Bondmachine) Write_verilog_etherbond ¶
func (bmach *Bondmachine) Write_verilog_etherbond(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
func (*Bondmachine) Write_verilog_main ¶
func (bmach *Bondmachine) Write_verilog_main(conf *Config, module_name string, flavor string) string
func (*Bondmachine) Write_verilog_testbench ¶
func (bmach *Bondmachine) Write_verilog_testbench(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule, sbox *simbox.Simbox) string
func (*Bondmachine) Write_verilog_udpbond ¶
func (bmach *Bondmachine) Write_verilog_udpbond(module_name string, flavor string, iomaps *IOmap, extramods []ExtraModule) (string, error)
type Bondmachine_json ¶
type Bondmachine_json struct { Rsize uint8 Domains []*procbuilder.Machine_json Processors []int Inputs int Outputs int Internal_inputs []Bond Internal_outputs []Bond Links []int }
func (*Bondmachine_json) Dejsoner ¶
func (bmachj *Bondmachine_json) Dejsoner() *Bondmachine
type Channel ¶
type Channel struct{}
func (Channel) Instantiate ¶
func (op Channel) Instantiate(s string) (Shared_instance, bool)
func (Channel) Shr_get_desc ¶
func (Channel) Shr_get_name ¶
type Channel_instance ¶
type Channel_instance struct {
}func (Channel_instance) GetCPSharedPortsHeader ¶
func (sm Channel_instance) GetCPSharedPortsHeader(bmach *Bondmachine, so_id int, flavor string) string
func (Channel_instance) GetCPSharedPortsWires ¶
func (sm Channel_instance) GetCPSharedPortsWires(bmach *Bondmachine, so_id int, flavor string) string
func (Channel_instance) GetExternalPortsHeader ¶
func (sm Channel_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Channel_instance) GetExternalPortsWires ¶
func (sm Channel_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Channel_instance) GetPerProcPortsHeader ¶
func (sm Channel_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Channel_instance) GetPerProcPortsWires ¶
func (sm Channel_instance) GetPerProcPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Channel_instance) String ¶
func (sm Channel_instance) String() string
func (Channel_instance) Write_verilog ¶
func (sm Channel_instance) Write_verilog(bmach *Bondmachine, so_index int, channel_name string, flavor string) string
type Config ¶
type Config struct { *bminfo.BMinfo *bmreqs.ReqRoot *bcof.BCOFEntry procbuilder.HwOptimizations Debug bool Dotdetail uint8 CommentedVerilog bool FormatSimReports bool }
func (*Config) ProcbuilderConfig ¶
func (c *Config) ProcbuilderConfig() *procbuilder.Config
type Etherbond_extra ¶
type Etherbond_extra struct { Config *etherbond.Config Cluster *etherbond.Cluster Macs *etherbond.Macs PeerID uint32 Maps *IOmap Flavor string Mac string }
func (*Etherbond_extra) Check ¶
func (sl *Etherbond_extra) Check(bmach *Bondmachine) error
func (*Etherbond_extra) Export ¶
func (sl *Etherbond_extra) Export() string
func (*Etherbond_extra) ExtraFiles ¶
func (sl *Etherbond_extra) ExtraFiles() ([]string, []string)
func (*Etherbond_extra) Get_Name ¶
func (sl *Etherbond_extra) Get_Name() string
func (*Etherbond_extra) Get_Params ¶
func (sl *Etherbond_extra) Get_Params() *ExtraParams
func (*Etherbond_extra) Import ¶
func (sl *Etherbond_extra) Import(inp string) error
func (*Etherbond_extra) StaticVerilog ¶
func (sl *Etherbond_extra) StaticVerilog() string
func (*Etherbond_extra) Verilog_headers ¶
func (sl *Etherbond_extra) Verilog_headers() string
type ExtraModule ¶
type ExtraModule interface { Get_Name() string Get_Params() *ExtraParams Import(string) error Export() string Check(*Bondmachine) error Verilog_headers() string StaticVerilog() string ExtraFiles() ([]string, []string) }
Extra modules (etherbond)
type ExtraParams ¶
Parameters for extra modules
type FirmwareCommand ¶
type FirmwareCommand struct { PrimaryState string // SM state for the command SecondaryState string // state for eventually internal State machines Command string // ASCII command Description string VHDLRapp string // VHDL hex Signal string // Eventually associated signal Starting int // Position of start within the memory OmitReturn bool Payload []string // Payload to transmit Payload_relpos []int // Pauload relative position }
func CompleteCommands ¶
func CompleteCommands(fc []FirmwareCommand) ([]FirmwareCommand, int)
func LocateCommandbyIndex ¶
func LocateCommandbyIndex(fc []FirmwareCommand, ps string, index int) (FirmwareCommand, bool)
type Ice40Lp1kLeds ¶
type Ice40Lp1kLeds struct {
MappedOutput string
}
func (*Ice40Lp1kLeds) Check ¶
func (sl *Ice40Lp1kLeds) Check(bmach *Bondmachine) error
func (*Ice40Lp1kLeds) Export ¶
func (sl *Ice40Lp1kLeds) Export() string
func (*Ice40Lp1kLeds) ExtraFiles ¶
func (sl *Ice40Lp1kLeds) ExtraFiles() ([]string, []string)
func (*Ice40Lp1kLeds) Get_Name ¶
func (sl *Ice40Lp1kLeds) Get_Name() string
func (*Ice40Lp1kLeds) Get_Params ¶
func (sl *Ice40Lp1kLeds) Get_Params() *ExtraParams
func (*Ice40Lp1kLeds) Import ¶
func (sl *Ice40Lp1kLeds) Import(inp string) error
func (*Ice40Lp1kLeds) StaticVerilog ¶
func (sl *Ice40Lp1kLeds) StaticVerilog() string
func (*Ice40Lp1kLeds) Verilog_headers ¶
func (sl *Ice40Lp1kLeds) Verilog_headers() string
type IceFunLeds ¶
type IceFunLeds struct {
MappedOutput string
}
func (*IceFunLeds) Check ¶
func (sl *IceFunLeds) Check(bmach *Bondmachine) error
func (*IceFunLeds) Export ¶
func (sl *IceFunLeds) Export() string
func (*IceFunLeds) ExtraFiles ¶
func (sl *IceFunLeds) ExtraFiles() ([]string, []string)
func (*IceFunLeds) Get_Name ¶
func (sl *IceFunLeds) Get_Name() string
func (*IceFunLeds) Get_Params ¶
func (sl *IceFunLeds) Get_Params() *ExtraParams
func (*IceFunLeds) Import ¶
func (sl *IceFunLeds) Import(inp string) error
func (*IceFunLeds) StaticVerilog ¶
func (sl *IceFunLeds) StaticVerilog() string
func (*IceFunLeds) Verilog_headers ¶
func (sl *IceFunLeds) Verilog_headers() string
type IcebreakerLeds ¶
type IcebreakerLeds struct {
MappedOutput string
}
func (*IcebreakerLeds) Check ¶
func (sl *IcebreakerLeds) Check(bmach *Bondmachine) error
func (*IcebreakerLeds) Export ¶
func (sl *IcebreakerLeds) Export() string
func (*IcebreakerLeds) ExtraFiles ¶
func (sl *IcebreakerLeds) ExtraFiles() ([]string, []string)
func (*IcebreakerLeds) Get_Name ¶
func (sl *IcebreakerLeds) Get_Name() string
func (*IcebreakerLeds) Get_Params ¶
func (sl *IcebreakerLeds) Get_Params() *ExtraParams
func (*IcebreakerLeds) Import ¶
func (sl *IcebreakerLeds) Import(inp string) error
func (*IcebreakerLeds) StaticVerilog ¶
func (sl *IcebreakerLeds) StaticVerilog() string
func (*IcebreakerLeds) Verilog_headers ¶
func (sl *IcebreakerLeds) Verilog_headers() string
type Kbd ¶
type Kbd struct{}
func (Kbd) Instantiate ¶
func (op Kbd) Instantiate(s string) (Shared_instance, bool)
func (Kbd) Shr_get_desc ¶
func (Kbd) Shr_get_name ¶
type Kbd_instance ¶
type Kbd_instance struct { Depth int // The depth of the fifo holding the data from the keyboard }
func (Kbd_instance) GetCPSharedPortsHeader ¶
func (sm Kbd_instance) GetCPSharedPortsHeader(bmach *Bondmachine, soId int, flavor string) string
func (Kbd_instance) GetCPSharedPortsWires ¶
func (sm Kbd_instance) GetCPSharedPortsWires(bmach *Bondmachine, soId int, flavor string) string
func (Kbd_instance) GetExternalPortsHeader ¶
func (sm Kbd_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Kbd_instance) GetExternalPortsWires ¶
func (sm Kbd_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Kbd_instance) GetPerProcPortsHeader ¶
func (sm Kbd_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Kbd_instance) GetPerProcPortsWires ¶
func (sm Kbd_instance) GetPerProcPortsWires(bmach *Bondmachine, procId int, soId int, flavor string) string
func (Kbd_instance) String ¶
func (sm Kbd_instance) String() string
func (Kbd_instance) Write_verilog ¶
func (sm Kbd_instance) Write_verilog(bmach *Bondmachine, soIndex int, kbdName string, flavor string) string
type Lfsr8 ¶
type Lfsr8 struct{}
func (Lfsr8) Instantiate ¶
func (op Lfsr8) Instantiate(s string) (Shared_instance, bool)
func (Lfsr8) Shr_get_desc ¶
func (Lfsr8) Shr_get_name ¶
type Lfsr8_instance ¶
type Lfsr8_instance struct { Seed uint8 }
func (Lfsr8_instance) GetCPSharedPortsHeader ¶
func (sm Lfsr8_instance) GetCPSharedPortsHeader(bmach *Bondmachine, so_id int, flavor string) string
func (Lfsr8_instance) GetCPSharedPortsWires ¶
func (sm Lfsr8_instance) GetCPSharedPortsWires(bmach *Bondmachine, so_id int, flavor string) string
func (Lfsr8_instance) GetExternalPortsHeader ¶
func (sm Lfsr8_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Lfsr8_instance) GetExternalPortsWires ¶
func (sm Lfsr8_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Lfsr8_instance) GetPerProcPortsHeader ¶
func (sm Lfsr8_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Lfsr8_instance) GetPerProcPortsWires ¶
func (sm Lfsr8_instance) GetPerProcPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Lfsr8_instance) String ¶
func (sm Lfsr8_instance) String() string
func (Lfsr8_instance) Write_verilog ¶
func (sm Lfsr8_instance) Write_verilog(bmach *Bondmachine, so_index int, lfsr8_name string, flavor string) string
type NetParameters ¶
type Ps2KeyboardIoExtra ¶
type Ps2KeyboardIoExtra struct {
MappedInput string
}
func (*Ps2KeyboardIoExtra) Check ¶
func (sl *Ps2KeyboardIoExtra) Check(bmach *Bondmachine) error
func (*Ps2KeyboardIoExtra) Export ¶
func (sl *Ps2KeyboardIoExtra) Export() string
func (*Ps2KeyboardIoExtra) ExtraFiles ¶
func (sl *Ps2KeyboardIoExtra) ExtraFiles() ([]string, []string)
func (*Ps2KeyboardIoExtra) Get_Name ¶
func (sl *Ps2KeyboardIoExtra) Get_Name() string
func (*Ps2KeyboardIoExtra) Get_Params ¶
func (sl *Ps2KeyboardIoExtra) Get_Params() *ExtraParams
func (*Ps2KeyboardIoExtra) Import ¶
func (sl *Ps2KeyboardIoExtra) Import(inp string) error
func (*Ps2KeyboardIoExtra) StaticVerilog ¶
func (sl *Ps2KeyboardIoExtra) StaticVerilog() string
func (*Ps2KeyboardIoExtra) Verilog_headers ¶
func (sl *Ps2KeyboardIoExtra) Verilog_headers() string
type Queue ¶
type Queue struct{}
func (Queue) Instantiate ¶
func (op Queue) Instantiate(s string) (Shared_instance, bool)
func (Queue) Shr_get_desc ¶
func (Queue) Shr_get_name ¶
type Queue_instance ¶
type Queue_instance struct { Depth int }
func (Queue_instance) GetCPSharedPortsHeader ¶
func (sm Queue_instance) GetCPSharedPortsHeader(bmach *Bondmachine, soId int, flavor string) string
func (Queue_instance) GetCPSharedPortsWires ¶
func (sm Queue_instance) GetCPSharedPortsWires(bmach *Bondmachine, soId int, flavor string) string
func (Queue_instance) GetExternalPortsHeader ¶
func (sm Queue_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Queue_instance) GetExternalPortsWires ¶
func (sm Queue_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Queue_instance) GetPerProcPortsHeader ¶
func (sm Queue_instance) GetPerProcPortsHeader(bmach *Bondmachine, procId int, soId int, flavor string) string
func (Queue_instance) GetPerProcPortsWires ¶
func (sm Queue_instance) GetPerProcPortsWires(bmach *Bondmachine, procId int, soId int, flavor string) string
func (Queue_instance) String ¶
func (sm Queue_instance) String() string
func (Queue_instance) Write_verilog ¶
func (sm Queue_instance) Write_verilog(bmach *Bondmachine, soIndex int, queueName string, flavor string) string
type Redeployer ¶
type Redeployer struct { Cluster *etherbond.Cluster Bondmachines map[int]*Bondmachine Maps map[int]*IOmap }
func (*Redeployer) Dot ¶
func (rd *Redeployer) Dot(conf *Config) string
func (*Redeployer) Init ¶
func (rd *Redeployer) Init()
func (*Redeployer) Validate ¶
func (rd *Redeployer) Validate() bool
type Shared_element ¶
type Shared_element interface {}
type Shared_instance ¶
type Shared_instance interface {}
type Shared_instance_list ¶
type Shared_instance_list []int
type Sharedmem ¶
type Sharedmem struct{}
func (Sharedmem) Instantiate ¶
func (op Sharedmem) Instantiate(s string) (Shared_instance, bool)
func (Sharedmem) Shr_get_desc ¶
func (Sharedmem) Shr_get_name ¶
type Sharedmem_instance ¶
type Sharedmem_instance struct {}
func (Sharedmem_instance) GetCPSharedPortsHeader ¶
func (sm Sharedmem_instance) GetCPSharedPortsHeader(bmach *Bondmachine, so_id int, flavor string) string
func (Sharedmem_instance) GetCPSharedPortsWires ¶
func (sm Sharedmem_instance) GetCPSharedPortsWires(bmach *Bondmachine, so_id int, flavor string) string
func (Sharedmem_instance) GetExternalPortsHeader ¶
func (sm Sharedmem_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Sharedmem_instance) GetExternalPortsWires ¶
func (sm Sharedmem_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Sharedmem_instance) GetPerProcPortsHeader ¶
func (sm Sharedmem_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Sharedmem_instance) GetPerProcPortsWires ¶
func (sm Sharedmem_instance) GetPerProcPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Sharedmem_instance) String ¶
func (sm Sharedmem_instance) String() string
func (Sharedmem_instance) Write_verilog ¶
func (sm Sharedmem_instance) Write_verilog(bmach *Bondmachine, so_index int, sharedmem_name string, flavor string) string
type Sim_config ¶
type Sim_drive ¶
type Sim_drive struct { Injectables []*interface{} AbsSet map[uint64]Sim_tick_set PerSet map[uint64]Sim_tick_set }
type Sim_report ¶
type Sim_report struct { Reportables []*interface{} Showables []*interface{} ReportablesTypes []string ShowablesTypes []string ReportablesNames []string AbsGet map[uint64]Sim_tick_get PerGet map[uint64]Sim_tick_get AbsShow map[uint64]Sim_tick_show PerShow map[uint64]Sim_tick_show }
type Sim_tick_get ¶
type Sim_tick_get map[int]interface{}
This is initializated when the simulation starts and filled on the way
type Sim_tick_set ¶
type Sim_tick_set map[int]interface{}
Simbox rules are converted in a sim drive when the simulation starts and applied during the simulation
type Sim_tick_show ¶
type Slow_extra ¶
type Slow_extra struct {
Slow_factor string
}
func (*Slow_extra) Check ¶
func (sl *Slow_extra) Check(bmach *Bondmachine) error
func (*Slow_extra) Export ¶
func (sl *Slow_extra) Export() string
func (*Slow_extra) ExtraFiles ¶
func (sl *Slow_extra) ExtraFiles() ([]string, []string)
func (*Slow_extra) Get_Name ¶
func (sl *Slow_extra) Get_Name() string
func (*Slow_extra) Get_Params ¶
func (sl *Slow_extra) Get_Params() *ExtraParams
func (*Slow_extra) Import ¶
func (sl *Slow_extra) Import(inp string) error
func (*Slow_extra) StaticVerilog ¶
func (sl *Slow_extra) StaticVerilog() string
func (*Slow_extra) Verilog_headers ¶
func (sl *Slow_extra) Verilog_headers() string
type Stack ¶
type Stack struct{}
func (Stack) Instantiate ¶
func (op Stack) Instantiate(s string) (Shared_instance, bool)
func (Stack) Shr_get_desc ¶
func (Stack) Shr_get_name ¶
type Stack_instance ¶
type Stack_instance struct { Depth int }
func (Stack_instance) GetCPSharedPortsHeader ¶
func (sm Stack_instance) GetCPSharedPortsHeader(bmach *Bondmachine, soId int, flavor string) string
func (Stack_instance) GetCPSharedPortsWires ¶
func (sm Stack_instance) GetCPSharedPortsWires(bmach *Bondmachine, soId int, flavor string) string
func (Stack_instance) GetExternalPortsHeader ¶
func (sm Stack_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Stack_instance) GetExternalPortsWires ¶
func (sm Stack_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Stack_instance) GetPerProcPortsHeader ¶
func (sm Stack_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Stack_instance) GetPerProcPortsWires ¶
func (sm Stack_instance) GetPerProcPortsWires(bmach *Bondmachine, procId int, soId int, flavor string) string
func (Stack_instance) String ¶
func (sm Stack_instance) String() string
func (Stack_instance) Write_verilog ¶
func (sm Stack_instance) Write_verilog(bmach *Bondmachine, soIndex int, stackName string, flavor string) string
type Uart ¶
type Uart struct{}
func (Uart) Instantiate ¶
func (op Uart) Instantiate(s string) (Shared_instance, bool)
func (Uart) Shr_get_desc ¶
func (Uart) Shr_get_name ¶
type UartExtra ¶
type UartExtra struct {
Maps *IOmap
}
func (*UartExtra) Check ¶
func (sl *UartExtra) Check(bmach *Bondmachine) error
func (*UartExtra) ExtraFiles ¶
func (*UartExtra) Get_Params ¶
func (sl *UartExtra) Get_Params() *ExtraParams
func (*UartExtra) StaticVerilog ¶
func (*UartExtra) Verilog_headers ¶
type UartTemplate ¶
type UartTemplate struct { BaudRate string Receivers []string Senders []string // contains filtered or unexported fields }
"strings"
type Uart_instance ¶
func (Uart_instance) GetCPSharedPortsHeader ¶
func (sm Uart_instance) GetCPSharedPortsHeader(bmach *Bondmachine, soId int, flavor string) string
func (Uart_instance) GetCPSharedPortsWires ¶
func (sm Uart_instance) GetCPSharedPortsWires(bmach *Bondmachine, soId int, flavor string) string
func (Uart_instance) GetExternalPortsHeader ¶
func (sm Uart_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Uart_instance) GetExternalPortsWires ¶
func (sm Uart_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Uart_instance) GetPerProcPortsHeader ¶
func (sm Uart_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Uart_instance) GetPerProcPortsWires ¶
func (sm Uart_instance) GetPerProcPortsWires(bmach *Bondmachine, procId int, soId int, flavor string) string
func (Uart_instance) String ¶
func (sm Uart_instance) String() string
func (Uart_instance) Write_verilog ¶
func (sm Uart_instance) Write_verilog(bmach *Bondmachine, soIndex int, uartName string, flavor string) string
type Udpbond_extra ¶
type Udpbond_extra struct { Config *udpbond.Config Cluster *udpbond.Cluster Ips *udpbond.Ips PeerID uint32 Maps *IOmap Flavor string Ip string Broadcast string Netmask string Port string NetParams *NetParameters }
func (*Udpbond_extra) Check ¶
func (sl *Udpbond_extra) Check(bmach *Bondmachine) error
func (*Udpbond_extra) Export ¶
func (sl *Udpbond_extra) Export() string
func (*Udpbond_extra) ExtraFiles ¶
func (sl *Udpbond_extra) ExtraFiles() ([]string, []string)
func (*Udpbond_extra) Get_Name ¶
func (sl *Udpbond_extra) Get_Name() string
func (*Udpbond_extra) Get_Params ¶
func (sl *Udpbond_extra) Get_Params() *ExtraParams
func (*Udpbond_extra) Import ¶
func (sl *Udpbond_extra) Import(inp string) error
func (*Udpbond_extra) StaticVerilog ¶
func (sl *Udpbond_extra) StaticVerilog() string
func (*Udpbond_extra) Verilog_headers ¶
func (sl *Udpbond_extra) Verilog_headers() string
type VM ¶
type VM struct { Bmach *Bondmachine Processors []*procbuilder.VM Inputs_regs []interface{} Outputs_regs []interface{} Internal_inputs_regs []interface{} Internal_outputs_regs []interface{} InputsValid []bool OutputsValid []bool InternalInputsValid []bool InternalOutputsValid []bool InputsRecv []bool OutputsRecv []bool InternalInputsRecv []bool InternalOutputsRecv []bool EmuDrivers []EmuDriver // contains filtered or unexported fields }
func (*VM) EmuDriverDispatcher ¶
func (vm *VM) EmuDriverDispatcher()
func (*VM) GetElementLocation ¶
func (*VM) Processor_execute ¶
func (vm *VM) Processor_execute(psc *procbuilder.Sim_config, instruct <-chan int, resp chan<- int, result_chan chan<- string, proc_id int)
type Vga800x600Emu ¶
type Vga800x600Emu struct { Socket string Constraints string // contains filtered or unexported fields }
func (*Vga800x600Emu) Init ¶
func (ed *Vga800x600Emu) Init() error
func (*Vga800x600Emu) PushCommand ¶
func (ed *Vga800x600Emu) PushCommand(cmd []byte) ([]byte, error)
func (*Vga800x600Emu) Run ¶
func (ed *Vga800x600Emu) Run() error
type Vga800x600Extra ¶
func (*Vga800x600Extra) Check ¶
func (sl *Vga800x600Extra) Check(bmach *Bondmachine) error
func (*Vga800x600Extra) Export ¶
func (sl *Vga800x600Extra) Export() string
func (*Vga800x600Extra) ExtraFiles ¶
func (sl *Vga800x600Extra) ExtraFiles() ([]string, []string)
func (*Vga800x600Extra) Get_Name ¶
func (sl *Vga800x600Extra) Get_Name() string
func (*Vga800x600Extra) Get_Params ¶
func (sl *Vga800x600Extra) Get_Params() *ExtraParams
func (*Vga800x600Extra) Import ¶
func (sl *Vga800x600Extra) Import(inp string) error
func (*Vga800x600Extra) StaticVerilog ¶
func (sl *Vga800x600Extra) StaticVerilog() string
func (*Vga800x600Extra) Verilog_headers ¶
func (sl *Vga800x600Extra) Verilog_headers() string
type Vtextmem ¶
type Vtextmem struct{}
func (Vtextmem) Instantiate ¶
func (op Vtextmem) Instantiate(s string) (Shared_instance, bool)
Instantiate is Textual Video RAM creation from a SO string
func (Vtextmem) Shr_get_desc ¶
func (Vtextmem) Shr_get_name ¶
type Vtextmem_instance ¶
type Vtextmem_instance struct { Boxes []GraphBox }
func (Vtextmem_instance) GetCPSharedPortsHeader ¶
func (sm Vtextmem_instance) GetCPSharedPortsHeader(bmach *Bondmachine, so_id int, flavor string) string
func (Vtextmem_instance) GetCPSharedPortsWires ¶
func (sm Vtextmem_instance) GetCPSharedPortsWires(bmach *Bondmachine, so_id int, flavor string) string
func (Vtextmem_instance) GetExternalPortsHeader ¶
func (sm Vtextmem_instance) GetExternalPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Vtextmem_instance) GetExternalPortsWires ¶
func (sm Vtextmem_instance) GetExternalPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Vtextmem_instance) GetPerProcPortsHeader ¶
func (sm Vtextmem_instance) GetPerProcPortsHeader(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Vtextmem_instance) GetPerProcPortsWires ¶
func (sm Vtextmem_instance) GetPerProcPortsWires(bmach *Bondmachine, proc_id int, so_id int, flavor string) string
func (Vtextmem_instance) String ¶
func (sm Vtextmem_instance) String() string
func (Vtextmem_instance) Write_verilog ¶
func (sm Vtextmem_instance) Write_verilog(bmach *Bondmachine, so_index int, vtextmem_name string, flavor string) string
Source Files
¶
- bmapi.go
- bmapi_auxfiles_axipatch.go
- bmapi_auxfiles_axipatch_bench.go
- bmapi_auxfiles_designexternal.go
- bmapi_auxfiles_designexternalinst.go
- bmapi_auxfiles_outregs.go
- bmapi_cfiles_Makefile.go
- bmapi_gofiles_bmapi.go
- bmapi_gofiles_bmapiCommands.go
- bmapi_gofiles_bmapiDecoder.go
- bmapi_gofiles_bmapiEncoder.go
- bmapi_gofiles_bmapiFunctions.go
- bmapi_gofiles_bmapigomod.go
- bmapi_modulefiles_bm.go
- bondmachine.go
- emudriver_ps2keyboard.go
- emudriver_vga800x600.go
- evolutionary.go
- exmod_basys3_7segment.go
- exmod_bmapi.go
- exmod_bondirect.go
- exmod_etherbond.go
- exmod_ice40lp1k_leds.go
- exmod_icebreaker_leds.go
- exmod_icefun_leds.go
- exmod_ps2keyboardio.go
- exmod_slow.go
- exmod_uart.go
- exmod_udpbond.go
- exmod_vga800x600.go
- files_aximm_pynq_example.go
- files_axist_basic.go
- files_axist_basic_bram.go
- files_axist_optimized.go
- files_axist_pynq_example.go
- files_bmapiaximmtransceiver.go
- files_bmapiuarttransceiver.go
- files_krnl_bondmachine_rtl.go
- files_krnl_bondmachine_rtl_axi_read_master.go
- files_krnl_bondmachine_rtl_axi_write_master.go
- files_krnl_bondmachine_rtl_caller.go
- files_krnl_bondmachine_rtl_control_s_axi.go
- files_krnl_bondmachine_rtl_counter.go
- files_krnl_bondmachine_rtl_int.go
- files_uart.go
- files_uart_so.go
- graphviz.go
- redeployer.go
- shared_element.go
- shr_barrier.go
- shr_channel.go
- shr_kbd.go
- shr_lfsr8.go
- shr_queue.go
- shr_sharedmem.go
- shr_stack.go
- shr_uart.go
- shr_vtextmem.go
- specs.go
- template.go
- utils.go
- verilog.go
- vm.go
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