Documentation ¶
Overview ¶
This file contains support functions for msr access for Linux.
Index ¶
Constants ¶
This section is empty.
Variables ¶
var Debug = func(string, ...interface{}) {}
Debug can be set for debug prints on MSR operaitons. It can be set to, e.g., log.Printf. It's default action is to do nothing.
var LockIntel = []MSRVal{ { Addr: IntelIA32FeatureControl, Name: "IntelIA32FeatureControl", Set: 1 << 0, }, { Addr: IntelPkgCstConfigControl, Name: "IntelPkgCstConfigControl", Set: 1 << 15, }, { Addr: IntelFeatureConfig, Name: "IntelFeatureConfig", Set: 1 << 0, }, { Addr: IntelDramPowerLimit, Name: "IntelDramPowerLimit", Set: 1 << 31, }, { Addr: IntelConfigTDPControl, Name: "IntelConfigTDPControl", Set: 1 << 31, }, { Addr: IntelIA32DebugInterface, Name: "IntelIA32DebugInterface", Set: 1 << 30, }, }
Functions ¶
Types ¶
type CPUs ¶
type CPUs []uint64
CPUs is a slice of the various cpus to read or write the MSR to.
func AllCPUs ¶
AllCPUs searches for actual present CPUs instead of relying on the glob. This is more accurate than what's presented in /dev/cpu/*/msr
type MSR ¶
type MSR uint32
MSR defines an MSR address.
const ( // This is Intel's name. It makes no sense: this register is present // in 64-bit CPUs. IntelIA32FeatureControl MSR = 0x3A // MSR_IA32_FEATURE_CONTROL IntelPkgCstConfigControl MSR = 0xE2 // MSR_PKG_CST_CONFIG_CONTROL IntelFeatureConfig MSR = 0x13c // MSR_FEATURE_CONFIG IntelDramPowerLimit MSR = 0x618 // MSR_DRAM_POWER_LIMIT IntelConfigTDPControl MSR = 0x64B // MSR_CONFIG_TDP_CONTROL IntelIA32DebugInterface MSR = 0xC80 // IA32_DEBUG_INTERFACE )
func (MSR) Test ¶
Test takes a mask of bits to clear and to set, and returns an error for those that do not match.
func (MSR) TestAndSet ¶
TestAndSet takes a mask of bits to clear and to set, and applies them to the specified MSR in each of the CPUs. Note that TestAndSet does not write if the mask does not change the MSR.
func (MSR) Write ¶
Write writes values to an MSR on a set of CPUs. The data must be passed as a scalar (single value) or a slice. If the data slice has more than one element, the length of the data slice and the CPU slice must be the same. If a single value is given, it will be written to all the CPUs. If multiple data values are given, each will be written to its corresponding CPU.
type MSRVal ¶
type MSRVal struct { // Addr is the address of the MSR. Addr MSR // Name is a printable name. Name string // Clear are bits to clear in TestAndSet and Test. Clear uint64 // Set are bits to set in TestAndSet and Test; or the value to write // if the MSR is writeonly. Set uint64 // WriteOnly indicats an MSR is writeonly. WriteOnly bool }
MSRVal defines an MSR Value to be used in TestAndSet, Test, and other operations.