Versions in this module Expand all Collapse all v0 v0.4.0 Mar 2, 2018 v0.3.0 Feb 15, 2018 Changes in this version + var VHDL = internal.Register(MustNewLexer(&Config{ ... }, Rules{ ... })) + var Verilog = internal.Register(MustNewLexer(&Config{ ... }, Rules{ ... })) + var Viml = internal.Register(MustNewLexer(&Config{ ... }, Rules{ ... }))
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